forked from ~ljy/RK356X_SDK_RELEASE
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hc
2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c 
 kernel/drivers/mtd/nand/raw/mxc_nand.c
....@@ -136,9 +136,9 @@
136136 	void (*irq_control)(struct mxc_nand_host *, int);
137137 	u32 (*get_ecc_status)(struct mxc_nand_host *);
138138 	const struct mtd_ooblayout_ops *ooblayout;
139
-	void (*select_chip)(struct mtd_info *mtd, int chip);
140
-	int (*setup_data_interface)(struct mtd_info *mtd, int csline,
141
-				    const struct nand_data_interface *conf);
139
+	void (*select_chip)(struct nand_chip *chip, int cs);
140
+	int (*setup_interface)(struct nand_chip *chip, int csline,
141
+			       const struct nand_interface_config *conf);
142142 	void (*enable_hwecc)(struct nand_chip *chip, bool enable);
143143 
144144 	/*
....@@ -669,7 +669,7 @@
669669 	struct mxc_nand_host *host = nand_get_controller_data(chip);
670670 	uint16_t config1;
671671 
672
-	if (chip->ecc.mode != NAND_ECC_HW)
672
+	if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)
673673 		return;
674674 
675675 	config1 = readw(NFC_V1_V2_CONFIG1);
....@@ -687,7 +687,7 @@
687687 	struct mxc_nand_host *host = nand_get_controller_data(chip);
688688 	uint32_t config2;
689689 
690
-	if (chip->ecc.mode != NAND_ECC_HW)
690
+	if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)
691691 		return;
692692 
693693 	config2 = readl(NFC_V3_CONFIG2);
....@@ -701,7 +701,7 @@
701701 }
702702 
703703 /* This functions is used by upper layer to checks if device is ready */
704
-static int mxc_nand_dev_ready(struct mtd_info *mtd)
704
+static int mxc_nand_dev_ready(struct nand_chip *chip)
705705 {
706706 	/*
707707 	 * NFC handles R/B internally. Therefore, this function
....@@ -816,8 +816,8 @@
816816 	return max_bitflips;
817817 }
818818 
819
-static int mxc_nand_read_page(struct mtd_info *mtd, struct nand_chip *chip,
820
-			      uint8_t *buf, int oob_required, int page)
819
+static int mxc_nand_read_page(struct nand_chip *chip, uint8_t *buf,
820
+			      int oob_required, int page)
821821 {
822822 	struct mxc_nand_host *host = nand_get_controller_data(chip);
823823 	void *oob_buf;
....@@ -830,8 +830,8 @@
830830 	return host->devtype_data->read_page(chip, buf, oob_buf, 1, page);
831831 }
832832 
833
-static int mxc_nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
834
-				  uint8_t *buf, int oob_required, int page)
833
+static int mxc_nand_read_page_raw(struct nand_chip *chip, uint8_t *buf,
834
+				  int oob_required, int page)
835835 {
836836 	struct mxc_nand_host *host = nand_get_controller_data(chip);
837837 	void *oob_buf;
....@@ -844,8 +844,7 @@
844844 	return host->devtype_data->read_page(chip, buf, oob_buf, 0, page);
845845 }
846846 
847
-static int mxc_nand_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
848
-			     int page)
847
+static int mxc_nand_read_oob(struct nand_chip *chip, int page)
849848 {
850849 	struct mxc_nand_host *host = nand_get_controller_data(chip);
851850 
....@@ -874,22 +873,21 @@
874873 	return 0;
875874 }
876875 
877
-static int mxc_nand_write_page_ecc(struct mtd_info *mtd, struct nand_chip *chip,
878
-				   const uint8_t *buf, int oob_required,
879
-				   int page)
876
+static int mxc_nand_write_page_ecc(struct nand_chip *chip, const uint8_t *buf,
877
+				   int oob_required, int page)
880878 {
881879 	return mxc_nand_write_page(chip, buf, true, page);
882880 }
883881 
884
-static int mxc_nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
885
-				   const uint8_t *buf, int oob_required, int page)
882
+static int mxc_nand_write_page_raw(struct nand_chip *chip, const uint8_t *buf,
883
+				   int oob_required, int page)
886884 {
887885 	return mxc_nand_write_page(chip, buf, false, page);
888886 }
889887 
890
-static int mxc_nand_write_oob(struct mtd_info *mtd, struct nand_chip *chip,
891
-			      int page)
888
+static int mxc_nand_write_oob(struct nand_chip *chip, int page)
892889 {
890
+	struct mtd_info *mtd = nand_to_mtd(chip);
893891 	struct mxc_nand_host *host = nand_get_controller_data(chip);
894892 
895893 	memset(host->data_buf, 0xff, mtd->writesize);
....@@ -897,9 +895,8 @@
897895 	return mxc_nand_write_page(chip, host->data_buf, false, page);
898896 }
899897 
900
-static u_char mxc_nand_read_byte(struct mtd_info *mtd)
898
+static u_char mxc_nand_read_byte(struct nand_chip *nand_chip)
901899 {
902
-	struct nand_chip *nand_chip = mtd_to_nand(mtd);
903900 	struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
904901 	uint8_t ret;
905902 
....@@ -921,25 +918,13 @@
921918 	return ret;
922919 }
923920 
924
-static uint16_t mxc_nand_read_word(struct mtd_info *mtd)
925
-{
926
-	struct nand_chip *nand_chip = mtd_to_nand(mtd);
927
-	struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
928
-	uint16_t ret;
929
-
930
-	ret = *(uint16_t *)(host->data_buf + host->buf_start);
931
-	host->buf_start += 2;
932
-
933
-	return ret;
934
-}
935
-
936921 /* Write data of length len to buffer buf. The data to be
937922  * written on NAND Flash is first copied to RAMbuffer. After the Data Input
938923  * Operation by the NFC, the data is written to NAND Flash */
939
-static void mxc_nand_write_buf(struct mtd_info *mtd,
940
-				const u_char *buf, int len)
924
+static void mxc_nand_write_buf(struct nand_chip *nand_chip, const u_char *buf,
925
+			       int len)
941926 {
942
-	struct nand_chip *nand_chip = mtd_to_nand(mtd);
927
+	struct mtd_info *mtd = nand_to_mtd(nand_chip);
943928 	struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
944929 	u16 col = host->buf_start;
945930 	int n = mtd->oobsize + mtd->writesize - col;
....@@ -955,9 +940,10 @@
955940  * Flash first the data output cycle is initiated by the NFC, which copies
956941  * the data to RAMbuffer. This data of length len is then copied to buffer buf.
957942  */
958
-static void mxc_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
943
+static void mxc_nand_read_buf(struct nand_chip *nand_chip, u_char *buf,
944
+			      int len)
959945 {
960
-	struct nand_chip *nand_chip = mtd_to_nand(mtd);
946
+	struct mtd_info *mtd = nand_to_mtd(nand_chip);
961947 	struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
962948 	u16 col = host->buf_start;
963949 	int n = mtd->oobsize + mtd->writesize - col;
....@@ -971,9 +957,8 @@
971957 
972958 /* This function is used by upper layer for select and
973959  * deselect of the NAND chip */
974
-static void mxc_nand_select_chip_v1_v3(struct mtd_info *mtd, int chip)
960
+static void mxc_nand_select_chip_v1_v3(struct nand_chip *nand_chip, int chip)
975961 {
976
-	struct nand_chip *nand_chip = mtd_to_nand(mtd);
977962 	struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
978963 
979964 	if (chip == -1) {
....@@ -992,9 +977,8 @@
992977 	}
993978 }
994979 
995
-static void mxc_nand_select_chip_v2(struct mtd_info *mtd, int chip)
980
+static void mxc_nand_select_chip_v2(struct nand_chip *nand_chip, int chip)
996981 {
997
-	struct nand_chip *nand_chip = mtd_to_nand(mtd);
998982 	struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
999983 
1000984 	if (chip == -1) {
....@@ -1133,7 +1117,8 @@
11331117 	struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
11341118 	uint16_t config1 = 0;
11351119 
1136
-	if (nand_chip->ecc.mode == NAND_ECC_HW && mtd->writesize)
1120
+	if (nand_chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST &&
1121
+	    mtd->writesize)
11371122 		config1 |= NFC_V1_V2_CONFIG1_ECC_EN;
11381123 
11391124 	if (!host->devtype_data->irqpending_quirk)
....@@ -1155,11 +1140,10 @@
11551140 	writew(0x4, NFC_V1_V2_WRPROT);
11561141 }
11571142 
1158
-static int mxc_nand_v2_setup_data_interface(struct mtd_info *mtd, int csline,
1159
-					const struct nand_data_interface *conf)
1143
+static int mxc_nand_v2_setup_interface(struct nand_chip *chip, int csline,
1144
+				       const struct nand_interface_config *conf)
11601145 {
1161
-	struct nand_chip *nand_chip = mtd_to_nand(mtd);
1162
-	struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
1146
+	struct mxc_nand_host *host = nand_get_controller_data(chip);
11631147 	int tRC_min_ns, tRC_ps, ret;
11641148 	unsigned long rate, rate_round;
11651149 	const struct nand_sdr_timings *timings;
....@@ -1244,7 +1228,7 @@
12441228 	if (mtd->writesize) {
12451229 		uint16_t pages_per_block = mtd->erasesize / mtd->writesize;
12461230 
1247
-		if (nand_chip->ecc.mode == NAND_ECC_HW)
1231
+		if (nand_chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST)
12481232 			config1 |= NFC_V1_V2_CONFIG1_ECC_EN;
12491233 
12501234 		host->eccsize = get_eccsize(mtd);
....@@ -1320,7 +1304,7 @@
13201304 	}
13211305 
13221306 	if (mtd->writesize) {
1323
-		if (chip->ecc.mode == NAND_ECC_HW)
1307
+		if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST)
13241308 			config2 |= NFC_V3_CONFIG2_ECC_EN;
13251309 
13261310 		config2 |= NFC_V3_CONFIG2_PPB(
....@@ -1349,10 +1333,10 @@
13491333 
13501334 /* Used by the upper layer to write command to NAND Flash for
13511335  * different operations to be carried out on NAND Flash */
1352
-static void mxc_nand_command(struct mtd_info *mtd, unsigned command,
1353
-				int column, int page_addr)
1336
+static void mxc_nand_command(struct nand_chip *nand_chip, unsigned command,
1337
+			     int column, int page_addr)
13541338 {
1355
-	struct nand_chip *nand_chip = mtd_to_nand(mtd);
1339
+	struct mtd_info *mtd = nand_to_mtd(nand_chip);
13561340 	struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
13571341 
13581342 	dev_dbg(host->dev, "mxc_nand_command (cmd = 0x%x, col = 0x%x, page = 0x%x)\n",
....@@ -1409,17 +1393,17 @@
14091393 	}
14101394 }
14111395 
1412
-static int mxc_nand_set_features(struct mtd_info *mtd, struct nand_chip *chip,
1413
-				 int addr, u8 *subfeature_param)
1396
+static int mxc_nand_set_features(struct nand_chip *chip, int addr,
1397
+				 u8 *subfeature_param)
14141398 {
1415
-	struct nand_chip *nand_chip = mtd_to_nand(mtd);
1416
-	struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
1399
+	struct mtd_info *mtd = nand_to_mtd(chip);
1400
+	struct mxc_nand_host *host = nand_get_controller_data(chip);
14171401 	int i;
14181402 
14191403 	host->buf_start = 0;
14201404 
14211405 	for (i = 0; i < ONFI_SUBFEATURE_PARAM_LEN; ++i)
1422
-		chip->write_byte(mtd, subfeature_param[i]);
1406
+		chip->legacy.write_byte(chip, subfeature_param[i]);
14231407 
14241408 	memcpy32_toio(host->main_area0, host->data_buf, mtd->writesize);
14251409 	host->devtype_data->send_cmd(host, NAND_CMD_SET_FEATURES, false);
....@@ -1429,11 +1413,11 @@
14291413 	return 0;
14301414 }
14311415 
1432
-static int mxc_nand_get_features(struct mtd_info *mtd, struct nand_chip *chip,
1433
-				 int addr, u8 *subfeature_param)
1416
+static int mxc_nand_get_features(struct nand_chip *chip, int addr,
1417
+				 u8 *subfeature_param)
14341418 {
1435
-	struct nand_chip *nand_chip = mtd_to_nand(mtd);
1436
-	struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
1419
+	struct mtd_info *mtd = nand_to_mtd(chip);
1420
+	struct mxc_nand_host *host = nand_get_controller_data(chip);
14371421 	int i;
14381422 
14391423 	host->devtype_data->send_cmd(host, NAND_CMD_GET_FEATURES, false);
....@@ -1443,13 +1427,13 @@
14431427 	host->buf_start = 0;
14441428 
14451429 	for (i = 0; i < ONFI_SUBFEATURE_PARAM_LEN; ++i)
1446
-		*subfeature_param++ = chip->read_byte(mtd);
1430
+		*subfeature_param++ = chip->legacy.read_byte(chip);
14471431 
14481432 	return 0;
14491433 }
14501434 
14511435 /*
1452
- * The generic flash bbt decriptors overlap with our ecc
1436
+ * The generic flash bbt descriptors overlap with our ecc
14531437  * hardware, so define some i.MX specific ones.
14541438  */
14551439 static uint8_t bbt_pattern[] = { 'B', 'b', 't', '0' };
....@@ -1538,7 +1522,7 @@
15381522 	.get_ecc_status = get_ecc_status_v2,
15391523 	.ooblayout = &mxc_v2_ooblayout_ops,
15401524 	.select_chip = mxc_nand_select_chip_v2,
1541
-	.setup_data_interface = mxc_nand_v2_setup_data_interface,
1525
+	.setup_interface = mxc_nand_v2_setup_interface,
15421526 	.enable_hwecc = mxc_nand_enable_hwecc_v1_v2,
15431527 	.irqpending_quirk = 0,
15441528 	.needs_ip = 0,
....@@ -1697,8 +1681,13 @@
16971681 	struct mxc_nand_host *host = nand_get_controller_data(chip);
16981682 	struct device *dev = mtd->dev.parent;
16991683 
1700
-	switch (chip->ecc.mode) {
1701
-	case NAND_ECC_HW:
1684
+	chip->ecc.bytes = host->devtype_data->eccbytes;
1685
+	host->eccsize = host->devtype_data->eccsize;
1686
+	chip->ecc.size = 512;
1687
+	mtd_set_ooblayout(mtd, host->devtype_data->ooblayout);
1688
+
1689
+	switch (chip->ecc.engine_type) {
1690
+	case NAND_ECC_ENGINE_TYPE_ON_HOST:
17021691 		chip->ecc.read_page = mxc_nand_read_page;
17031692 		chip->ecc.read_page_raw = mxc_nand_read_page_raw;
17041693 		chip->ecc.read_oob = mxc_nand_read_oob;
....@@ -1707,7 +1696,7 @@
17071696 		chip->ecc.write_oob = mxc_nand_write_oob;
17081697 		break;
17091698 
1710
-	case NAND_ECC_SOFT:
1699
+	case NAND_ECC_ENGINE_TYPE_SOFT:
17111700 		break;
17121701 
17131702 	default:
....@@ -1745,7 +1734,7 @@
17451734 	 */
17461735 	host->used_oobsize = min(mtd->oobsize, 218U);
17471736 
1748
-	if (chip->ecc.mode == NAND_ECC_HW) {
1737
+	if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST) {
17491738 		if (is_imx21_nfc(host) || is_imx27_nfc(host))
17501739 			chip->ecc.strength = 1;
17511740 		else
....@@ -1755,8 +1744,17 @@
17551744 	return 0;
17561745 }
17571746 
1747
+static int mxcnd_setup_interface(struct nand_chip *chip, int chipnr,
1748
+				 const struct nand_interface_config *conf)
1749
+{
1750
+	struct mxc_nand_host *host = nand_get_controller_data(chip);
1751
+
1752
+	return host->devtype_data->setup_interface(chip, chipnr, conf);
1753
+}
1754
+
17581755 static const struct nand_controller_ops mxcnd_controller_ops = {
17591756 	.attach_chip = mxcnd_attach_chip,
1757
+	.setup_interface = mxcnd_setup_interface,
17601758 };
17611759 
17621760 static int mxcnd_probe(struct platform_device *pdev)
....@@ -1786,18 +1784,17 @@
17861784 	mtd->name = DRIVER_NAME;
17871785 
17881786 	/* 50 us command delay time */
1789
-	this->chip_delay = 5;
1787
+	this->legacy.chip_delay = 5;
17901788 
17911789 	nand_set_controller_data(this, host);
17921790 	nand_set_flash_node(this, pdev->dev.of_node),
1793
-	this->dev_ready = mxc_nand_dev_ready;
1794
-	this->cmdfunc = mxc_nand_command;
1795
-	this->read_byte = mxc_nand_read_byte;
1796
-	this->read_word = mxc_nand_read_word;
1797
-	this->write_buf = mxc_nand_write_buf;
1798
-	this->read_buf = mxc_nand_read_buf;
1799
-	this->set_features = mxc_nand_set_features;
1800
-	this->get_features = mxc_nand_get_features;
1791
+	this->legacy.dev_ready = mxc_nand_dev_ready;
1792
+	this->legacy.cmdfunc = mxc_nand_command;
1793
+	this->legacy.read_byte = mxc_nand_read_byte;
1794
+	this->legacy.write_buf = mxc_nand_write_buf;
1795
+	this->legacy.read_buf = mxc_nand_read_buf;
1796
+	this->legacy.set_features = mxc_nand_set_features;
1797
+	this->legacy.get_features = mxc_nand_get_features;
18011798 
18021799 	host->clk = devm_clk_get(&pdev->dev, NULL);
18031800 	if (IS_ERR(host->clk))
....@@ -1818,7 +1815,8 @@
18181815 	if (err < 0)
18191816 		return err;
18201817 
1821
-	this->setup_data_interface = host->devtype_data->setup_data_interface;
1818
+	if (!host->devtype_data->setup_interface)
1819
+		this->options |= NAND_KEEP_TIMINGS;
18221820 
18231821 	if (host->devtype_data->needs_ip) {
18241822 		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
....@@ -1843,19 +1841,7 @@
18431841 	if (host->devtype_data->axi_offset)
18441842 		host->regs_axi = host->base + host->devtype_data->axi_offset;
18451843 
1846
-	this->ecc.bytes = host->devtype_data->eccbytes;
1847
-	host->eccsize = host->devtype_data->eccsize;
1848
-
1849
-	this->select_chip = host->devtype_data->select_chip;
1850
-	this->ecc.size = 512;
1851
-	mtd_set_ooblayout(mtd, host->devtype_data->ooblayout);
1852
-
1853
-	if (host->pdata.hw_ecc) {
1854
-		this->ecc.mode = NAND_ECC_HW;
1855
-	} else {
1856
-		this->ecc.mode = NAND_ECC_SOFT;
1857
-		this->ecc.algo = NAND_ECC_HAMMING;
1858
-	}
1844
+	this->legacy.select_chip = host->devtype_data->select_chip;
18591845 
18601846 	/* NAND bus width determines access functions used by upper layer */
18611847 	if (host->pdata.width == 2)
....@@ -1899,7 +1885,7 @@
18991885 	}
19001886 
19011887 	/* Scan the NAND device */
1902
-	this->dummy_controller.ops = &mxcnd_controller_ops;
1888
+	this->legacy.dummy_controller.ops = &mxcnd_controller_ops;
19031889 	err = nand_scan(this, is_imx25_nfc(host) ? 4 : 1);
19041890 	if (err)
19051891 		goto escan;
....@@ -1927,8 +1913,12 @@
19271913 static int mxcnd_remove(struct platform_device *pdev)
19281914 {
19291915 	struct mxc_nand_host *host = platform_get_drvdata(pdev);
1916
+	struct nand_chip *chip = &host->nand;
1917
+	int ret;
19301918 
1931
-	nand_release(&host->nand);
1919
+	ret = mtd_device_unregister(nand_to_mtd(chip));
1920
+	WARN_ON(ret);
1921
+	nand_cleanup(chip);
19321922 	if (host->clk_act)
19331923 		clk_disable_unprepare(host->clk);
19341924