forked from ~ljy/RK356X_SDK_RELEASE
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hc
2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c 
 kernel/drivers/gpu/drm/tegra/hdmi.c
....@@ -1,16 +1,15 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23  * Copyright (C) 2012 Avionic Design GmbH
34  * Copyright (C) 2012 NVIDIA CORPORATION.  All rights reserved.
4
- *
5
- * This program is free software; you can redistribute it and/or modify
6
- * it under the terms of the GNU General Public License version 2 as
7
- * published by the Free Software Foundation.
85  */
96 
107 #include <linux/clk.h>
118 #include <linux/debugfs.h>
12
-#include <linux/gpio.h>
9
+#include <linux/delay.h>
1310 #include <linux/hdmi.h>
11
+#include <linux/math64.h>
12
+#include <linux/module.h>
1413 #include <linux/of_device.h>
1514 #include <linux/pm_runtime.h>
1615 #include <linux/regulator/consumer.h>
....@@ -18,12 +17,13 @@
1817 
1918 #include <drm/drm_atomic_helper.h>
2019 #include <drm/drm_crtc.h>
21
-#include <drm/drm_crtc_helper.h>
20
+#include <drm/drm_debugfs.h>
21
+#include <drm/drm_file.h>
22
+#include <drm/drm_fourcc.h>
23
+#include <drm/drm_probe_helper.h>
24
+#include <drm/drm_simple_kms_helper.h>
2225 
23
-#include <sound/hda_verbs.h>
24
-
25
-#include <media/cec-notifier.h>
26
-
26
+#include "hda.h"
2727 #include "hdmi.h"
2828 #include "drm.h"
2929 #include "dc.h"
....@@ -71,8 +71,7 @@
7171 	const struct tegra_hdmi_config *config;
7272 
7373 	unsigned int audio_source;
74
-	unsigned int audio_sample_rate;
75
-	unsigned int audio_channels;
74
+	struct tegra_hda_format format;
7675 
7776 	unsigned int pixel_clock;
7877 	bool stereo;
....@@ -119,66 +118,9 @@
119118 }
120119 
121120 struct tegra_hdmi_audio_config {
122
-	unsigned int pclk;
123121 	unsigned int n;
124122 	unsigned int cts;
125123 	unsigned int aval;
126
-};
127
-
128
-static const struct tegra_hdmi_audio_config tegra_hdmi_audio_32k[] = {
129
-	{  25200000, 4096,  25200, 24000 },
130
-	{  27000000, 4096,  27000, 24000 },
131
-	{  74250000, 4096,  74250, 24000 },
132
-	{ 148500000, 4096, 148500, 24000 },
133
-	{         0,    0,      0,     0 },
134
-};
135
-
136
-static const struct tegra_hdmi_audio_config tegra_hdmi_audio_44_1k[] = {
137
-	{  25200000, 5880,  26250, 25000 },
138
-	{  27000000, 5880,  28125, 25000 },
139
-	{  74250000, 4704,  61875, 20000 },
140
-	{ 148500000, 4704, 123750, 20000 },
141
-	{         0,    0,      0,     0 },
142
-};
143
-
144
-static const struct tegra_hdmi_audio_config tegra_hdmi_audio_48k[] = {
145
-	{  25200000, 6144,  25200, 24000 },
146
-	{  27000000, 6144,  27000, 24000 },
147
-	{  74250000, 6144,  74250, 24000 },
148
-	{ 148500000, 6144, 148500, 24000 },
149
-	{         0,    0,      0,     0 },
150
-};
151
-
152
-static const struct tegra_hdmi_audio_config tegra_hdmi_audio_88_2k[] = {
153
-	{  25200000, 11760,  26250, 25000 },
154
-	{  27000000, 11760,  28125, 25000 },
155
-	{  74250000,  9408,  61875, 20000 },
156
-	{ 148500000,  9408, 123750, 20000 },
157
-	{         0,     0,      0,     0 },
158
-};
159
-
160
-static const struct tegra_hdmi_audio_config tegra_hdmi_audio_96k[] = {
161
-	{  25200000, 12288,  25200, 24000 },
162
-	{  27000000, 12288,  27000, 24000 },
163
-	{  74250000, 12288,  74250, 24000 },
164
-	{ 148500000, 12288, 148500, 24000 },
165
-	{         0,     0,      0,     0 },
166
-};
167
-
168
-static const struct tegra_hdmi_audio_config tegra_hdmi_audio_176_4k[] = {
169
-	{  25200000, 23520,  26250, 25000 },
170
-	{  27000000, 23520,  28125, 25000 },
171
-	{  74250000, 18816,  61875, 20000 },
172
-	{ 148500000, 18816, 123750, 20000 },
173
-	{         0,     0,      0,     0 },
174
-};
175
-
176
-static const struct tegra_hdmi_audio_config tegra_hdmi_audio_192k[] = {
177
-	{  25200000, 24576,  25200, 24000 },
178
-	{  27000000, 24576,  27000, 24000 },
179
-	{  74250000, 24576,  74250, 24000 },
180
-	{ 148500000, 24576, 148500, 24000 },
181
-	{         0,     0,      0,     0 },
182124 };
183125 
184126 static const struct tmds_config tegra20_tmds_config[] = {
....@@ -418,52 +360,53 @@
418360 	},
419361 };
420362 
421
-static const struct tegra_hdmi_audio_config *
422
-tegra_hdmi_get_audio_config(unsigned int sample_rate, unsigned int pclk)
363
+static int
364
+tegra_hdmi_get_audio_config(unsigned int audio_freq, unsigned int pix_clock,
365
+			    struct tegra_hdmi_audio_config *config)
423366 {
424
-	const struct tegra_hdmi_audio_config *table;
367
+	const unsigned int afreq = 128 * audio_freq;
368
+	const unsigned int min_n = afreq / 1500;
369
+	const unsigned int max_n = afreq / 300;
370
+	const unsigned int ideal_n = afreq / 1000;
371
+	int64_t min_err = (uint64_t)-1 >> 1;
372
+	unsigned int min_delta = -1;
373
+	int n;
425374 
426
-	switch (sample_rate) {
427
-	case 32000:
428
-		table = tegra_hdmi_audio_32k;
429
-		break;
375
+	memset(config, 0, sizeof(*config));
376
+	config->n = -1;
430377 
431
-	case 44100:
432
-		table = tegra_hdmi_audio_44_1k;
433
-		break;
378
+	for (n = min_n; n <= max_n; n++) {
379
+		uint64_t cts_f, aval_f;
380
+		unsigned int delta;
381
+		int64_t cts, err;
434382 
435
-	case 48000:
436
-		table = tegra_hdmi_audio_48k;
437
-		break;
383
+		/* compute aval in 48.16 fixed point */
384
+		aval_f = ((int64_t)24000000 << 16) * n;
385
+		do_div(aval_f, afreq);
386
+		/* It should round without any rest */
387
+		if (aval_f & 0xFFFF)
388
+			continue;
438389 
439
-	case 88200:
440
-		table = tegra_hdmi_audio_88_2k;
441
-		break;
390
+		/* Compute cts in 48.16 fixed point */
391
+		cts_f = ((int64_t)pix_clock << 16) * n;
392
+		do_div(cts_f, afreq);
393
+		/* Round it to the nearest integer */
394
+		cts = (cts_f & ~0xFFFF) + ((cts_f & BIT(15)) << 1);
442395 
443
-	case 96000:
444
-		table = tegra_hdmi_audio_96k;
445
-		break;
396
+		delta = abs(n - ideal_n);
446397 
447
-	case 176400:
448
-		table = tegra_hdmi_audio_176_4k;
449
-		break;
450
-
451
-	case 192000:
452
-		table = tegra_hdmi_audio_192k;
453
-		break;
454
-
455
-	default:
456
-		return NULL;
398
+		/* Compute the absolute error */
399
+		err = abs((int64_t)cts_f - cts);
400
+		if (err < min_err || (err == min_err && delta < min_delta)) {
401
+			config->n = n;
402
+			config->cts = cts >> 16;
403
+			config->aval = aval_f >> 16;
404
+			min_delta = delta;
405
+			min_err = err;
406
+		}
457407 	}
458408 
459
-	while (table->pclk) {
460
-		if (table->pclk == pclk)
461
-			return table;
462
-
463
-		table++;
464
-	}
465
-
466
-	return NULL;
409
+	return config->n != -1 ? 0 : -EINVAL;
467410 }
468411 
469412 static void tegra_hdmi_setup_audio_fs_tables(struct tegra_hdmi *hdmi)
....@@ -510,7 +453,7 @@
510453 	unsigned int i;
511454 
512455 	for (i = 0; i < ARRAY_SIZE(regs); i++) {
513
-		if (regs[i].sample_rate == hdmi->audio_sample_rate) {
456
+		if (regs[i].sample_rate == hdmi->format.sample_rate) {
514457 			tegra_hdmi_writel(hdmi, value, regs[i].offset);
515458 			break;
516459 		}
....@@ -519,8 +462,9 @@
519462 
520463 static int tegra_hdmi_setup_audio(struct tegra_hdmi *hdmi)
521464 {
522
-	const struct tegra_hdmi_audio_config *config;
465
+	struct tegra_hdmi_audio_config config;
523466 	u32 source, value;
467
+	int err;
524468 
525469 	switch (hdmi->audio_source) {
526470 	case HDA:
....@@ -564,7 +508,7 @@
564508 		 * play back system startup sounds early. It is possibly not
565509 		 * needed on Linux at all.
566510 		 */
567
-		if (hdmi->audio_channels == 2)
511
+		if (hdmi->format.channels == 2)
568512 			value = SOR_AUDIO_CNTRL0_INJECT_NULLSMPL;
569513 		else
570514 			value = 0;
....@@ -595,25 +539,28 @@
595539 		tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_AUDIO_SPARE0);
596540 	}
597541 
598
-	config = tegra_hdmi_get_audio_config(hdmi->audio_sample_rate,
599
-					     hdmi->pixel_clock);
600
-	if (!config) {
542
+	err = tegra_hdmi_get_audio_config(hdmi->format.sample_rate,
543
+					  hdmi->pixel_clock, &config);
544
+	if (err < 0) {
601545 		dev_err(hdmi->dev,
602546 			"cannot set audio to %u Hz at %u Hz pixel clock\n",
603
-			hdmi->audio_sample_rate, hdmi->pixel_clock);
604
-		return -EINVAL;
547
+			hdmi->format.sample_rate, hdmi->pixel_clock);
548
+		return err;
605549 	}
550
+
551
+	dev_dbg(hdmi->dev, "audio: pixclk=%u, n=%u, cts=%u, aval=%u\n",
552
+		hdmi->pixel_clock, config.n, config.cts, config.aval);
606553 
607554 	tegra_hdmi_writel(hdmi, 0, HDMI_NV_PDISP_HDMI_ACR_CTRL);
608555 
609556 	value = AUDIO_N_RESETF | AUDIO_N_GENERATE_ALTERNATE |
610
-		AUDIO_N_VALUE(config->n - 1);
557
+		AUDIO_N_VALUE(config.n - 1);
611558 	tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_AUDIO_N);
612559 
613
-	tegra_hdmi_writel(hdmi, ACR_SUBPACK_N(config->n) | ACR_ENABLE,
560
+	tegra_hdmi_writel(hdmi, ACR_SUBPACK_N(config.n) | ACR_ENABLE,
614561 			  HDMI_NV_PDISP_HDMI_ACR_0441_SUBPACK_HIGH);
615562 
616
-	tegra_hdmi_writel(hdmi, ACR_SUBPACK_CTS(config->cts),
563
+	tegra_hdmi_writel(hdmi, ACR_SUBPACK_CTS(config.cts),
617564 			  HDMI_NV_PDISP_HDMI_ACR_0441_SUBPACK_LOW);
618565 
619566 	value = SPARE_HW_CTS | SPARE_FORCE_SW_CTS | SPARE_CTS_RESET_VAL(1);
....@@ -624,7 +571,7 @@
624571 	tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_AUDIO_N);
625572 
626573 	if (hdmi->config->has_hda)
627
-		tegra_hdmi_write_aval(hdmi, config->aval);
574
+		tegra_hdmi_write_aval(hdmi, config.aval);
628575 
629576 	tegra_hdmi_setup_audio_fs_tables(hdmi);
630577 
....@@ -741,7 +688,8 @@
741688 	u8 buffer[17];
742689 	ssize_t err;
743690 
744
-	err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode, false);
691
+	err = drm_hdmi_avi_infoframe_from_display_mode(&frame,
692
+						       &hdmi->output.connector, mode);
745693 	if (err < 0) {
746694 		dev_err(hdmi->dev, "failed to setup AVI infoframe: %zd\n", err);
747695 		return;
....@@ -787,7 +735,7 @@
787735 		return;
788736 	}
789737 
790
-	frame.channels = hdmi->audio_channels;
738
+	frame.channels = hdmi->format.channels;
791739 
792740 	err = hdmi_audio_infoframe_pack(&frame, buffer, sizeof(buffer));
793741 	if (err < 0) {
....@@ -1116,7 +1064,6 @@
11161064 	struct drm_minor *minor = connector->dev->primary;
11171065 	struct dentry *root = connector->debugfs_entry;
11181066 	struct tegra_hdmi *hdmi = to_hdmi(output);
1119
-	int err;
11201067 
11211068 	hdmi->debugfs_files = kmemdup(debugfs_files, sizeof(debugfs_files),
11221069 				      GFP_KERNEL);
....@@ -1126,17 +1073,9 @@
11261073 	for (i = 0; i < count; i++)
11271074 		hdmi->debugfs_files[i].data = hdmi;
11281075 
1129
-	err = drm_debugfs_create_files(hdmi->debugfs_files, count, root, minor);
1130
-	if (err < 0)
1131
-		goto free;
1076
+	drm_debugfs_create_files(hdmi->debugfs_files, count, root, minor);
11321077 
11331078 	return 0;
1134
-
1135
-free:
1136
-	kfree(hdmi->debugfs_files);
1137
-	hdmi->debugfs_files = NULL;
1138
-
1139
-	return err;
11401079 }
11411080 
11421081 static void tegra_hdmi_early_unregister(struct drm_connector *connector)
....@@ -1188,16 +1127,13 @@
11881127 	.mode_valid = tegra_hdmi_connector_mode_valid,
11891128 };
11901129 
1191
-static const struct drm_encoder_funcs tegra_hdmi_encoder_funcs = {
1192
-	.destroy = tegra_output_encoder_destroy,
1193
-};
1194
-
11951130 static void tegra_hdmi_encoder_disable(struct drm_encoder *encoder)
11961131 {
11971132 	struct tegra_output *output = encoder_to_output(encoder);
11981133 	struct tegra_dc *dc = to_tegra_dc(encoder->crtc);
11991134 	struct tegra_hdmi *hdmi = to_hdmi(output);
12001135 	u32 value;
1136
+	int err;
12011137 
12021138 	/*
12031139 	 * The following accesses registers of the display controller, so make
....@@ -1223,7 +1159,9 @@
12231159 	tegra_hdmi_writel(hdmi, 0, HDMI_NV_PDISP_INT_ENABLE);
12241160 	tegra_hdmi_writel(hdmi, 0, HDMI_NV_PDISP_INT_MASK);
12251161 
1226
-	pm_runtime_put(hdmi->dev);
1162
+	err = host1x_client_suspend(&hdmi->client);
1163
+	if (err < 0)
1164
+		dev_err(hdmi->dev, "failed to suspend: %d\n", err);
12271165 }
12281166 
12291167 static void tegra_hdmi_encoder_enable(struct drm_encoder *encoder)
....@@ -1238,7 +1176,11 @@
12381176 	u32 value;
12391177 	int err;
12401178 
1241
-	pm_runtime_get_sync(hdmi->dev);
1179
+	err = host1x_client_resume(&hdmi->client);
1180
+	if (err < 0) {
1181
+		dev_err(hdmi->dev, "failed to resume: %d\n", err);
1182
+		return;
1183
+	}
12421184 
12431185 	/*
12441186 	 * Enable and unmask the HDA codec SCRATCH0 register interrupt. This
....@@ -1314,9 +1256,15 @@
13141256 
13151257 	hdmi->dvi = !tegra_output_is_hdmi(output);
13161258 	if (!hdmi->dvi) {
1317
-		err = tegra_hdmi_setup_audio(hdmi);
1318
-		if (err < 0)
1319
-			hdmi->dvi = true;
1259
+		/*
1260
+		 * Make sure that the audio format has been configured before
1261
+		 * enabling audio, otherwise we may try to divide by zero.
1262
+		*/
1263
+		if (hdmi->format.sample_rate > 0) {
1264
+			err = tegra_hdmi_setup_audio(hdmi);
1265
+			if (err < 0)
1266
+				hdmi->dvi = true;
1267
+		}
13201268 	}
13211269 
13221270 	if (hdmi->config->has_hda)
....@@ -1470,21 +1418,22 @@
14701418 
14711419 static int tegra_hdmi_init(struct host1x_client *client)
14721420 {
1473
-	struct drm_device *drm = dev_get_drvdata(client->parent);
14741421 	struct tegra_hdmi *hdmi = host1x_client_to_hdmi(client);
1422
+	struct drm_device *drm = dev_get_drvdata(client->host);
14751423 	int err;
14761424 
14771425 	hdmi->output.dev = client->dev;
14781426 
1479
-	drm_connector_init(drm, &hdmi->output.connector,
1480
-			   &tegra_hdmi_connector_funcs,
1481
-			   DRM_MODE_CONNECTOR_HDMIA);
1427
+	drm_connector_init_with_ddc(drm, &hdmi->output.connector,
1428
+				    &tegra_hdmi_connector_funcs,
1429
+				    DRM_MODE_CONNECTOR_HDMIA,
1430
+				    hdmi->output.ddc);
14821431 	drm_connector_helper_add(&hdmi->output.connector,
14831432 				 &tegra_hdmi_connector_helper_funcs);
14841433 	hdmi->output.connector.dpms = DRM_MODE_DPMS_OFF;
14851434 
1486
-	drm_encoder_init(drm, &hdmi->output.encoder, &tegra_hdmi_encoder_funcs,
1487
-			 DRM_MODE_ENCODER_TMDS, NULL);
1435
+	drm_simple_encoder_init(drm, &hdmi->output.encoder,
1436
+				DRM_MODE_ENCODER_TMDS);
14881437 	drm_encoder_helper_add(&hdmi->output.encoder,
14891438 			       &tegra_hdmi_encoder_helper_funcs);
14901439 
....@@ -1535,9 +1484,66 @@
15351484 	return 0;
15361485 }
15371486 
1487
+static int tegra_hdmi_runtime_suspend(struct host1x_client *client)
1488
+{
1489
+	struct tegra_hdmi *hdmi = host1x_client_to_hdmi(client);
1490
+	struct device *dev = client->dev;
1491
+	int err;
1492
+
1493
+	err = reset_control_assert(hdmi->rst);
1494
+	if (err < 0) {
1495
+		dev_err(dev, "failed to assert reset: %d\n", err);
1496
+		return err;
1497
+	}
1498
+
1499
+	usleep_range(1000, 2000);
1500
+
1501
+	clk_disable_unprepare(hdmi->clk);
1502
+	pm_runtime_put_sync(dev);
1503
+
1504
+	return 0;
1505
+}
1506
+
1507
+static int tegra_hdmi_runtime_resume(struct host1x_client *client)
1508
+{
1509
+	struct tegra_hdmi *hdmi = host1x_client_to_hdmi(client);
1510
+	struct device *dev = client->dev;
1511
+	int err;
1512
+
1513
+	err = pm_runtime_resume_and_get(dev);
1514
+	if (err < 0) {
1515
+		dev_err(dev, "failed to get runtime PM: %d\n", err);
1516
+		return err;
1517
+	}
1518
+
1519
+	err = clk_prepare_enable(hdmi->clk);
1520
+	if (err < 0) {
1521
+		dev_err(dev, "failed to enable clock: %d\n", err);
1522
+		goto put_rpm;
1523
+	}
1524
+
1525
+	usleep_range(1000, 2000);
1526
+
1527
+	err = reset_control_deassert(hdmi->rst);
1528
+	if (err < 0) {
1529
+		dev_err(dev, "failed to deassert reset: %d\n", err);
1530
+		goto disable_clk;
1531
+	}
1532
+
1533
+	return 0;
1534
+
1535
+disable_clk:
1536
+	clk_disable_unprepare(hdmi->clk);
1537
+put_rpm:
1538
+	pm_runtime_put_sync(dev);
1539
+	return err;
1540
+}
1541
+
15381542 static const struct host1x_client_ops hdmi_client_ops = {
15391543 	.init = tegra_hdmi_init,
15401544 	.exit = tegra_hdmi_exit,
1545
+	.suspend = tegra_hdmi_runtime_suspend,
1546
+	.resume = tegra_hdmi_runtime_resume,
15411547 };
15421548 
15431549 static const struct tegra_hdmi_config tegra20_hdmi_config = {
....@@ -1589,24 +1595,6 @@
15891595 };
15901596 MODULE_DEVICE_TABLE(of, tegra_hdmi_of_match);
15911597 
1592
-static void hda_format_parse(unsigned int format, unsigned int *rate,
1593
-			     unsigned int *channels)
1594
-{
1595
-	unsigned int mul, div;
1596
-
1597
-	if (format & AC_FMT_BASE_44K)
1598
-		*rate = 44100;
1599
-	else
1600
-		*rate = 48000;
1601
-
1602
-	mul = (format & AC_FMT_MULT_MASK) >> AC_FMT_MULT_SHIFT;
1603
-	div = (format & AC_FMT_DIV_MASK) >> AC_FMT_DIV_SHIFT;
1604
-
1605
-	*rate = *rate * (mul + 1) / (div + 1);
1606
-
1607
-	*channels = (format & AC_FMT_CHAN_MASK) >> AC_FMT_CHAN_SHIFT;
1608
-}
1609
-
16101598 static irqreturn_t tegra_hdmi_irq(int irq, void *data)
16111599 {
16121600 	struct tegra_hdmi *hdmi = data;
....@@ -1623,14 +1611,9 @@
16231611 		value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_SOR_AUDIO_HDA_CODEC_SCRATCH0);
16241612 
16251613 		if (value & SOR_AUDIO_HDA_CODEC_SCRATCH0_VALID) {
1626
-			unsigned int sample_rate, channels;
1627
-
16281614 			format = value & SOR_AUDIO_HDA_CODEC_SCRATCH0_FMT_MASK;
16291615 
1630
-			hda_format_parse(format, &sample_rate, &channels);
1631
-
1632
-			hdmi->audio_sample_rate = sample_rate;
1633
-			hdmi->audio_channels = channels;
1616
+			tegra_hda_parse_format(format, &hdmi->format);
16341617 
16351618 			err = tegra_hdmi_setup_audio(hdmi);
16361619 			if (err < 0) {
....@@ -1652,6 +1635,7 @@
16521635 
16531636 static int tegra_hdmi_probe(struct platform_device *pdev)
16541637 {
1638
+	const char *level = KERN_ERR;
16551639 	struct tegra_hdmi *hdmi;
16561640 	struct resource *regs;
16571641 	int err;
....@@ -1664,8 +1648,6 @@
16641648 	hdmi->dev = &pdev->dev;
16651649 
16661650 	hdmi->audio_source = AUTO;
1667
-	hdmi->audio_sample_rate = 48000;
1668
-	hdmi->audio_channels = 2;
16691651 	hdmi->stereo = false;
16701652 	hdmi->dvi = false;
16711653 
....@@ -1692,26 +1674,37 @@
16921674 	}
16931675 
16941676 	hdmi->hdmi = devm_regulator_get(&pdev->dev, "hdmi");
1695
-	if (IS_ERR(hdmi->hdmi)) {
1696
-		dev_err(&pdev->dev, "failed to get HDMI regulator\n");
1697
-		return PTR_ERR(hdmi->hdmi);
1677
+	err = PTR_ERR_OR_ZERO(hdmi->hdmi);
1678
+	if (err) {
1679
+		if (err == -EPROBE_DEFER)
1680
+			level = KERN_DEBUG;
1681
+
1682
+		dev_printk(level, &pdev->dev,
1683
+			   "failed to get HDMI regulator: %d\n", err);
1684
+		return err;
16981685 	}
16991686 
17001687 	hdmi->pll = devm_regulator_get(&pdev->dev, "pll");
1701
-	if (IS_ERR(hdmi->pll)) {
1702
-		dev_err(&pdev->dev, "failed to get PLL regulator\n");
1703
-		return PTR_ERR(hdmi->pll);
1688
+	err = PTR_ERR_OR_ZERO(hdmi->pll);
1689
+	if (err) {
1690
+		if (err == -EPROBE_DEFER)
1691
+			level = KERN_DEBUG;
1692
+
1693
+		dev_printk(level, &pdev->dev,
1694
+			   "failed to get PLL regulator: %d\n", err);
1695
+		return err;
17041696 	}
17051697 
17061698 	hdmi->vdd = devm_regulator_get(&pdev->dev, "vdd");
1707
-	if (IS_ERR(hdmi->vdd)) {
1708
-		dev_err(&pdev->dev, "failed to get VDD regulator\n");
1709
-		return PTR_ERR(hdmi->vdd);
1710
-	}
1699
+	err = PTR_ERR_OR_ZERO(hdmi->vdd);
1700
+	if (err) {
1701
+		if (err == -EPROBE_DEFER)
1702
+			level = KERN_DEBUG;
17111703 
1712
-	hdmi->output.notifier = cec_notifier_get(&pdev->dev);
1713
-	if (hdmi->output.notifier == NULL)
1714
-		return -ENOMEM;
1704
+		dev_printk(level, &pdev->dev,
1705
+			   "failed to get VDD regulator: %d\n", err);
1706
+		return err;
1707
+	}
17151708 
17161709 	hdmi->output.dev = &pdev->dev;
17171710 
....@@ -1771,64 +1764,13 @@
17711764 
17721765 	tegra_output_remove(&hdmi->output);
17731766 
1774
-	if (hdmi->output.notifier)
1775
-		cec_notifier_put(hdmi->output.notifier);
1776
-
17771767 	return 0;
17781768 }
1779
-
1780
-#ifdef CONFIG_PM
1781
-static int tegra_hdmi_suspend(struct device *dev)
1782
-{
1783
-	struct tegra_hdmi *hdmi = dev_get_drvdata(dev);
1784
-	int err;
1785
-
1786
-	err = reset_control_assert(hdmi->rst);
1787
-	if (err < 0) {
1788
-		dev_err(dev, "failed to assert reset: %d\n", err);
1789
-		return err;
1790
-	}
1791
-
1792
-	usleep_range(1000, 2000);
1793
-
1794
-	clk_disable_unprepare(hdmi->clk);
1795
-
1796
-	return 0;
1797
-}
1798
-
1799
-static int tegra_hdmi_resume(struct device *dev)
1800
-{
1801
-	struct tegra_hdmi *hdmi = dev_get_drvdata(dev);
1802
-	int err;
1803
-
1804
-	err = clk_prepare_enable(hdmi->clk);
1805
-	if (err < 0) {
1806
-		dev_err(dev, "failed to enable clock: %d\n", err);
1807
-		return err;
1808
-	}
1809
-
1810
-	usleep_range(1000, 2000);
1811
-
1812
-	err = reset_control_deassert(hdmi->rst);
1813
-	if (err < 0) {
1814
-		dev_err(dev, "failed to deassert reset: %d\n", err);
1815
-		clk_disable_unprepare(hdmi->clk);
1816
-		return err;
1817
-	}
1818
-
1819
-	return 0;
1820
-}
1821
-#endif
1822
-
1823
-static const struct dev_pm_ops tegra_hdmi_pm_ops = {
1824
-	SET_RUNTIME_PM_OPS(tegra_hdmi_suspend, tegra_hdmi_resume, NULL)
1825
-};
18261769 
18271770 struct platform_driver tegra_hdmi_driver = {
18281771 	.driver = {
18291772 		.name = "tegra-hdmi",
18301773 		.of_match_table = tegra_hdmi_of_match,
1831
-		.pm = &tegra_hdmi_pm_ops,
18321774 	},
18331775 	.probe = tegra_hdmi_probe,
18341776 	.remove = tegra_hdmi_remove,