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2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c

 kernel/drivers/gpu/drm/qxl/qxl_object.c
..
..
@@ -33,13 +33,14 @@
33
33
 	struct qxl_device *qdev;
34
34
 
35
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 	bo = to_qxl_bo(tbo);
36
-	qdev = (struct qxl_device *)bo->gem_base.dev->dev_private;
36
+	qdev = to_qxl(bo->tbo.base.dev);
37
37
 
38
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 	qxl_surface_evict(qdev, bo, false);
39
+	WARN_ON_ONCE(bo->map_count > 0);
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40
 	mutex_lock(&qdev->gem.mutex);
40
41
 	list_del_init(&bo->list);
41
42
 	mutex_unlock(&qdev->gem.mutex);
42
-	drm_gem_object_release(&bo->gem_base);
43
+	drm_gem_object_release(&bo->tbo.base);
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44
 	kfree(bo);
44
45
 }
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46
 
..
..
@@ -53,19 +54,34 @@
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54
 void qxl_ttm_placement_from_domain(struct qxl_bo *qbo, u32 domain, bool pinned)
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55
 {
55
56
 	u32 c = 0;
56
-	u32 pflag = pinned ? TTM_PL_FLAG_NO_EVICT : 0;
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-	unsigned i;
57
+	u32 pflag = 0;
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+	unsigned int i;
59
+
60
+	if (pinned)
61
+		pflag |= TTM_PL_FLAG_NO_EVICT;
62
+	if (qbo->tbo.base.size <= PAGE_SIZE)
63
+		pflag |= TTM_PL_FLAG_TOPDOWN;
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64
 
59
65
 	qbo->placement.placement = qbo->placements;
60
66
 	qbo->placement.busy_placement = qbo->placements;
61
-	if (domain == QXL_GEM_DOMAIN_VRAM)
62
-		qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_VRAM | pflag;
63
-	if (domain == QXL_GEM_DOMAIN_SURFACE)
64
-		qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_PRIV | pflag;
65
-	if (domain == QXL_GEM_DOMAIN_CPU)
66
-		qbo->placements[c++].flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM | pflag;
67
-	if (!c)
68
-		qbo->placements[c++].flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
67
+	if (domain == QXL_GEM_DOMAIN_VRAM) {
68
+		qbo->placements[c].mem_type = TTM_PL_VRAM;
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+		qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | pflag;
70
+	}
71
+	if (domain == QXL_GEM_DOMAIN_SURFACE) {
72
+		qbo->placements[c].mem_type = TTM_PL_PRIV;
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+		qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | pflag;
74
+		qbo->placements[c].mem_type = TTM_PL_VRAM;
75
+		qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | pflag;
76
+	}
77
+	if (domain == QXL_GEM_DOMAIN_CPU) {
78
+		qbo->placements[c].mem_type = TTM_PL_SYSTEM;
79
+		qbo->placements[c++].flags = TTM_PL_MASK_CACHING | pflag;
80
+	}
81
+	if (!c) {
82
+		qbo->placements[c].mem_type = TTM_PL_SYSTEM;
83
+		qbo->placements[c++].flags = TTM_PL_MASK_CACHING;
84
+	}
69
85
 	qbo->placement.num_placement = c;
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86
 	qbo->placement.num_busy_placement = c;
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87
 	for (i = 0; i < c; ++i) {
..
..
@@ -74,9 +90,21 @@
74
90
 	}
75
91
 }
76
92
 
93
+static const struct drm_gem_object_funcs qxl_object_funcs = {
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+	.free = qxl_gem_object_free,
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+	.open = qxl_gem_object_open,
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+	.close = qxl_gem_object_close,
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+	.pin = qxl_gem_prime_pin,
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+	.unpin = qxl_gem_prime_unpin,
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+	.get_sg_table = qxl_gem_prime_get_sg_table,
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+	.vmap = qxl_gem_prime_vmap,
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+	.vunmap = qxl_gem_prime_vunmap,
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+	.mmap = drm_gem_ttm_mmap,
103
+	.print_info = drm_gem_ttm_print_info,
104
+};
77
105
 
78
-int qxl_bo_create(struct qxl_device *qdev,
79
-		  unsigned long size, bool kernel, bool pinned, u32 domain,
106
+int qxl_bo_create(struct qxl_device *qdev, unsigned long size,
107
+		  bool kernel, bool pinned, u32 domain, u32 priority,
80
108
 		  struct qxl_surface *surf,
81
109
 		  struct qxl_bo **bo_ptr)
82
110
 {
..
..
@@ -93,11 +121,12 @@
93
121
 	if (bo == NULL)
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122
 		return -ENOMEM;
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123
 	size = roundup(size, PAGE_SIZE);
96
-	r = drm_gem_object_init(&qdev->ddev, &bo->gem_base, size);
124
+	r = drm_gem_object_init(&qdev->ddev, &bo->tbo.base, size);
97
125
 	if (unlikely(r)) {
98
126
 		kfree(bo);
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127
 		return r;
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128
 	}
129
+	bo->tbo.base.funcs = &qxl_object_funcs;
101
130
 	bo->type = domain;
102
131
 	bo->pin_count = pinned ? 1 : 0;
103
132
 	bo->surface_id = 0;
..
..
@@ -108,6 +137,7 @@
108
137
 
109
138
 	qxl_ttm_placement_from_domain(bo, domain, pinned);
110
139
 
140
+	bo->tbo.priority = priority;
111
141
 	r = ttm_bo_init(&qdev->mman.bdev, &bo->tbo, size, type,
112
142
 			&bo->placement, 0, !kernel, size,
113
143
 			NULL, NULL, &qxl_ttm_bo_destroy);
..
..
@@ -130,6 +160,7 @@
130
160
 	if (bo->kptr) {
131
161
 		if (ptr)
132
162
 			*ptr = bo->kptr;
163
+		bo->map_count++;
133
164
 		return 0;
134
165
 	}
135
166
 	r = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages, &bo->kmap);
..
..
@@ -138,13 +169,14 @@
138
169
 	bo->kptr = ttm_kmap_obj_virtual(&bo->kmap, &is_iomem);
139
170
 	if (ptr)
140
171
 		*ptr = bo->kptr;
172
+	bo->map_count = 1;
141
173
 	return 0;
142
174
 }
143
175
 
144
-void *qxl_bo_kmap_atomic_page(struct qxl_device *qdev,
145
-			      struct qxl_bo *bo, int page_offset)
176
+void *qxl_bo_kmap_local_page(struct qxl_device *qdev,
177
+			     struct qxl_bo *bo, int page_offset)
146
178
 {
147
-	struct ttm_mem_type_manager *man = &bo->tbo.bdev->man[bo->tbo.mem.mem_type];
179
+	unsigned long offset;
148
180
 	void *rptr;
149
181
 	int ret;
150
182
 	struct io_mapping *map;
..
..
@@ -156,11 +188,8 @@
156
188
 	else
157
189
 		goto fallback;
158
190
 
159
-	(void) ttm_mem_io_lock(man, false);
160
-	ret = ttm_mem_io_reserve(bo->tbo.bdev, &bo->tbo.mem);
161
-	ttm_mem_io_unlock(man);
162
-
163
-	return io_mapping_map_atomic_wc(map, bo->tbo.mem.bus.offset + page_offset);
191
+	offset = bo->tbo.mem.start << PAGE_SHIFT;
192
+	return io_mapping_map_local_wc(map, offset + page_offset);
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193
 fallback:
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194
 	if (bo->kptr) {
166
195
 		rptr = bo->kptr + (page_offset * PAGE_SIZE);
..
..
@@ -179,29 +208,22 @@
179
208
 {
180
209
 	if (bo->kptr == NULL)
181
210
 		return;
211
+	bo->map_count--;
212
+	if (bo->map_count > 0)
213
+		return;
182
214
 	bo->kptr = NULL;
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215
 	ttm_bo_kunmap(&bo->kmap);
184
216
 }
185
217
 
186
-void qxl_bo_kunmap_atomic_page(struct qxl_device *qdev,
187
-			       struct qxl_bo *bo, void *pmap)
218
+void qxl_bo_kunmap_local_page(struct qxl_device *qdev,
219
+			      struct qxl_bo *bo, void *pmap)
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220
 {
189
-	struct ttm_mem_type_manager *man = &bo->tbo.bdev->man[bo->tbo.mem.mem_type];
190
-	struct io_mapping *map;
191
-
192
-	if (bo->tbo.mem.mem_type == TTM_PL_VRAM)
193
-		map = qdev->vram_mapping;
194
-	else if (bo->tbo.mem.mem_type == TTM_PL_PRIV)
195
-		map = qdev->surface_mapping;
196
-	else
221
+	if ((bo->tbo.mem.mem_type != TTM_PL_VRAM) &&
222
+	    (bo->tbo.mem.mem_type != TTM_PL_PRIV))
197
223
 		goto fallback;
198
224
 
199
-	io_mapping_unmap_atomic(pmap);
200
-
201
-	(void) ttm_mem_io_lock(man, false);
202
-	ttm_mem_io_free(bo->tbo.bdev, &bo->tbo.mem);
203
-	ttm_mem_io_unlock(man);
204
-	return ;
225
+	io_mapping_unmap_local(pmap);
226
+	return;
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227
  fallback:
206
228
 	qxl_bo_kunmap(bo);
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229
 }
..
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@@ -211,34 +233,30 @@
211
233
 	if ((*bo) == NULL)
212
234
 		return;
213
235
 
214
-	drm_gem_object_put_unlocked(&(*bo)->gem_base);
236
+	drm_gem_object_put(&(*bo)->tbo.base);
215
237
 	*bo = NULL;
216
238
 }
217
239
 
218
240
 struct qxl_bo *qxl_bo_ref(struct qxl_bo *bo)
219
241
 {
220
-	drm_gem_object_get(&bo->gem_base);
242
+	drm_gem_object_get(&bo->tbo.base);
221
243
 	return bo;
222
244
 }
223
245
 
224
-static int __qxl_bo_pin(struct qxl_bo *bo, u32 domain, u64 *gpu_addr)
246
+static int __qxl_bo_pin(struct qxl_bo *bo)
225
247
 {
226
248
 	struct ttm_operation_ctx ctx = { false, false };
227
-	struct drm_device *ddev = bo->gem_base.dev;
249
+	struct drm_device *ddev = bo->tbo.base.dev;
228
250
 	int r;
229
251
 
230
252
 	if (bo->pin_count) {
231
253
 		bo->pin_count++;
232
-		if (gpu_addr)
233
-			*gpu_addr = qxl_bo_gpu_offset(bo);
234
254
 		return 0;
235
255
 	}
236
-	qxl_ttm_placement_from_domain(bo, domain, true);
256
+	qxl_ttm_placement_from_domain(bo, bo->type, true);
237
257
 	r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
238
258
 	if (likely(r == 0)) {
239
259
 		bo->pin_count = 1;
240
-		if (gpu_addr != NULL)
241
-			*gpu_addr = qxl_bo_gpu_offset(bo);
242
260
 	}
243
261
 	if (unlikely(r != 0))
244
262
 		dev_err(ddev->dev, "%p pin failed\n", bo);
..
..
@@ -248,7 +266,7 @@
248
266
 static int __qxl_bo_unpin(struct qxl_bo *bo)
249
267
 {
250
268
 	struct ttm_operation_ctx ctx = { false, false };
251
-	struct drm_device *ddev = bo->gem_base.dev;
269
+	struct drm_device *ddev = bo->tbo.base.dev;
252
270
 	int r, i;
253
271
 
254
272
 	if (!bo->pin_count) {
..
..
@@ -266,21 +284,20 @@
266
284
 	return r;
267
285
 }
268
286
 
269
-
270
287
 /*
271
288
  * Reserve the BO before pinning the object.  If the BO was reserved
272
289
  * beforehand, use the internal version directly __qxl_bo_pin.
273
290
  *
274
291
  */
275
-int qxl_bo_pin(struct qxl_bo *bo, u32 domain, u64 *gpu_addr)
292
+int qxl_bo_pin(struct qxl_bo *bo)
276
293
 {
277
294
 	int r;
278
295
 
279
-	r = qxl_bo_reserve(bo, false);
296
+	r = qxl_bo_reserve(bo);
280
297
 	if (r)
281
298
 		return r;
282
299
 
283
-	r = __qxl_bo_pin(bo, bo->type, NULL);
300
+	r = __qxl_bo_pin(bo);
284
301
 	qxl_bo_unreserve(bo);
285
302
 	return r;
286
303
 }
..
..
@@ -294,7 +311,7 @@
294
311
 {
295
312
 	int r;
296
313
 
297
-	r = qxl_bo_reserve(bo, false);
314
+	r = qxl_bo_reserve(bo);
298
315
 	if (r)
299
316
 		return r;
300
317
 
..
..
@@ -312,13 +329,13 @@
312
329
 	dev_err(qdev->ddev.dev, "Userspace still has active objects !\n");
313
330
 	list_for_each_entry_safe(bo, n, &qdev->gem.objects, list) {
314
331
 		dev_err(qdev->ddev.dev, "%p %p %lu %lu force free\n",
315
-			&bo->gem_base, bo, (unsigned long)bo->gem_base.size,
316
-			*((unsigned long *)&bo->gem_base.refcount));
332
+			&bo->tbo.base, bo, (unsigned long)bo->tbo.base.size,
333
+			*((unsigned long *)&bo->tbo.base.refcount));
317
334
 		mutex_lock(&qdev->gem.mutex);
318
335
 		list_del_init(&bo->list);
319
336
 		mutex_unlock(&qdev->gem.mutex);
320
337
 		/* this should unref the ttm bo */
321
-		drm_gem_object_put_unlocked(&bo->gem_base);
338
+		drm_gem_object_put(&bo->tbo.base);
322
339
 	}
323
340
 }
324
341
 
..
..
@@ -335,13 +352,14 @@
335
352
 int qxl_bo_check_id(struct qxl_device *qdev, struct qxl_bo *bo)
336
353
 {
337
354
 	int ret;
355
+
338
356
 	if (bo->type == QXL_GEM_DOMAIN_SURFACE && bo->surface_id == 0) {
339
357
 		/* allocate a surface id for this surface now */
340
358
 		ret = qxl_surface_id_alloc(qdev, bo);
341
359
 		if (ret)
342
360
 			return ret;
343
361
 
344
-		ret = qxl_hw_surface_alloc(qdev, bo, NULL);
362
+		ret = qxl_hw_surface_alloc(qdev, bo);
345
363
 		if (ret)
346
364
 			return ret;
347
365
 	}