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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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| 1 | 2 | /* Copyright (c) 2012-2015, 2017-2018, The Linux Foundation. |
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| 2 | 3 | * All rights reserved. |
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| 3 | | - * |
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| 4 | | - * This program is free software; you can redistribute it and/or modify |
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| 5 | | - * it under the terms of the GNU General Public License version 2 and |
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| 6 | | - * only version 2 as published by the Free Software Foundation. |
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| 7 | | - * |
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| 8 | | - * This program is distributed in the hope that it will be useful, |
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| 9 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 10 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 11 | | - * GNU General Public License for more details. |
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| 12 | 4 | */ |
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| 13 | 5 | |
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| 14 | 6 | #include <linux/clk.h> |
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| 15 | 7 | #include <linux/clk/clk-conf.h> |
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| 16 | 8 | #include <linux/err.h> |
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| 17 | 9 | #include <linux/delay.h> |
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| 10 | +#include <linux/of.h> |
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| 11 | + |
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| 12 | +#include <drm/drm_print.h> |
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| 18 | 13 | |
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| 19 | 14 | #include "dpu_io_util.h" |
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| 20 | 15 | |
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| .. | .. |
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| 98 | 93 | DEV_DBG("%pS->%s: enable '%s'\n", |
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| 99 | 94 | __builtin_return_address(0), __func__, |
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| 100 | 95 | clk_arry[i].clk_name); |
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| 101 | | - if (clk_arry[i].clk) { |
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| 102 | | - rc = clk_prepare_enable(clk_arry[i].clk); |
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| 103 | | - if (rc) |
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| 104 | | - DEV_ERR("%pS->%s: %s en fail. rc=%d\n", |
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| 105 | | - __builtin_return_address(0), |
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| 106 | | - __func__, |
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| 107 | | - clk_arry[i].clk_name, rc); |
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| 108 | | - } else { |
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| 109 | | - DEV_ERR("%pS->%s: '%s' is not available\n", |
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| 110 | | - __builtin_return_address(0), __func__, |
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| 111 | | - clk_arry[i].clk_name); |
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| 112 | | - rc = -EPERM; |
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| 113 | | - } |
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| 96 | + rc = clk_prepare_enable(clk_arry[i].clk); |
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| 97 | + if (rc) |
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| 98 | + DEV_ERR("%pS->%s: %s en fail. rc=%d\n", |
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| 99 | + __builtin_return_address(0), |
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| 100 | + __func__, |
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| 101 | + clk_arry[i].clk_name, rc); |
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| 114 | 102 | |
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| 115 | | - if (rc) { |
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| 116 | | - msm_dss_enable_clk(&clk_arry[i], |
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| 117 | | - i, false); |
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| 103 | + if (rc && i) { |
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| 104 | + msm_dss_enable_clk(&clk_arry[i - 1], |
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| 105 | + i - 1, false); |
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| 118 | 106 | break; |
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| 119 | 107 | } |
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| 120 | 108 | } |
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| .. | .. |
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| 124 | 112 | __builtin_return_address(0), __func__, |
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| 125 | 113 | clk_arry[i].clk_name); |
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| 126 | 114 | |
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| 127 | | - if (clk_arry[i].clk) |
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| 128 | | - clk_disable_unprepare(clk_arry[i].clk); |
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| 129 | | - else |
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| 130 | | - DEV_ERR("%pS->%s: '%s' is not available\n", |
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| 131 | | - __builtin_return_address(0), __func__, |
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| 132 | | - clk_arry[i].clk_name); |
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| 115 | + clk_disable_unprepare(clk_arry[i].clk); |
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| 133 | 116 | } |
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| 134 | 117 | } |
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| 135 | 118 | |
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| .. | .. |
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| 164 | 147 | "clock-names", i, |
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| 165 | 148 | &clock_name); |
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| 166 | 149 | if (rc) { |
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| 167 | | - dev_err(&pdev->dev, "Failed to get clock name for %d\n", |
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| 150 | + DRM_DEV_ERROR(&pdev->dev, "Failed to get clock name for %d\n", |
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| 168 | 151 | i); |
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| 169 | 152 | break; |
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| 170 | 153 | } |
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| .. | .. |
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| 176 | 159 | |
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| 177 | 160 | rc = msm_dss_get_clk(&pdev->dev, mp->clk_config, num_clk); |
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| 178 | 161 | if (rc) { |
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| 179 | | - dev_err(&pdev->dev, "Failed to get clock refs %d\n", rc); |
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| 162 | + DRM_DEV_ERROR(&pdev->dev, "Failed to get clock refs %d\n", rc); |
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| 180 | 163 | goto err; |
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| 181 | 164 | } |
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| 182 | 165 | |
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| 183 | 166 | rc = of_clk_set_defaults(pdev->dev.of_node, false); |
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| 184 | 167 | if (rc) { |
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| 185 | | - dev_err(&pdev->dev, "Failed to set clock defaults %d\n", rc); |
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| 168 | + DRM_DEV_ERROR(&pdev->dev, "Failed to set clock defaults %d\n", rc); |
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| 186 | 169 | goto err; |
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| 187 | 170 | } |
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| 188 | 171 | |
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| .. | .. |
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| 192 | 175 | continue; |
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| 193 | 176 | mp->clk_config[i].rate = rate; |
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| 194 | 177 | mp->clk_config[i].type = DSS_CLK_PCLK; |
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| 178 | + mp->clk_config[i].max_rate = rate; |
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| 195 | 179 | } |
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| 196 | 180 | |
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| 197 | 181 | mp->num_clk = num_clk; |
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