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2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c

 kernel/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h
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@@ -27,9 +27,16 @@
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 #include <linux/hashtable.h>
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 struct dma_fence;
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-struct reservation_object;
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+struct dma_resv;
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 struct amdgpu_device;
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 struct amdgpu_ring;
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+
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+enum amdgpu_sync_mode {
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+	AMDGPU_SYNC_ALWAYS,
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+	AMDGPU_SYNC_NE_OWNER,
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+	AMDGPU_SYNC_EQ_OWNER,
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+	AMDGPU_SYNC_EXPLICIT
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+};
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 /*
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  * Container for fences used to sync command submissions.
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@@ -40,16 +47,14 @@
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 };
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 void amdgpu_sync_create(struct amdgpu_sync *sync);
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-int amdgpu_sync_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync,
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-		      struct dma_fence *f, bool explicit);
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-int amdgpu_sync_resv(struct amdgpu_device *adev,
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-		     struct amdgpu_sync *sync,
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-		     struct reservation_object *resv,
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-		     void *owner,
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-		     bool explicit_sync);
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+int amdgpu_sync_fence(struct amdgpu_sync *sync, struct dma_fence *f);
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+int amdgpu_sync_vm_fence(struct amdgpu_sync *sync, struct dma_fence *fence);
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+int amdgpu_sync_resv(struct amdgpu_device *adev, struct amdgpu_sync *sync,
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+		     struct dma_resv *resv, enum amdgpu_sync_mode mode,
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+		     void *owner);
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 struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync,
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 				     struct amdgpu_ring *ring);
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-struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync, bool *explicit);
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+struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync);
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 int amdgpu_sync_clone(struct amdgpu_sync *source, struct amdgpu_sync *clone);
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 int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr);
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 void amdgpu_sync_free(struct amdgpu_sync *sync);