| .. | .. |
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| 23 | 23 | */ |
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| 24 | 24 | |
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| 25 | 25 | #include <linux/fdtable.h> |
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| 26 | +#include <linux/file.h> |
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| 26 | 27 | #include <linux/pid.h> |
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| 28 | + |
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| 27 | 29 | #include <drm/amdgpu_drm.h> |
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| 30 | + |
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| 28 | 31 | #include "amdgpu.h" |
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| 29 | 32 | |
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| 30 | 33 | #include "amdgpu_vm.h" |
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| 31 | 34 | |
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| 32 | | -enum drm_sched_priority amdgpu_to_sched_priority(int amdgpu_priority) |
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| 35 | +int amdgpu_to_sched_priority(int amdgpu_priority, |
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| 36 | + enum drm_sched_priority *prio) |
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| 33 | 37 | { |
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| 34 | 38 | switch (amdgpu_priority) { |
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| 35 | 39 | case AMDGPU_CTX_PRIORITY_VERY_HIGH: |
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| 36 | | - return DRM_SCHED_PRIORITY_HIGH_HW; |
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| 40 | + *prio = DRM_SCHED_PRIORITY_HIGH; |
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| 41 | + break; |
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| 37 | 42 | case AMDGPU_CTX_PRIORITY_HIGH: |
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| 38 | | - return DRM_SCHED_PRIORITY_HIGH_SW; |
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| 43 | + *prio = DRM_SCHED_PRIORITY_HIGH; |
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| 44 | + break; |
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| 39 | 45 | case AMDGPU_CTX_PRIORITY_NORMAL: |
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| 40 | | - return DRM_SCHED_PRIORITY_NORMAL; |
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| 46 | + *prio = DRM_SCHED_PRIORITY_NORMAL; |
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| 47 | + break; |
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| 41 | 48 | case AMDGPU_CTX_PRIORITY_LOW: |
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| 42 | 49 | case AMDGPU_CTX_PRIORITY_VERY_LOW: |
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| 43 | | - return DRM_SCHED_PRIORITY_LOW; |
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| 50 | + *prio = DRM_SCHED_PRIORITY_MIN; |
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| 51 | + break; |
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| 44 | 52 | case AMDGPU_CTX_PRIORITY_UNSET: |
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| 45 | | - return DRM_SCHED_PRIORITY_UNSET; |
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| 53 | + *prio = DRM_SCHED_PRIORITY_UNSET; |
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| 54 | + break; |
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| 46 | 55 | default: |
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| 47 | 56 | WARN(1, "Invalid context priority %d\n", amdgpu_priority); |
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| 48 | | - return DRM_SCHED_PRIORITY_INVALID; |
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| 57 | + return -EINVAL; |
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| 49 | 58 | } |
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| 59 | + |
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| 60 | + return 0; |
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| 50 | 61 | } |
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| 51 | 62 | |
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| 52 | 63 | static int amdgpu_sched_process_priority_override(struct amdgpu_device *adev, |
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| 53 | 64 | int fd, |
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| 54 | 65 | enum drm_sched_priority priority) |
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| 55 | 66 | { |
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| 56 | | - struct file *filp = fget(fd); |
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| 57 | | - struct drm_file *file; |
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| 67 | + struct fd f = fdget(fd); |
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| 58 | 68 | struct amdgpu_fpriv *fpriv; |
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| 59 | 69 | struct amdgpu_ctx *ctx; |
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| 60 | 70 | uint32_t id; |
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| 71 | + int r; |
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| 61 | 72 | |
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| 62 | | - if (!filp) |
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| 73 | + if (!f.file) |
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| 63 | 74 | return -EINVAL; |
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| 64 | 75 | |
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| 65 | | - file = filp->private_data; |
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| 66 | | - fpriv = file->driver_priv; |
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| 76 | + r = amdgpu_file_to_fpriv(f.file, &fpriv); |
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| 77 | + if (r) { |
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| 78 | + fdput(f); |
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| 79 | + return r; |
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| 80 | + } |
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| 81 | + |
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| 67 | 82 | idr_for_each_entry(&fpriv->ctx_mgr.ctx_handles, ctx, id) |
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| 68 | 83 | amdgpu_ctx_priority_override(ctx, priority); |
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| 69 | 84 | |
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| 70 | | - fput(filp); |
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| 85 | + fdput(f); |
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| 86 | + return 0; |
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| 87 | +} |
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| 88 | + |
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| 89 | +static int amdgpu_sched_context_priority_override(struct amdgpu_device *adev, |
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| 90 | + int fd, |
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| 91 | + unsigned ctx_id, |
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| 92 | + enum drm_sched_priority priority) |
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| 93 | +{ |
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| 94 | + struct fd f = fdget(fd); |
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| 95 | + struct amdgpu_fpriv *fpriv; |
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| 96 | + struct amdgpu_ctx *ctx; |
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| 97 | + int r; |
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| 98 | + |
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| 99 | + if (!f.file) |
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| 100 | + return -EINVAL; |
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| 101 | + |
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| 102 | + r = amdgpu_file_to_fpriv(f.file, &fpriv); |
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| 103 | + if (r) { |
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| 104 | + fdput(f); |
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| 105 | + return r; |
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| 106 | + } |
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| 107 | + |
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| 108 | + ctx = amdgpu_ctx_get(fpriv, ctx_id); |
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| 109 | + |
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| 110 | + if (!ctx) { |
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| 111 | + fdput(f); |
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| 112 | + return -EINVAL; |
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| 113 | + } |
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| 114 | + |
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| 115 | + amdgpu_ctx_priority_override(ctx, priority); |
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| 116 | + amdgpu_ctx_put(ctx); |
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| 117 | + fdput(f); |
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| 71 | 118 | |
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| 72 | 119 | return 0; |
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| 73 | 120 | } |
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| .. | .. |
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| 76 | 123 | struct drm_file *filp) |
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| 77 | 124 | { |
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| 78 | 125 | union drm_amdgpu_sched *args = data; |
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| 79 | | - struct amdgpu_device *adev = dev->dev_private; |
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| 126 | + struct amdgpu_device *adev = drm_to_adev(dev); |
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| 80 | 127 | enum drm_sched_priority priority; |
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| 81 | 128 | int r; |
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| 82 | 129 | |
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| 83 | | - priority = amdgpu_to_sched_priority(args->in.priority); |
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| 84 | | - if (args->in.flags || priority == DRM_SCHED_PRIORITY_INVALID) |
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| 130 | + /* First check the op, then the op's argument. |
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| 131 | + */ |
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| 132 | + switch (args->in.op) { |
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| 133 | + case AMDGPU_SCHED_OP_PROCESS_PRIORITY_OVERRIDE: |
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| 134 | + case AMDGPU_SCHED_OP_CONTEXT_PRIORITY_OVERRIDE: |
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| 135 | + break; |
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| 136 | + default: |
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| 137 | + DRM_ERROR("Invalid sched op specified: %d\n", args->in.op); |
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| 85 | 138 | return -EINVAL; |
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| 139 | + } |
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| 140 | + |
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| 141 | + r = amdgpu_to_sched_priority(args->in.priority, &priority); |
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| 142 | + if (r) |
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| 143 | + return r; |
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| 86 | 144 | |
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| 87 | 145 | switch (args->in.op) { |
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| 88 | 146 | case AMDGPU_SCHED_OP_PROCESS_PRIORITY_OVERRIDE: |
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| .. | .. |
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| 90 | 148 | args->in.fd, |
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| 91 | 149 | priority); |
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| 92 | 150 | break; |
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| 151 | + case AMDGPU_SCHED_OP_CONTEXT_PRIORITY_OVERRIDE: |
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| 152 | + r = amdgpu_sched_context_priority_override(adev, |
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| 153 | + args->in.fd, |
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| 154 | + args->in.ctx_id, |
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| 155 | + priority); |
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| 156 | + break; |
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| 93 | 157 | default: |
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| 94 | | - DRM_ERROR("Invalid sched op specified: %d\n", args->in.op); |
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| 158 | + /* Impossible. |
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| 159 | + */ |
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| 95 | 160 | r = -EINVAL; |
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| 96 | 161 | break; |
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| 97 | 162 | } |
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