| .. | .. |
|---|
| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
|---|
| 1 | 2 | /* Intel i7 core/Nehalem Memory Controller kernel module |
|---|
| 2 | 3 | * |
|---|
| 3 | 4 | * This driver supports the memory controllers found on the Intel |
|---|
| .. | .. |
|---|
| 5 | 6 | * Xeon 55xx and Xeon 56xx also known as Nehalem, Nehalem-EP, Lynnfield |
|---|
| 6 | 7 | * and Westmere-EP. |
|---|
| 7 | 8 | * |
|---|
| 8 | | - * This file may be distributed under the terms of the |
|---|
| 9 | | - * GNU General Public License version 2 only. |
|---|
| 10 | | - * |
|---|
| 11 | 9 | * Copyright (c) 2009-2010 by: |
|---|
| 12 | 10 | * Mauro Carvalho Chehab |
|---|
| 13 | 11 | * |
|---|
| 14 | | - * Red Hat Inc. http://www.redhat.com |
|---|
| 12 | + * Red Hat Inc. https://www.redhat.com |
|---|
| 15 | 13 | * |
|---|
| 16 | 14 | * Forked and adapted from the i5400_edac driver |
|---|
| 17 | 15 | * |
|---|
| .. | .. |
|---|
| 587 | 585 | if (!DIMM_PRESENT(dimm_dod[j])) |
|---|
| 588 | 586 | continue; |
|---|
| 589 | 587 | |
|---|
| 590 | | - dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms, mci->n_layers, |
|---|
| 591 | | - i, j, 0); |
|---|
| 588 | + dimm = edac_get_dimm(mci, i, j, 0); |
|---|
| 592 | 589 | banks = numbank(MC_DOD_NUMBANK(dimm_dod[j])); |
|---|
| 593 | 590 | ranks = numrank(MC_DOD_NUMRANK(dimm_dod[j])); |
|---|
| 594 | 591 | rows = numrow(MC_DOD_NUMROW(dimm_dod[j])); |
|---|
| .. | .. |
|---|
| 724 | 721 | const char *data, size_t count) |
|---|
| 725 | 722 | { |
|---|
| 726 | 723 | struct mem_ctl_info *mci = to_mci(dev); |
|---|
| 727 | | -struct i7core_pvt *pvt = mci->pvt_info; |
|---|
| 724 | + struct i7core_pvt *pvt = mci->pvt_info; |
|---|
| 728 | 725 | unsigned long value; |
|---|
| 729 | 726 | int rc; |
|---|
| 730 | 727 | |
|---|
| .. | .. |
|---|
| 1713 | 1710 | if (uncorrected_error) { |
|---|
| 1714 | 1711 | core_err_cnt = 1; |
|---|
| 1715 | 1712 | if (ripv) |
|---|
| 1716 | | - tp_event = HW_EVENT_ERR_FATAL; |
|---|
| 1717 | | - else |
|---|
| 1718 | 1713 | tp_event = HW_EVENT_ERR_UNCORRECTED; |
|---|
| 1714 | + else |
|---|
| 1715 | + tp_event = HW_EVENT_ERR_FATAL; |
|---|
| 1719 | 1716 | } else { |
|---|
| 1720 | 1717 | tp_event = HW_EVENT_ERR_CORRECTED; |
|---|
| 1721 | 1718 | } |
|---|
| .. | .. |
|---|
| 1816 | 1813 | struct mce *mce = (struct mce *)data; |
|---|
| 1817 | 1814 | struct i7core_dev *i7_dev; |
|---|
| 1818 | 1815 | struct mem_ctl_info *mci; |
|---|
| 1819 | | - struct i7core_pvt *pvt; |
|---|
| 1820 | 1816 | |
|---|
| 1821 | 1817 | i7_dev = get_i7core_dev(mce->socketid); |
|---|
| 1822 | | - if (!i7_dev) |
|---|
| 1818 | + if (!i7_dev || (mce->kflags & MCE_HANDLED_CEC)) |
|---|
| 1823 | 1819 | return NOTIFY_DONE; |
|---|
| 1824 | 1820 | |
|---|
| 1825 | 1821 | mci = i7_dev->mci; |
|---|
| 1826 | | - pvt = mci->pvt_info; |
|---|
| 1827 | 1822 | |
|---|
| 1828 | 1823 | /* |
|---|
| 1829 | 1824 | * Just let mcelog handle it if the error is |
|---|
| .. | .. |
|---|
| 1839 | 1834 | i7core_check_error(mci, mce); |
|---|
| 1840 | 1835 | |
|---|
| 1841 | 1836 | /* Advise mcelog that the errors were handled */ |
|---|
| 1842 | | - return NOTIFY_STOP; |
|---|
| 1837 | + mce->kflags |= MCE_HANDLED_EDAC; |
|---|
| 1838 | + return NOTIFY_OK; |
|---|
| 1843 | 1839 | } |
|---|
| 1844 | 1840 | |
|---|
| 1845 | 1841 | static struct notifier_block i7_mce_dec = { |
|---|
| .. | .. |
|---|
| 2395 | 2391 | |
|---|
| 2396 | 2392 | MODULE_LICENSE("GPL"); |
|---|
| 2397 | 2393 | MODULE_AUTHOR("Mauro Carvalho Chehab"); |
|---|
| 2398 | | -MODULE_AUTHOR("Red Hat Inc. (http://www.redhat.com)"); |
|---|
| 2394 | +MODULE_AUTHOR("Red Hat Inc. (https://www.redhat.com)"); |
|---|
| 2399 | 2395 | MODULE_DESCRIPTION("MC Driver for Intel i7 Core memory controllers - " |
|---|
| 2400 | 2396 | I7CORE_REVISION); |
|---|
| 2401 | 2397 | |
|---|