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2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c

 kernel/drivers/dma-buf/heaps/rk_system_heap.c
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@@ -58,12 +58,11 @@
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 	bool uncached;
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 };
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-#define LOW_ORDER_GFP (GFP_HIGHUSER | __GFP_ZERO | __GFP_COMP)
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-#define MID_ORDER_GFP (LOW_ORDER_GFP | __GFP_NOWARN)
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+#define LOW_ORDER_GFP (GFP_HIGHUSER | __GFP_ZERO)
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 #define HIGH_ORDER_GFP  (((GFP_HIGHUSER | __GFP_ZERO | __GFP_NOWARN \
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 				| __GFP_NORETRY) & ~__GFP_RECLAIM) \
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 				| __GFP_COMP)
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-static gfp_t order_flags[] = {HIGH_ORDER_GFP, MID_ORDER_GFP, LOW_ORDER_GFP};
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+static gfp_t order_flags[] = {HIGH_ORDER_GFP, HIGH_ORDER_GFP, LOW_ORDER_GFP};
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 /*
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  * The selection of the orders used for allocation (1MB, 64K, 4K) is designed
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  * to match with the sizes often found in IOMMUs. Using order 4 pages instead
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@@ -266,7 +265,7 @@
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 	return 0;
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 }
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-static int
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+static int __maybe_unused
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 system_heap_dma_buf_begin_cpu_access_partial(struct dma_buf *dmabuf,
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 					     enum dma_data_direction direction,
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 					     unsigned int offset,
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@@ -296,7 +295,7 @@
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 	return ret;
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 }
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-static int
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+static int __maybe_unused
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 system_heap_dma_buf_end_cpu_access_partial(struct dma_buf *dmabuf,
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 					   enum dma_data_direction direction,
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 					   unsigned int offset,
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@@ -479,8 +478,10 @@
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 	.unmap_dma_buf = system_heap_unmap_dma_buf,
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 	.begin_cpu_access = system_heap_dma_buf_begin_cpu_access,
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 	.end_cpu_access = system_heap_dma_buf_end_cpu_access,
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+#ifdef CONFIG_DMABUF_PARTIAL
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 	.begin_cpu_access_partial = system_heap_dma_buf_begin_cpu_access_partial,
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 	.end_cpu_access_partial = system_heap_dma_buf_end_cpu_access_partial,
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+#endif
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 	.mmap = system_heap_mmap,
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 	.vmap = system_heap_vmap,
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 	.vunmap = system_heap_vunmap,
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@@ -702,9 +703,6 @@
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 	if (!heap_dev)
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 		return -EINVAL;
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-
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-	/* Set a dma ops(swiotlb) for the heap device. */
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-	arch_setup_dma_ops(heap_dev, 0, 0, NULL, 0);
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 	dma_coerce_mask_and_coherent(heap_dev, DMA_BIT_MASK(64));
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