| .. | .. |
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| 1 | 1 | // SPDX-License-Identifier: GPL-2.0 |
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| 2 | | -/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ |
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| 2 | +/* Copyright (C) 2012-2019 ARM Limited (or its affiliates). */ |
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| 3 | 3 | |
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| 4 | 4 | #include "cc_driver.h" |
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| 5 | 5 | #include "cc_sram_mgr.h" |
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| 6 | | - |
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| 7 | | -/** |
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| 8 | | - * struct cc_sram_ctx -Internal RAM context manager |
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| 9 | | - * @sram_free_offset: the offset to the non-allocated area |
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| 10 | | - */ |
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| 11 | | -struct cc_sram_ctx { |
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| 12 | | - cc_sram_addr_t sram_free_offset; |
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| 13 | | -}; |
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| 14 | | - |
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| 15 | | -/** |
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| 16 | | - * cc_sram_mgr_fini() - Cleanup SRAM pool. |
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| 17 | | - * |
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| 18 | | - * @drvdata: Associated device driver context |
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| 19 | | - */ |
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| 20 | | -void cc_sram_mgr_fini(struct cc_drvdata *drvdata) |
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| 21 | | -{ |
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| 22 | | - /* Free "this" context */ |
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| 23 | | - kfree(drvdata->sram_mgr_handle); |
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| 24 | | -} |
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| 25 | 6 | |
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| 26 | 7 | /** |
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| 27 | 8 | * cc_sram_mgr_init() - Initializes SRAM pool. |
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| .. | .. |
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| 29 | 10 | * Returns zero for success, negative value otherwise. |
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| 30 | 11 | * |
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| 31 | 12 | * @drvdata: Associated device driver context |
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| 13 | + * |
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| 14 | + * Return: |
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| 15 | + * 0 for success, negative error code for failure. |
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| 32 | 16 | */ |
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| 33 | 17 | int cc_sram_mgr_init(struct cc_drvdata *drvdata) |
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| 34 | 18 | { |
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| 35 | | - struct cc_sram_ctx *ctx; |
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| 36 | | - dma_addr_t start = 0; |
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| 19 | + u32 start = 0; |
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| 37 | 20 | struct device *dev = drvdata_to_dev(drvdata); |
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| 38 | 21 | |
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| 39 | 22 | if (drvdata->hw_rev < CC_HW_REV_712) { |
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| 40 | 23 | /* Pool starts after ROM bytes */ |
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| 41 | | - start = (dma_addr_t)cc_ioread(drvdata, |
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| 42 | | - CC_REG(HOST_SEP_SRAM_THRESHOLD)); |
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| 43 | | - |
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| 24 | + start = cc_ioread(drvdata, CC_REG(HOST_SEP_SRAM_THRESHOLD)); |
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| 44 | 25 | if ((start & 0x3) != 0) { |
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| 45 | | - dev_err(dev, "Invalid SRAM offset %pad\n", &start); |
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| 26 | + dev_err(dev, "Invalid SRAM offset 0x%x\n", start); |
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| 46 | 27 | return -EINVAL; |
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| 47 | 28 | } |
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| 48 | 29 | } |
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| 49 | 30 | |
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| 50 | | - /* Allocate "this" context */ |
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| 51 | | - ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); |
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| 52 | | - |
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| 53 | | - if (!ctx) |
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| 54 | | - return -ENOMEM; |
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| 55 | | - |
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| 56 | | - ctx->sram_free_offset = start; |
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| 57 | | - drvdata->sram_mgr_handle = ctx; |
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| 58 | | - |
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| 31 | + drvdata->sram_free_offset = start; |
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| 59 | 32 | return 0; |
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| 60 | 33 | } |
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| 61 | 34 | |
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| 62 | | -/*! |
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| 63 | | - * Allocated buffer from SRAM pool. |
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| 64 | | - * Note: Caller is responsible to free the LAST allocated buffer. |
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| 65 | | - * This function does not taking care of any fragmentation may occur |
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| 66 | | - * by the order of calls to alloc/free. |
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| 35 | +/** |
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| 36 | + * cc_sram_alloc() - Allocate buffer from SRAM pool. |
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| 67 | 37 | * |
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| 68 | | - * \param drvdata |
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| 69 | | - * \param size The requested bytes to allocate |
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| 38 | + * @drvdata: Associated device driver context |
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| 39 | + * @size: The requested numer of bytes to allocate |
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| 40 | + * |
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| 41 | + * Return: |
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| 42 | + * Address offset in SRAM or NULL_SRAM_ADDR for failure. |
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| 70 | 43 | */ |
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| 71 | | -cc_sram_addr_t cc_sram_alloc(struct cc_drvdata *drvdata, u32 size) |
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| 44 | +u32 cc_sram_alloc(struct cc_drvdata *drvdata, u32 size) |
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| 72 | 45 | { |
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| 73 | | - struct cc_sram_ctx *smgr_ctx = drvdata->sram_mgr_handle; |
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| 74 | 46 | struct device *dev = drvdata_to_dev(drvdata); |
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| 75 | | - cc_sram_addr_t p; |
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| 47 | + u32 p; |
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| 76 | 48 | |
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| 77 | 49 | if ((size & 0x3)) { |
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| 78 | 50 | dev_err(dev, "Requested buffer size (%u) is not multiple of 4", |
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| 79 | 51 | size); |
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| 80 | 52 | return NULL_SRAM_ADDR; |
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| 81 | 53 | } |
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| 82 | | - if (size > (CC_CC_SRAM_SIZE - smgr_ctx->sram_free_offset)) { |
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| 83 | | - dev_err(dev, "Not enough space to allocate %u B (at offset %llu)\n", |
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| 84 | | - size, smgr_ctx->sram_free_offset); |
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| 54 | + if (size > (CC_CC_SRAM_SIZE - drvdata->sram_free_offset)) { |
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| 55 | + dev_err(dev, "Not enough space to allocate %u B (at offset %u)\n", |
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| 56 | + size, drvdata->sram_free_offset); |
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| 85 | 57 | return NULL_SRAM_ADDR; |
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| 86 | 58 | } |
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| 87 | 59 | |
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| 88 | | - p = smgr_ctx->sram_free_offset; |
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| 89 | | - smgr_ctx->sram_free_offset += size; |
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| 90 | | - dev_dbg(dev, "Allocated %u B @ %u\n", size, (unsigned int)p); |
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| 60 | + p = drvdata->sram_free_offset; |
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| 61 | + drvdata->sram_free_offset += size; |
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| 62 | + dev_dbg(dev, "Allocated %u B @ %u\n", size, p); |
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| 91 | 63 | return p; |
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| 92 | 64 | } |
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| 93 | 65 | |
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| .. | .. |
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| 98 | 70 | * |
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| 99 | 71 | * @src: A pointer to array of words to set as consts. |
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| 100 | 72 | * @dst: The target SRAM buffer to set into |
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| 101 | | - * @nelements: The number of words in "src" array |
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| 73 | + * @nelement: The number of words in "src" array |
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| 102 | 74 | * @seq: A pointer to the given IN/OUT descriptor sequence |
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| 103 | 75 | * @seq_len: A pointer to the given IN/OUT sequence length |
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| 104 | 76 | */ |
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| 105 | | -void cc_set_sram_desc(const u32 *src, cc_sram_addr_t dst, |
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| 106 | | - unsigned int nelement, struct cc_hw_desc *seq, |
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| 107 | | - unsigned int *seq_len) |
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| 77 | +void cc_set_sram_desc(const u32 *src, u32 dst, unsigned int nelement, |
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| 78 | + struct cc_hw_desc *seq, unsigned int *seq_len) |
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| 108 | 79 | { |
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| 109 | 80 | u32 i; |
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| 110 | 81 | unsigned int idx = *seq_len; |
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