add stmac read mac form eeprom

hc

2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c

 kernel/drivers/crypto/caam/qi.h
..
..
@@ -3,7 +3,7 @@
3
3
  * Public definitions for the CAAM/QI (Queue Interface) backend.
4
4
  *
5
5
  * Copyright 2013-2016 Freescale Semiconductor, Inc.
6
- * Copyright 2016-2017 NXP
6
+ * Copyright 2016-2017, 2020 NXP
7
7
  */
8
8
 
9
9
 #ifndef __QI_H__
..
..
@@ -13,32 +13,6 @@
13
13
 #include "compat.h"
14
14
 #include "desc.h"
15
15
 #include "desc_constr.h"
16
-
17
-/*
18
- * CAAM hardware constructs a job descriptor which points to a shared descriptor
19
- * (as pointed by context_a of to-CAAM FQ).
20
- * When the job descriptor is executed by DECO, the whole job descriptor
21
- * together with shared descriptor gets loaded in DECO buffer, which is
22
- * 64 words (each 32-bit) long.
23
- *
24
- * The job descriptor constructed by CAAM hardware has the following layout:
25
- *
26
- *	HEADER		(1 word)
27
- *	Shdesc ptr	(1 or 2 words)
28
- *	SEQ_OUT_PTR	(1 word)
29
- *	Out ptr		(1 or 2 words)
30
- *	Out length	(1 word)
31
- *	SEQ_IN_PTR	(1 word)
32
- *	In ptr		(1 or 2 words)
33
- *	In length	(1 word)
34
- *
35
- * The shdesc ptr is used to fetch shared descriptor contents into DECO buffer.
36
- *
37
- * Apart from shdesc contents, the total number of words that get loaded in DECO
38
- * buffer are '8' or '11'. The remaining words in DECO buffer can be used for
39
- * storing shared descriptor.
40
- */
41
-#define MAX_SDLEN	((CAAM_DESC_BYTES_MAX - DESC_JOB_IO_LEN) / CAAM_CMD_SZ)
42
16
 
43
17
 /* Length of a single buffer in the QI driver memory cache */
44
18
 #define CAAM_QI_MEMCACHE_SIZE	768
..
..
@@ -62,7 +36,6 @@
62
36
 enum optype {
63
37
 	ENCRYPT,
64
38
 	DECRYPT,
65
-	GIVENCRYPT,
66
39
 	NUM_OP
67
40
 };
68
41
 
..
..
@@ -79,6 +52,7 @@
79
52
  * @context_a: shared descriptor dma address
80
53
  * @req_fq: to-CAAM request frame queue
81
54
  * @rsp_fq: from-CAAM response frame queue
55
+ * @refcnt: reference counter incremented for each frame enqueued in to-CAAM FQ
82
56
  * @cpu: cpu on which to receive CAAM response
83
57
  * @op_type: operation type
84
58
  * @qidev: device pointer for CAAM/QI backend
..
..
@@ -89,6 +63,7 @@
89
63
 	dma_addr_t context_a;
90
64
 	struct qman_fq *req_fq;
91
65
 	struct qman_fq *rsp_fq;
66
+	refcount_t refcnt;
92
67
 	int cpu;
93
68
 	enum optype op_type;
94
69
 	struct device *qidev;
..
..
@@ -174,7 +149,6 @@
174
149
 void caam_drv_ctx_rel(struct caam_drv_ctx *drv_ctx);
175
150
 
176
151
 int caam_qi_init(struct platform_device *pdev);
177
-void caam_qi_shutdown(struct device *dev);
178
152
 
179
153
 /**
180
154
  * qi_cache_alloc - Allocate buffers from CAAM-QI cache