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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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1 | 2 | /* |
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2 | 3 | * RNG driver for Freescale RNGC |
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3 | 4 | * |
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4 | 5 | * Copyright (C) 2008-2012 Freescale Semiconductor, Inc. |
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5 | 6 | * Copyright (C) 2017 Martin Kaiser <martin@kaiser.cx> |
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6 | | - * |
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7 | | - * The code contained herein is licensed under the GNU General Public |
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8 | | - * License. You may obtain a copy of the GNU General Public License |
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9 | | - * Version 2 or later at the following locations: |
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10 | | - * |
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11 | | - * http://www.opensource.org/licenses/gpl-license.html |
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12 | | - * http://www.gnu.org/copyleft/gpl.html |
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13 | 7 | */ |
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14 | 8 | |
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15 | 9 | #include <linux/module.h> |
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.. | .. |
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24 | 18 | #include <linux/completion.h> |
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25 | 19 | #include <linux/io.h> |
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26 | 20 | |
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| 21 | +#define RNGC_VER_ID 0x0000 |
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27 | 22 | #define RNGC_COMMAND 0x0004 |
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28 | 23 | #define RNGC_CONTROL 0x0008 |
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29 | 24 | #define RNGC_STATUS 0x000C |
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30 | 25 | #define RNGC_ERROR 0x0010 |
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31 | 26 | #define RNGC_FIFO 0x0014 |
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| 27 | + |
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| 28 | +/* the fields in the ver id register */ |
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| 29 | +#define RNGC_TYPE_SHIFT 28 |
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| 30 | +#define RNGC_VER_MAJ_SHIFT 8 |
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| 31 | + |
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| 32 | +/* the rng_type field */ |
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| 33 | +#define RNGC_TYPE_RNGB 0x1 |
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| 34 | +#define RNGC_TYPE_RNGC 0x2 |
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| 35 | + |
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32 | 36 | |
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33 | 37 | #define RNGC_CMD_CLR_ERR 0x00000020 |
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34 | 38 | #define RNGC_CMD_CLR_INT 0x00000010 |
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.. | .. |
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37 | 41 | |
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38 | 42 | #define RNGC_CTRL_MASK_ERROR 0x00000040 |
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39 | 43 | #define RNGC_CTRL_MASK_DONE 0x00000020 |
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| 44 | +#define RNGC_CTRL_AUTO_SEED 0x00000010 |
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40 | 45 | |
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41 | 46 | #define RNGC_STATUS_ERROR 0x00010000 |
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42 | 47 | #define RNGC_STATUS_FIFO_LEVEL_MASK 0x00000f00 |
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.. | .. |
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106 | 111 | writel(cmd | RNGC_CMD_SELF_TEST, rngc->base + RNGC_COMMAND); |
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107 | 112 | |
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108 | 113 | ret = wait_for_completion_timeout(&rngc->rng_op_done, RNGC_TIMEOUT); |
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109 | | - if (!ret) { |
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110 | | - imx_rngc_irq_mask_clear(rngc); |
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| 114 | + imx_rngc_irq_mask_clear(rngc); |
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| 115 | + if (!ret) |
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111 | 116 | return -ETIMEDOUT; |
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112 | | - } |
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113 | 117 | |
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114 | | - if (rngc->err_reg != 0) { |
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115 | | - imx_rngc_irq_mask_clear(rngc); |
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116 | | - return -EIO; |
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117 | | - } |
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118 | | - |
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119 | | - return 0; |
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| 118 | + return rngc->err_reg ? -EIO : 0; |
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120 | 119 | } |
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121 | 120 | |
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122 | 121 | static int imx_rngc_read(struct hwrng *rng, void *data, size_t max, bool wait) |
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.. | .. |
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173 | 172 | static int imx_rngc_init(struct hwrng *rng) |
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174 | 173 | { |
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175 | 174 | struct imx_rngc *rngc = container_of(rng, struct imx_rngc, rng); |
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176 | | - u32 cmd; |
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| 175 | + u32 cmd, ctrl; |
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177 | 176 | int ret; |
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178 | 177 | |
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179 | 178 | /* clear error */ |
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180 | 179 | cmd = readl(rngc->base + RNGC_COMMAND); |
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181 | 180 | writel(cmd | RNGC_CMD_CLR_ERR, rngc->base + RNGC_COMMAND); |
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182 | 181 | |
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| 182 | + imx_rngc_irq_unmask(rngc); |
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| 183 | + |
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183 | 184 | /* create seed, repeat while there is some statistical error */ |
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184 | 185 | do { |
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185 | | - imx_rngc_irq_unmask(rngc); |
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186 | | - |
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187 | 186 | /* seed creation */ |
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188 | 187 | cmd = readl(rngc->base + RNGC_COMMAND); |
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189 | 188 | writel(cmd | RNGC_CMD_SEED, rngc->base + RNGC_COMMAND); |
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.. | .. |
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192 | 191 | RNGC_TIMEOUT); |
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193 | 192 | |
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194 | 193 | if (!ret) { |
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195 | | - imx_rngc_irq_mask_clear(rngc); |
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196 | | - return -ETIMEDOUT; |
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| 194 | + ret = -ETIMEDOUT; |
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| 195 | + goto err; |
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197 | 196 | } |
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198 | 197 | |
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199 | 198 | } while (rngc->err_reg == RNGC_ERROR_STATUS_STAT_ERR); |
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200 | 199 | |
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201 | | - return rngc->err_reg ? -EIO : 0; |
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| 200 | + if (rngc->err_reg) { |
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| 201 | + ret = -EIO; |
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| 202 | + goto err; |
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| 203 | + } |
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| 204 | + |
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| 205 | + /* |
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| 206 | + * enable automatic seeding, the rngc creates a new seed automatically |
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| 207 | + * after serving 2^20 random 160-bit words |
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| 208 | + */ |
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| 209 | + ctrl = readl(rngc->base + RNGC_CONTROL); |
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| 210 | + ctrl |= RNGC_CTRL_AUTO_SEED; |
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| 211 | + writel(ctrl, rngc->base + RNGC_CONTROL); |
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| 212 | + |
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| 213 | + /* |
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| 214 | + * if initialisation was successful, we keep the interrupt |
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| 215 | + * unmasked until imx_rngc_cleanup is called |
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| 216 | + * we mask the interrupt ourselves if we return an error |
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| 217 | + */ |
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| 218 | + return 0; |
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| 219 | + |
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| 220 | +err: |
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| 221 | + imx_rngc_irq_mask_clear(rngc); |
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| 222 | + return ret; |
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| 223 | +} |
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| 224 | + |
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| 225 | +static void imx_rngc_cleanup(struct hwrng *rng) |
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| 226 | +{ |
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| 227 | + struct imx_rngc *rngc = container_of(rng, struct imx_rngc, rng); |
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| 228 | + |
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| 229 | + imx_rngc_irq_mask_clear(rngc); |
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202 | 230 | } |
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203 | 231 | |
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204 | 232 | static int imx_rngc_probe(struct platform_device *pdev) |
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205 | 233 | { |
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206 | 234 | struct imx_rngc *rngc; |
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207 | | - struct resource *res; |
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208 | 235 | int ret; |
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209 | 236 | int irq; |
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| 237 | + u32 ver_id; |
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| 238 | + u8 rng_type; |
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210 | 239 | |
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211 | 240 | rngc = devm_kzalloc(&pdev->dev, sizeof(*rngc), GFP_KERNEL); |
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212 | 241 | if (!rngc) |
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213 | 242 | return -ENOMEM; |
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214 | 243 | |
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215 | | - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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216 | | - rngc->base = devm_ioremap_resource(&pdev->dev, res); |
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| 244 | + rngc->base = devm_platform_ioremap_resource(pdev, 0); |
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217 | 245 | if (IS_ERR(rngc->base)) |
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218 | 246 | return PTR_ERR(rngc->base); |
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219 | 247 | |
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.. | .. |
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233 | 261 | if (ret) |
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234 | 262 | return ret; |
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235 | 263 | |
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236 | | - ret = devm_request_irq(&pdev->dev, |
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237 | | - irq, imx_rngc_irq, 0, pdev->name, (void *)rngc); |
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238 | | - if (ret) { |
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239 | | - dev_err(rngc->dev, "Can't get interrupt working.\n"); |
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| 264 | + ver_id = readl(rngc->base + RNGC_VER_ID); |
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| 265 | + rng_type = ver_id >> RNGC_TYPE_SHIFT; |
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| 266 | + /* |
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| 267 | + * This driver supports only RNGC and RNGB. (There's a different |
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| 268 | + * driver for RNGA.) |
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| 269 | + */ |
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| 270 | + if (rng_type != RNGC_TYPE_RNGC && rng_type != RNGC_TYPE_RNGB) { |
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| 271 | + ret = -ENODEV; |
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240 | 272 | goto err; |
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241 | 273 | } |
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242 | 274 | |
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.. | .. |
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245 | 277 | rngc->rng.name = pdev->name; |
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246 | 278 | rngc->rng.init = imx_rngc_init; |
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247 | 279 | rngc->rng.read = imx_rngc_read; |
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| 280 | + rngc->rng.cleanup = imx_rngc_cleanup; |
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| 281 | + rngc->rng.quality = 19; |
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248 | 282 | |
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249 | 283 | rngc->dev = &pdev->dev; |
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250 | 284 | platform_set_drvdata(pdev, rngc); |
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251 | 285 | |
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252 | 286 | imx_rngc_irq_mask_clear(rngc); |
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253 | 287 | |
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| 288 | + ret = devm_request_irq(&pdev->dev, |
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| 289 | + irq, imx_rngc_irq, 0, pdev->name, (void *)rngc); |
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| 290 | + if (ret) { |
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| 291 | + dev_err(rngc->dev, "Can't get interrupt working.\n"); |
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| 292 | + return ret; |
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| 293 | + } |
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| 294 | + |
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254 | 295 | if (self_test) { |
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255 | 296 | ret = imx_rngc_self_test(rngc); |
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256 | 297 | if (ret) { |
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257 | | - dev_err(rngc->dev, "FSL RNGC self test failed.\n"); |
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| 298 | + dev_err(rngc->dev, "self test failed\n"); |
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258 | 299 | goto err; |
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259 | 300 | } |
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260 | 301 | } |
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261 | 302 | |
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262 | 303 | ret = hwrng_register(&rngc->rng); |
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263 | 304 | if (ret) { |
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264 | | - dev_err(&pdev->dev, "FSL RNGC registering failed (%d)\n", ret); |
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| 305 | + dev_err(&pdev->dev, "hwrng registration failed\n"); |
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265 | 306 | goto err; |
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266 | 307 | } |
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267 | 308 | |
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268 | | - dev_info(&pdev->dev, "Freescale RNGC registered.\n"); |
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| 309 | + dev_info(&pdev->dev, |
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| 310 | + "Freescale RNG%c registered (HW revision %d.%02d)\n", |
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| 311 | + rng_type == RNGC_TYPE_RNGB ? 'B' : 'C', |
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| 312 | + (ver_id >> RNGC_VER_MAJ_SHIFT) & 0xff, ver_id & 0xff); |
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269 | 313 | return 0; |
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270 | 314 | |
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271 | 315 | err: |
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