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hc
2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c 
 kernel/drivers/ata/ahci.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23  *  ahci.c - AHCI SATA support
34  *
....@@ -7,29 +8,12 @@
78  *
89  *  Copyright 2004-2005 Red Hat, Inc.
910  *
10
- *
11
- *  This program is free software; you can redistribute it and/or modify
12
- *  it under the terms of the GNU General Public License as published by
13
- *  the Free Software Foundation; either version 2, or (at your option)
14
- *  any later version.
15
- *
16
- *  This program is distributed in the hope that it will be useful,
17
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
18
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19
- *  GNU General Public License for more details.
20
- *
21
- *  You should have received a copy of the GNU General Public License
22
- *  along with this program; see the file COPYING.  If not, write to
23
- *  the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
24
- *
25
- *
2611  * libata documentation is available via 'make {ps|pdf}docs',
2712  * as Documentation/driver-api/libata.rst
2813  *
2914  * AHCI hardware documentation:
3015  * http://www.intel.com/technology/serialata/pdf/rev1_0.pdf
3116  * http://www.intel.com/technology/serialata/pdf/rev1_1.pdf
32
- *
3317  */
3418 
3519 #include <linux/kernel.h>
....@@ -56,6 +40,7 @@
5640 enum {
5741 	AHCI_PCI_BAR_STA2X11	= 0,
5842 	AHCI_PCI_BAR_CAVIUM	= 0,
43
+	AHCI_PCI_BAR_LOONGSON	= 0,
5944 	AHCI_PCI_BAR_ENMOTUS	= 2,
6045 	AHCI_PCI_BAR_CAVIUM_GEN5	= 4,
6146 	AHCI_PCI_BAR_STANDARD	= 5,
....@@ -72,6 +57,7 @@
7257 	board_ahci_yes_fbs,
7358 
7459 	/* board IDs for specific chipsets in alphabetical order */
60
+	board_ahci_al,
7561 	board_ahci_avn,
7662 	board_ahci_mcp65,
7763 	board_ahci_mcp77,
....@@ -184,6 +170,13 @@
184170 		.port_ops	= &ahci_ops,
185171 	},
186172 	/* by chipsets */
173
+	[board_ahci_al] = {
174
+		AHCI_HFLAGS	(AHCI_HFLAG_NO_PMP | AHCI_HFLAG_NO_MSI),
175
+		.flags		= AHCI_FLAG_COMMON,
176
+		.pio_mask	= ATA_PIO4,
177
+		.udma_mask	= ATA_UDMA6,
178
+		.port_ops	= &ahci_ops,
179
+	},
187180 	[board_ahci_avn] = {
188181 		.flags		= AHCI_FLAG_COMMON,
189182 		.pio_mask	= ATA_PIO4,
....@@ -253,6 +246,7 @@
253246 
254247 static const struct pci_device_id ahci_pci_tbl[] = {
255248 	/* Intel */
249
+	{ PCI_VDEVICE(INTEL, 0x06d6), board_ahci }, /* Comet Lake PCH-H RAID */
256250 	{ PCI_VDEVICE(INTEL, 0x2652), board_ahci }, /* ICH6 */
257251 	{ PCI_VDEVICE(INTEL, 0x2653), board_ahci }, /* ICH6M */
258252 	{ PCI_VDEVICE(INTEL, 0x27c1), board_ahci }, /* ICH7 */
....@@ -366,6 +360,10 @@
366360 	{ PCI_VDEVICE(INTEL, 0x1f3f), board_ahci_avn }, /* Avoton RAID */
367361 	{ PCI_VDEVICE(INTEL, 0x2823), board_ahci }, /* Wellsburg RAID */
368362 	{ PCI_VDEVICE(INTEL, 0x2827), board_ahci }, /* Wellsburg RAID */
363
+	{ PCI_VDEVICE(INTEL, 0x43d4), board_ahci }, /* Rocket Lake PCH-H RAID */
364
+	{ PCI_VDEVICE(INTEL, 0x43d5), board_ahci }, /* Rocket Lake PCH-H RAID */
365
+	{ PCI_VDEVICE(INTEL, 0x43d6), board_ahci }, /* Rocket Lake PCH-H RAID */
366
+	{ PCI_VDEVICE(INTEL, 0x43d7), board_ahci }, /* Rocket Lake PCH-H RAID */
369367 	{ PCI_VDEVICE(INTEL, 0x8d02), board_ahci }, /* Wellsburg AHCI */
370368 	{ PCI_VDEVICE(INTEL, 0x8d04), board_ahci }, /* Wellsburg RAID */
371369 	{ PCI_VDEVICE(INTEL, 0x8d06), board_ahci }, /* Wellsburg RAID */
....@@ -410,11 +408,14 @@
410408 	{ PCI_VDEVICE(INTEL, 0xa256), board_ahci }, /* Lewisburg RAID*/
411409 	{ PCI_VDEVICE(INTEL, 0xa356), board_ahci }, /* Cannon Lake PCH-H RAID */
412410 	{ PCI_VDEVICE(INTEL, 0x06d7), board_ahci }, /* Comet Lake-H RAID */
411
+	{ PCI_VDEVICE(INTEL, 0xa386), board_ahci }, /* Comet Lake PCH-V RAID */
413412 	{ PCI_VDEVICE(INTEL, 0x0f22), board_ahci_mobile }, /* Bay Trail AHCI */
414413 	{ PCI_VDEVICE(INTEL, 0x0f23), board_ahci_mobile }, /* Bay Trail AHCI */
415414 	{ PCI_VDEVICE(INTEL, 0x22a3), board_ahci_mobile }, /* Cherry Tr. AHCI */
416415 	{ PCI_VDEVICE(INTEL, 0x5ae3), board_ahci_mobile }, /* ApolloLake AHCI */
417416 	{ PCI_VDEVICE(INTEL, 0x34d3), board_ahci_mobile }, /* Ice Lake LP AHCI */
417
+	{ PCI_VDEVICE(INTEL, 0x02d3), board_ahci_mobile }, /* Comet Lake PCH-U AHCI */
418
+	{ PCI_VDEVICE(INTEL, 0x02d7), board_ahci_mobile }, /* Comet Lake PCH RAID */
418419 
419420 	/* JMicron 360/1/3/5/6, match class to avoid IDE function */
420421 	{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
....@@ -433,6 +434,11 @@
433434 	{ PCI_VDEVICE(ATI, 0x4394), board_ahci_sb700 }, /* ATI SB700/800 */
434435 	{ PCI_VDEVICE(ATI, 0x4395), board_ahci_sb700 }, /* ATI SB700/800 */
435436 
437
+	/* Amazon's Annapurna Labs support */
438
+	{ PCI_DEVICE(PCI_VENDOR_ID_AMAZON_ANNAPURNA_LABS, 0x0031),
439
+		.class = PCI_CLASS_STORAGE_SATA_AHCI,
440
+		.class_mask = 0xffffff,
441
+		board_ahci_al },
436442 	/* AMD */
437443 	{ PCI_VDEVICE(AMD, 0x7800), board_ahci }, /* AMD Hudson-2 */
438444 	{ PCI_VDEVICE(AMD, 0x7900), board_ahci }, /* AMD CZ */
....@@ -593,6 +599,9 @@
593599 
594600 	/* Enmotus */
595601 	{ PCI_DEVICE(0x1c44, 0x8000), board_ahci },
602
+
603
+	/* Loongson */
604
+	{ PCI_VDEVICE(LOONGSON, 0x7a08), board_ahci },
596605 
597606 	/* Generic, PCI class code for AHCI */
598607 	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
....@@ -803,8 +812,7 @@
803812 				(sstatus & 0xf) != 1)
804813 			break;
805814 
806
-		ata_link_printk(link, KERN_INFO, "avn bounce port%d\n",
807
-				port);
815
+		ata_link_info(link,  "avn bounce port%d\n", port);
808816 
809817 		pci_read_config_word(pdev, 0x92, &val);
810818 		val &= ~(1 << port);
....@@ -909,40 +917,23 @@
909917 
910918 static int ahci_configure_dma_masks(struct pci_dev *pdev, int using_dac)
911919 {
920
+	const int dma_bits = using_dac ? 64 : 32;
912921 	int rc;
913922 
914923 	/*
915924 	 * If the device fixup already set the dma_mask to some non-standard
916925 	 * value, don't extend it here. This happens on STA2X11, for example.
926
+	 *
927
+	 * XXX: manipulating the DMA mask from platform code is completely
928
+	 * bogus, platform code should use dev->bus_dma_limit instead..
917929 	 */
918930 	if (pdev->dma_mask && pdev->dma_mask < DMA_BIT_MASK(32))
919931 		return 0;
920932 
921
-	if (using_dac &&
922
-	    !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
923
-		rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
924
-		if (rc) {
925
-			rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
926
-			if (rc) {
927
-				dev_err(&pdev->dev,
928
-					"64-bit DMA enable failed\n");
929
-				return rc;
930
-			}
931
-		}
932
-	} else {
933
-		rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
934
-		if (rc) {
935
-			dev_err(&pdev->dev, "32-bit DMA enable failed\n");
936
-			return rc;
937
-		}
938
-		rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
939
-		if (rc) {
940
-			dev_err(&pdev->dev,
941
-				"32-bit consistent DMA enable failed\n");
942
-			return rc;
943
-		}
944
-	}
945
-	return 0;
933
+	rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(dma_bits));
934
+	if (rc)
935
+		dev_err(&pdev->dev, "DMA enable failed\n");
936
+	return rc;
946937 }
947938 
948939 static void ahci_pci_print_info(struct ata_host *host)
....@@ -1510,7 +1501,7 @@
15101501 static void ahci_remap_check(struct pci_dev *pdev, int bar,
15111502 		struct ahci_host_priv *hpriv)
15121503 {
1513
-	int i, count = 0;
1504
+	int i;
15141505 	u32 cap;
15151506 
15161507 	/*
....@@ -1531,13 +1522,14 @@
15311522 			continue;
15321523 
15331524 		/* We've found a remapped device */
1534
-		count++;
1525
+		hpriv->remapped_nvme++;
15351526 	}
15361527 
1537
-	if (!count)
1528
+	if (!hpriv->remapped_nvme)
15381529 		return;
15391530 
1540
-	dev_warn(&pdev->dev, "Found %d remapped NVMe devices.\n", count);
1531
+	dev_warn(&pdev->dev, "Found %u remapped NVMe devices.\n",
1532
+		 hpriv->remapped_nvme);
15411533 	dev_warn(&pdev->dev,
15421534 		 "Switch your BIOS from RAID to AHCI mode to use them.\n");
15431535 
....@@ -1657,6 +1649,18 @@
16571649 	}
16581650 }
16591651 
1652
+static ssize_t remapped_nvme_show(struct device *dev,
1653
+				  struct device_attribute *attr,
1654
+				  char *buf)
1655
+{
1656
+	struct ata_host *host = dev_get_drvdata(dev);
1657
+	struct ahci_host_priv *hpriv = host->private_data;
1658
+
1659
+	return sprintf(buf, "%u\n", hpriv->remapped_nvme);
1660
+}
1661
+
1662
+static DEVICE_ATTR_RO(remapped_nvme);
1663
+
16601664 static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
16611665 {
16621666 	unsigned int board_id = ent->driver_data;
....@@ -1702,6 +1706,9 @@
17021706 			ahci_pci_bar = AHCI_PCI_BAR_CAVIUM;
17031707 		if (pdev->device == 0xa084)
17041708 			ahci_pci_bar = AHCI_PCI_BAR_CAVIUM_GEN5;
1709
+	} else if (pdev->vendor == PCI_VENDOR_ID_LOONGSON) {
1710
+		if (pdev->device == 0x7a08)
1711
+			ahci_pci_bar = AHCI_PCI_BAR_LOONGSON;
17051712 	}
17061713 
17071714 	/* acquire resources */
....@@ -1757,11 +1764,20 @@
17571764 	/* detect remapped nvme devices */
17581765 	ahci_remap_check(pdev, ahci_pci_bar, hpriv);
17591766 
1767
+	sysfs_add_file_to_group(&pdev->dev.kobj,
1768
+				&dev_attr_remapped_nvme.attr,
1769
+				NULL);
1770
+
17601771 	/* must set flag prior to save config in order to take effect */
17611772 	if (ahci_broken_devslp(pdev))
17621773 		hpriv->flags |= AHCI_HFLAG_NO_DEVSLP;
17631774 
17641775 #ifdef CONFIG_ARM64
1776
+	if (pdev->vendor == PCI_VENDOR_ID_HUAWEI &&
1777
+	    pdev->device == 0xa235 &&
1778
+	    pdev->revision < 0x30)
1779
+		hpriv->flags |= AHCI_HFLAG_NO_SXS;
1780
+
17651781 	if (pdev->vendor == 0x177d && pdev->device == 0xa01c)
17661782 		hpriv->irq_handler = ahci_thunderx_irq_handler;
17671783 #endif
....@@ -1908,6 +1924,9 @@
19081924 
19091925 static void ahci_remove_one(struct pci_dev *pdev)
19101926 {
1927
+	sysfs_remove_file_from_group(&pdev->dev.kobj,
1928
+				     &dev_attr_remapped_nvme.attr,
1929
+				     NULL);
19111930 	pm_runtime_get_noresume(&pdev->dev);
19121931 	ata_pci_remove_one(pdev);
19131932 }