hc
2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c
kernel/arch/xtensa/kernel/pci.c
....@@ -1,12 +1,8 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23 * arch/xtensa/kernel/pci.c
34 *
45 * PCI bios-type initialisation for PCI machines
5
- *
6
- * This program is free software; you can redistribute it and/or modify it
7
- * under the terms of the GNU General Public License as published by the
8
- * Free Software Foundation; either version 2 of the License, or (at your
9
- * option) any later version.
106 *
117 * Copyright (C) 2001-2005 Tensilica Inc.
128 *
....@@ -14,7 +10,6 @@
1410 * IO functions copied from sparc.
1511 *
1612 * Chris Zankel <chris@zankel.net>
17
- *
1813 */
1914
2015 #include <linux/kernel.h>
....@@ -24,27 +19,10 @@
2419 #include <linux/init.h>
2520 #include <linux/sched.h>
2621 #include <linux/errno.h>
27
-#include <linux/bootmem.h>
22
+#include <linux/memblock.h>
2823
2924 #include <asm/pci-bridge.h>
3025 #include <asm/platform.h>
31
-
32
-/* PCI Controller */
33
-
34
-
35
-/*
36
- * pcibios_alloc_controller
37
- * pcibios_enable_device
38
- * pcibios_fixups
39
- * pcibios_align_resource
40
- * pcibios_fixup_bus
41
- * pci_bus_add_device
42
- */
43
-
44
-static struct pci_controller *pci_ctrl_head;
45
-static struct pci_controller **pci_ctrl_tail = &pci_ctrl_head;
46
-
47
-static int pci_bus_count;
4826
4927 /*
5028 * We need to avoid collisions with `mirrored' VGA ports
....@@ -80,119 +58,12 @@
8058 return start;
8159 }
8260
83
-static void __init pci_controller_apertures(struct pci_controller *pci_ctrl,
84
- struct list_head *resources)
85
-{
86
- struct resource *res;
87
- unsigned long io_offset;
88
- int i;
89
-
90
- io_offset = (unsigned long)pci_ctrl->io_space.base;
91
- res = &pci_ctrl->io_resource;
92
- if (!res->flags) {
93
- if (io_offset)
94
- pr_err("I/O resource not set for host bridge %d\n",
95
- pci_ctrl->index);
96
- res->start = 0;
97
- res->end = IO_SPACE_LIMIT;
98
- res->flags = IORESOURCE_IO;
99
- }
100
- res->start += io_offset;
101
- res->end += io_offset;
102
- pci_add_resource_offset(resources, res, io_offset);
103
-
104
- for (i = 0; i < 3; i++) {
105
- res = &pci_ctrl->mem_resources[i];
106
- if (!res->flags) {
107
- if (i > 0)
108
- continue;
109
- pr_err("Memory resource not set for host bridge %d\n",
110
- pci_ctrl->index);
111
- res->start = 0;
112
- res->end = ~0U;
113
- res->flags = IORESOURCE_MEM;
114
- }
115
- pci_add_resource(resources, res);
116
- }
117
-}
118
-
119
-static int __init pcibios_init(void)
120
-{
121
- struct pci_controller *pci_ctrl;
122
- struct list_head resources;
123
- struct pci_bus *bus;
124
- int next_busno = 0, ret;
125
-
126
- pr_info("PCI: Probing PCI hardware\n");
127
-
128
- /* Scan all of the recorded PCI controllers. */
129
- for (pci_ctrl = pci_ctrl_head; pci_ctrl; pci_ctrl = pci_ctrl->next) {
130
- pci_ctrl->last_busno = 0xff;
131
- INIT_LIST_HEAD(&resources);
132
- pci_controller_apertures(pci_ctrl, &resources);
133
- bus = pci_scan_root_bus(NULL, pci_ctrl->first_busno,
134
- pci_ctrl->ops, pci_ctrl, &resources);
135
- if (!bus)
136
- continue;
137
-
138
- pci_ctrl->bus = bus;
139
- pci_ctrl->last_busno = bus->busn_res.end;
140
- if (next_busno <= pci_ctrl->last_busno)
141
- next_busno = pci_ctrl->last_busno+1;
142
- }
143
- pci_bus_count = next_busno;
144
- ret = platform_pcibios_fixup();
145
- if (ret)
146
- return ret;
147
-
148
- for (pci_ctrl = pci_ctrl_head; pci_ctrl; pci_ctrl = pci_ctrl->next) {
149
- if (pci_ctrl->bus)
150
- pci_bus_add_devices(pci_ctrl->bus);
151
- }
152
-
153
- return 0;
154
-}
155
-
156
-subsys_initcall(pcibios_init);
157
-
15861 void pcibios_fixup_bus(struct pci_bus *bus)
15962 {
16063 if (bus->parent) {
16164 /* This is a subordinate bridge */
16265 pci_read_bridge_bases(bus);
16366 }
164
-}
165
-
166
-void pcibios_set_master(struct pci_dev *dev)
167
-{
168
- /* No special bus mastering setup handling */
169
-}
170
-
171
-int pcibios_enable_device(struct pci_dev *dev, int mask)
172
-{
173
- u16 cmd, old_cmd;
174
- int idx;
175
- struct resource *r;
176
-
177
- pci_read_config_word(dev, PCI_COMMAND, &cmd);
178
- old_cmd = cmd;
179
- for (idx=0; idx<6; idx++) {
180
- r = &dev->resource[idx];
181
- if (!r->start && r->end) {
182
- pci_err(dev, "can't enable device: resource collisions\n");
183
- return -EINVAL;
184
- }
185
- if (r->flags & IORESOURCE_IO)
186
- cmd |= PCI_COMMAND_IO;
187
- if (r->flags & IORESOURCE_MEM)
188
- cmd |= PCI_COMMAND_MEMORY;
189
- }
190
- if (cmd != old_cmd) {
191
- pci_info(dev, "enabling device (%04x -> %04x)\n", old_cmd, cmd);
192
- pci_write_config_word(dev, PCI_COMMAND, cmd);
193
- }
194
-
195
- return 0;
19667 }
19768
19869 /*