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2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c

 kernel/arch/xtensa/include/asm/cache.h
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@@ -11,7 +11,7 @@
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 #ifndef _XTENSA_CACHE_H
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 #define _XTENSA_CACHE_H
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-#include <variant/core.h>
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+#include <asm/core.h>
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 #define L1_CACHE_SHIFT	XCHAL_DCACHE_LINEWIDTH
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 #define L1_CACHE_BYTES	XCHAL_DCACHE_LINESIZE
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@@ -31,4 +31,10 @@
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 #define ARCH_DMA_MINALIGN	L1_CACHE_BYTES
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+/*
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+ * R/O after init is actually writable, it cannot go to .rodata
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+ * according to vmlinux linker script.
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+ */
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+#define __ro_after_init __read_mostly
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+
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 #endif	/* _XTENSA_CACHE_H */