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2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c

 kernel/arch/s390/boot/head.S
..
..
@@ -60,6 +60,11 @@
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 	.long	0x02000690,0x60000050
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 	.long	0x020006e0,0x20000050
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+	.org	__LC_RST_NEW_PSW		# 0x1a0
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+	.quad	0,iplstart
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+	.org	__LC_PGM_NEW_PSW		# 0x1d0
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+	.quad	0x0000000180000000,startup_pgm_check_handler
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+
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 	.org	0x200
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 #
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@@ -302,39 +307,98 @@
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 	xc	0x300(256),0x300
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 	xc	0xe00(256),0xe00
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 	xc	0xf00(256),0xf00
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-	lctlg	%c0,%c15,0x200(%r0)	# initialize control registers
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+	lctlg	%c0,%c15,.Lctl-.LPG0(%r13)	# load control registers
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 	stcke	__LC_BOOT_CLOCK
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 	mvc	__LC_LAST_UPDATE_CLOCK(8),__LC_BOOT_CLOCK+1
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 	spt	6f-.LPG0(%r13)
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 	mvc	__LC_LAST_UPDATE_TIMER(8),6f-.LPG0(%r13)
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 	l	%r15,.Lstack-.LPG0(%r13)
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-	ahi	%r15,-STACK_FRAME_OVERHEAD
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 	brasl	%r14,verify_facilities
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-#ifdef CONFIG_KERNEL_UNCOMPRESSED
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-	jg	startup_continue
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-#else
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-	jg	startup_decompressor
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-#endif
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+	brasl	%r14,startup_kernel
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 .Lstack:
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-	.long	0x8000 + (1<<(PAGE_SHIFT+THREAD_SIZE_ORDER))
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+	.long	0x8000 + (1<<(PAGE_SHIFT+BOOT_STACK_ORDER)) - STACK_FRAME_OVERHEAD
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 	.align	8
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 6:	.long	0x7fffffff,0xffffffff
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+
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+.Lctl:	.quad	0x04040000		# cr0: AFP registers & secondary space
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+	.quad	0			# cr1: primary space segment table
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+	.quad	.Lduct			# cr2: dispatchable unit control table
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+	.quad	0			# cr3: instruction authorization
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+	.quad	0xffff			# cr4: instruction authorization
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+	.quad	.Lduct			# cr5: primary-aste origin
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+	.quad	0			# cr6:	I/O interrupts
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+	.quad	0			# cr7:	secondary space segment table
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+	.quad	0x0000000000008000	# cr8:	access registers translation
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+	.quad	0			# cr9:	tracing off
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+	.quad	0			# cr10: tracing off
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+	.quad	0			# cr11: tracing off
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+	.quad	0			# cr12: tracing off
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+	.quad	0			# cr13: home space segment table
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+	.quad	0xc0000000		# cr14: machine check handling off
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+	.quad	.Llinkage_stack		# cr15: linkage stack operations
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+
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+	.section .dma.data,"aw",@progbits
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+.Lduct: .long	0,.Laste,.Laste,0,.Lduald,0,0,0
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+	.long	0,0,0,0,0,0,0,0
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+.Llinkage_stack:
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+	.long	0,0,0x89000000,0,0,0,0x8a000000,0
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+	.align 64
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+.Laste:	.quad	0,0xffffffffffffffff,0,0,0,0,0,0
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+	.align	128
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+.Lduald:.rept	8
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+	.long	0x80000000,0,0,0	# invalid access-list entries
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+	.endr
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+	.previous
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353
 
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 #include "head_kdump.S"
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 #
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+# This program check is active immediately after kernel start
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+# and until early_pgm_check_handler is set in kernel/early.c
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+# It simply saves general/control registers and psw in
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+# the save area and does disabled wait with a faulty address.
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+#
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+ENTRY(startup_pgm_check_handler)
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+	stmg	%r8,%r15,__LC_SAVE_AREA_SYNC
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+	la	%r8,4095
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+	stctg	%c0,%c15,__LC_CREGS_SAVE_AREA-4095(%r8)
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+	stmg	%r0,%r7,__LC_GPREGS_SAVE_AREA-4095(%r8)
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+	mvc	__LC_GPREGS_SAVE_AREA-4095+64(64,%r8),__LC_SAVE_AREA_SYNC
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+	mvc	__LC_PSW_SAVE_AREA-4095(16,%r8),__LC_PGM_OLD_PSW
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+	mvc	__LC_RETURN_PSW(16),__LC_PGM_OLD_PSW
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+	ni	__LC_RETURN_PSW,0xfc	# remove IO and EX bits
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+	ni	__LC_RETURN_PSW+1,0xfb	# remove MCHK bit
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+	oi	__LC_RETURN_PSW+1,0x2	# set wait state bit
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+	larl	%r9,.Lold_psw_disabled_wait
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+	stg	%r9,__LC_PGM_NEW_PSW+8
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+	l	%r15,.Ldump_info_stack-.Lold_psw_disabled_wait(%r9)
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+	brasl	%r14,print_pgm_check_info
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+.Lold_psw_disabled_wait:
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+	la	%r8,4095
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+	lmg	%r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r8)
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+	lpswe	__LC_RETURN_PSW		# disabled wait
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+.Ldump_info_stack:
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+	.long	0x5000 + PAGE_SIZE - STACK_FRAME_OVERHEAD
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+ENDPROC(startup_pgm_check_handler)
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+
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+#
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 # params at 10400 (setup.h)
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+# Must be keept in sync with struct parmarea in setup.h
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 #
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 	.org	PARMAREA
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-	.long	0,0			# IPL_DEVICE
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-	.long	0,0			# INITRD_START
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-	.long	0,0			# INITRD_SIZE
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-	.long	0,0			# OLDMEM_BASE
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-	.long	0,0			# OLDMEM_SIZE
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+	.quad	0			# IPL_DEVICE
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+	.quad	0			# INITRD_START
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+	.quad	0			# INITRD_SIZE
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+	.quad	0			# OLDMEM_BASE
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+	.quad	0			# OLDMEM_SIZE
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+	.quad	kernel_version		# points to kernel version string
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 	.org	COMMAND_LINE
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 	.byte	"root=/dev/ram0 ro"
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 	.byte	0
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-	.org	0x11000
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+	.org	EARLY_SCCB_OFFSET
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+	.fill	4096
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+
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+	.org	HEAD_END