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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * Copyright (C) 2002 ARM Ltd. |
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3 | 4 | * All Rights Reserved |
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4 | 5 | * Copyright (c) 2010, Code Aurora Forum. All rights reserved. |
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5 | 6 | * Copyright (c) 2014 The Linux Foundation. All rights reserved. |
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6 | | - * |
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7 | | - * This program is free software; you can redistribute it and/or modify |
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8 | | - * it under the terms of the GNU General Public License version 2 as |
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9 | | - * published by the Free Software Foundation. |
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10 | 7 | */ |
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11 | 8 | |
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12 | 9 | #include <linux/init.h> |
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.. | .. |
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46 | 43 | |
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47 | 44 | extern void secondary_startup_arm(void); |
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48 | 45 | |
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49 | | -static DEFINE_RAW_SPINLOCK(boot_lock); |
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50 | | - |
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51 | 46 | #ifdef CONFIG_HOTPLUG_CPU |
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52 | 47 | static void qcom_cpu_die(unsigned int cpu) |
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53 | 48 | { |
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54 | 49 | wfi(); |
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55 | 50 | } |
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56 | 51 | #endif |
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57 | | - |
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58 | | -static void qcom_secondary_init(unsigned int cpu) |
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59 | | -{ |
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60 | | - /* |
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61 | | - * Synchronise with the boot thread. |
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62 | | - */ |
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63 | | - raw_spin_lock(&boot_lock); |
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64 | | - raw_spin_unlock(&boot_lock); |
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65 | | -} |
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66 | 52 | |
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67 | 53 | static int scss_release_secondary(unsigned int cpu) |
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68 | 54 | { |
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.. | .. |
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281 | 267 | } |
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282 | 268 | |
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283 | 269 | /* |
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284 | | - * set synchronisation state between this boot processor |
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285 | | - * and the secondary one |
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286 | | - */ |
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287 | | - raw_spin_lock(&boot_lock); |
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288 | | - |
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289 | | - /* |
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290 | 270 | * Send the secondary CPU a soft interrupt, thereby causing |
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291 | 271 | * the boot monitor to read the system wide flags register, |
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292 | 272 | * and branch to the address found there. |
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293 | 273 | */ |
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294 | 274 | arch_send_wakeup_ipi_mask(cpumask_of(cpu)); |
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295 | | - |
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296 | | - /* |
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297 | | - * now the secondary core is starting up let it run its |
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298 | | - * calibrations, then wait for it to finish |
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299 | | - */ |
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300 | | - raw_spin_unlock(&boot_lock); |
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301 | 275 | |
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302 | 276 | return ret; |
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303 | 277 | } |
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.. | .. |
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334 | 308 | |
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335 | 309 | static const struct smp_operations smp_msm8660_ops __initconst = { |
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336 | 310 | .smp_prepare_cpus = qcom_smp_prepare_cpus, |
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337 | | - .smp_secondary_init = qcom_secondary_init, |
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338 | 311 | .smp_boot_secondary = msm8660_boot_secondary, |
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339 | 312 | #ifdef CONFIG_HOTPLUG_CPU |
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340 | 313 | .cpu_die = qcom_cpu_die, |
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.. | .. |
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344 | 317 | |
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345 | 318 | static const struct smp_operations qcom_smp_kpssv1_ops __initconst = { |
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346 | 319 | .smp_prepare_cpus = qcom_smp_prepare_cpus, |
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347 | | - .smp_secondary_init = qcom_secondary_init, |
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348 | 320 | .smp_boot_secondary = kpssv1_boot_secondary, |
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349 | 321 | #ifdef CONFIG_HOTPLUG_CPU |
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350 | 322 | .cpu_die = qcom_cpu_die, |
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.. | .. |
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354 | 326 | |
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355 | 327 | static const struct smp_operations qcom_smp_kpssv2_ops __initconst = { |
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356 | 328 | .smp_prepare_cpus = qcom_smp_prepare_cpus, |
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357 | | - .smp_secondary_init = qcom_secondary_init, |
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358 | 329 | .smp_boot_secondary = kpssv2_boot_secondary, |
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359 | 330 | #ifdef CONFIG_HOTPLUG_CPU |
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360 | 331 | .cpu_die = qcom_cpu_die, |
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