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2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c

 kernel/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c
..
..
@@ -74,112 +74,6 @@
74
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 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
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 };
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77
-/* pru-icss -> l3 main */
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-struct omap_hwmod_ocp_if am33xx_pruss__l3_main = {
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-	.master		= &am33xx_pruss_hwmod,
80
-	.slave		= &am33xx_l3_main_hwmod,
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-	.clk		= "l3_gclk",
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-	.user		= OCP_USER_MPU | OCP_USER_SDMA,
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-};
84
-
85
-/* gfx -> l3 main */
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-struct omap_hwmod_ocp_if am33xx_gfx__l3_main = {
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-	.master		= &am33xx_gfx_hwmod,
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-	.slave		= &am33xx_l3_main_hwmod,
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-	.clk		= "dpll_core_m4_ck",
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-	.user		= OCP_USER_MPU | OCP_USER_SDMA,
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-};
92
-
93
-/* l3 main -> gfx */
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-struct omap_hwmod_ocp_if am33xx_l3_main__gfx = {
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-	.master		= &am33xx_l3_main_hwmod,
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-	.slave		= &am33xx_gfx_hwmod,
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-	.clk		= "dpll_core_m4_ck",
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-	.user		= OCP_USER_MPU | OCP_USER_SDMA,
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-};
100
-
101
-/* l4 wkup -> rtc */
102
-struct omap_hwmod_ocp_if am33xx_l4_wkup__rtc = {
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-	.master		= &am33xx_l4_wkup_hwmod,
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-	.slave		= &am33xx_rtc_hwmod,
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-	.clk		= "clkdiv32k_ick",
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-	.user		= OCP_USER_MPU,
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-};
108
-
109
-/* l4 per/ls -> DCAN0 */
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-struct omap_hwmod_ocp_if am33xx_l4_per__dcan0 = {
111
-	.master		= &am33xx_l4_ls_hwmod,
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-	.slave		= &am33xx_dcan0_hwmod,
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-	.clk		= "l4ls_gclk",
114
-	.user		= OCP_USER_MPU | OCP_USER_SDMA,
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-};
116
-
117
-/* l4 per/ls -> DCAN1 */
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-struct omap_hwmod_ocp_if am33xx_l4_per__dcan1 = {
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-	.master		= &am33xx_l4_ls_hwmod,
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-	.slave		= &am33xx_dcan1_hwmod,
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-	.clk		= "l4ls_gclk",
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-	.user		= OCP_USER_MPU | OCP_USER_SDMA,
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-};
124
-
125
-/* l4 per/ls -> GPIO2 */
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-struct omap_hwmod_ocp_if am33xx_l4_per__gpio1 = {
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-	.master		= &am33xx_l4_ls_hwmod,
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-	.slave		= &am33xx_gpio1_hwmod,
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-	.clk		= "l4ls_gclk",
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-	.user		= OCP_USER_MPU | OCP_USER_SDMA,
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-};
132
-
133
-/* l4 per/ls -> gpio3 */
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-struct omap_hwmod_ocp_if am33xx_l4_per__gpio2 = {
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-	.master		= &am33xx_l4_ls_hwmod,
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-	.slave		= &am33xx_gpio2_hwmod,
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-	.clk		= "l4ls_gclk",
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-	.user		= OCP_USER_MPU | OCP_USER_SDMA,
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-};
140
-
141
-/* l4 per/ls -> gpio4 */
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-struct omap_hwmod_ocp_if am33xx_l4_per__gpio3 = {
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-	.master		= &am33xx_l4_ls_hwmod,
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-	.slave		= &am33xx_gpio3_hwmod,
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-	.clk		= "l4ls_gclk",
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-	.user		= OCP_USER_MPU | OCP_USER_SDMA,
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-};
148
-
149
-struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = {
150
-	.master		= &am33xx_cpgmac0_hwmod,
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-	.slave		= &am33xx_mdio_hwmod,
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-	.user		= OCP_USER_MPU,
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-};
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-
155
-struct omap_hwmod_ocp_if am33xx_l4_ls__elm = {
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-	.master		= &am33xx_l4_ls_hwmod,
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-	.slave		= &am33xx_elm_hwmod,
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-	.clk		= "l4ls_gclk",
159
-	.user		= OCP_USER_MPU,
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-};
161
-
162
-struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss0 = {
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-	.master		= &am33xx_l4_ls_hwmod,
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-	.slave		= &am33xx_epwmss0_hwmod,
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-	.clk		= "l4ls_gclk",
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-	.user		= OCP_USER_MPU,
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-};
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-
169
-struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss1 = {
170
-	.master		= &am33xx_l4_ls_hwmod,
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-	.slave		= &am33xx_epwmss1_hwmod,
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-	.clk		= "l4ls_gclk",
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-	.user		= OCP_USER_MPU,
174
-};
175
-
176
-struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss2 = {
177
-	.master		= &am33xx_l4_ls_hwmod,
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-	.slave		= &am33xx_epwmss2_hwmod,
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-	.clk		= "l4ls_gclk",
180
-	.user		= OCP_USER_MPU,
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-};
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-
183
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 /* l3s cfg -> gpmc */
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 struct omap_hwmod_ocp_if am33xx_l3_s__gpmc = {
185
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 	.master		= &am33xx_l3_s_hwmod,
..
..
@@ -188,240 +82,9 @@
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 	.user		= OCP_USER_MPU,
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 };
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-/* i2c2 */
192
-struct omap_hwmod_ocp_if am33xx_l4_per__i2c2 = {
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-	.master		= &am33xx_l4_ls_hwmod,
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-	.slave		= &am33xx_i2c2_hwmod,
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-	.clk		= "l4ls_gclk",
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-	.user		= OCP_USER_MPU,
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-};
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-
199
-struct omap_hwmod_ocp_if am33xx_l4_per__i2c3 = {
200
-	.master		= &am33xx_l4_ls_hwmod,
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-	.slave		= &am33xx_i2c3_hwmod,
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-	.clk		= "l4ls_gclk",
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-	.user		= OCP_USER_MPU,
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-};
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-
206
-/* l4 ls -> mailbox */
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-struct omap_hwmod_ocp_if am33xx_l4_per__mailbox = {
208
-	.master		= &am33xx_l4_ls_hwmod,
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-	.slave		= &am33xx_mailbox_hwmod,
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-	.clk		= "l4ls_gclk",
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-	.user		= OCP_USER_MPU,
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-};
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-
214
-/* l4 ls -> spinlock */
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-struct omap_hwmod_ocp_if am33xx_l4_ls__spinlock = {
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-	.master		= &am33xx_l4_ls_hwmod,
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-	.slave		= &am33xx_spinlock_hwmod,
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-	.clk		= "l4ls_gclk",
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-	.user		= OCP_USER_MPU,
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-};
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-
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-/* l4 ls -> mcasp0 */
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-struct omap_hwmod_ocp_if am33xx_l4_ls__mcasp0 = {
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-	.master		= &am33xx_l4_ls_hwmod,
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-	.slave		= &am33xx_mcasp0_hwmod,
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-	.clk		= "l4ls_gclk",
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-	.user		= OCP_USER_MPU,
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-};
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-
230
-/* l4 ls -> mcasp1 */
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-struct omap_hwmod_ocp_if am33xx_l4_ls__mcasp1 = {
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-	.master		= &am33xx_l4_ls_hwmod,
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-	.slave		= &am33xx_mcasp1_hwmod,
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-	.clk		= "l4ls_gclk",
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-	.user		= OCP_USER_MPU,
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-};
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-
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-/* l4 ls -> mmc0 */
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-struct omap_hwmod_ocp_if am33xx_l4_ls__mmc0 = {
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-	.master		= &am33xx_l4_ls_hwmod,
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-	.slave		= &am33xx_mmc0_hwmod,
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-	.clk		= "l4ls_gclk",
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-	.user		= OCP_USER_MPU,
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-};
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-
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-/* l4 ls -> mmc1 */
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-struct omap_hwmod_ocp_if am33xx_l4_ls__mmc1 = {
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-	.master		= &am33xx_l4_ls_hwmod,
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-	.slave		= &am33xx_mmc1_hwmod,
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-	.clk		= "l4ls_gclk",
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-	.user		= OCP_USER_MPU,
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-};
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-
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-/* l3 s -> mmc2 */
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-struct omap_hwmod_ocp_if am33xx_l3_s__mmc2 = {
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-	.master		= &am33xx_l3_s_hwmod,
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-	.slave		= &am33xx_mmc2_hwmod,
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-	.clk		= "l3s_gclk",
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-	.user		= OCP_USER_MPU,
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-};
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-
262
-/* l4 ls -> mcspi0 */
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-struct omap_hwmod_ocp_if am33xx_l4_ls__mcspi0 = {
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-	.master		= &am33xx_l4_ls_hwmod,
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-	.slave		= &am33xx_spi0_hwmod,
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-	.clk		= "l4ls_gclk",
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-	.user		= OCP_USER_MPU,
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-};
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-
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-/* l4 ls -> mcspi1 */
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-struct omap_hwmod_ocp_if am33xx_l4_ls__mcspi1 = {
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-	.master		= &am33xx_l4_ls_hwmod,
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-	.slave		= &am33xx_spi1_hwmod,
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-	.clk		= "l4ls_gclk",
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-	.user		= OCP_USER_MPU,
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-};
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-
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-/* l4 per -> timer2 */
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-struct omap_hwmod_ocp_if am33xx_l4_ls__timer2 = {
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-	.master		= &am33xx_l4_ls_hwmod,
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-	.slave		= &am33xx_timer2_hwmod,
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-	.clk		= "l4ls_gclk",
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-	.user		= OCP_USER_MPU,
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-};
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-
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-/* l4 per -> timer3 */
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-struct omap_hwmod_ocp_if am33xx_l4_ls__timer3 = {
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-	.master		= &am33xx_l4_ls_hwmod,
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-	.slave		= &am33xx_timer3_hwmod,
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-	.clk		= "l4ls_gclk",
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-	.user		= OCP_USER_MPU,
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-};
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-
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-/* l4 per -> timer4 */
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-struct omap_hwmod_ocp_if am33xx_l4_ls__timer4 = {
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-	.master		= &am33xx_l4_ls_hwmod,
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-	.slave		= &am33xx_timer4_hwmod,
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-	.clk		= "l4ls_gclk",
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-	.user		= OCP_USER_MPU,
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-};
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-
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-/* l4 per -> timer5 */
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-struct omap_hwmod_ocp_if am33xx_l4_ls__timer5 = {
304
-	.master		= &am33xx_l4_ls_hwmod,
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-	.slave		= &am33xx_timer5_hwmod,
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-	.clk		= "l4ls_gclk",
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-	.user		= OCP_USER_MPU,
308
-};
309
-
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-/* l4 per -> timer6 */
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-struct omap_hwmod_ocp_if am33xx_l4_ls__timer6 = {
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-	.master		= &am33xx_l4_ls_hwmod,
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-	.slave		= &am33xx_timer6_hwmod,
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-	.clk		= "l4ls_gclk",
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-	.user		= OCP_USER_MPU,
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-};
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-
318
-/* l4 per -> timer7 */
319
-struct omap_hwmod_ocp_if am33xx_l4_ls__timer7 = {
320
-	.master		= &am33xx_l4_ls_hwmod,
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-	.slave		= &am33xx_timer7_hwmod,
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-	.clk		= "l4ls_gclk",
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-	.user		= OCP_USER_MPU,
324
-};
325
-
326
-/* l3 main -> tpcc */
327
-struct omap_hwmod_ocp_if am33xx_l3_main__tpcc = {
328
-	.master		= &am33xx_l3_main_hwmod,
329
-	.slave		= &am33xx_tpcc_hwmod,
330
-	.clk		= "l3_gclk",
331
-	.user		= OCP_USER_MPU,
332
-};
333
-
334
-/* l3 main -> tpcc0 */
335
-struct omap_hwmod_ocp_if am33xx_l3_main__tptc0 = {
336
-	.master		= &am33xx_l3_main_hwmod,
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-	.slave		= &am33xx_tptc0_hwmod,
338
-	.clk		= "l3_gclk",
339
-	.user		= OCP_USER_MPU,
340
-};
341
-
342
-/* l3 main -> tpcc1 */
343
-struct omap_hwmod_ocp_if am33xx_l3_main__tptc1 = {
344
-	.master		= &am33xx_l3_main_hwmod,
345
-	.slave		= &am33xx_tptc1_hwmod,
346
-	.clk		= "l3_gclk",
347
-	.user		= OCP_USER_MPU,
348
-};
349
-
350
-/* l3 main -> tpcc2 */
351
-struct omap_hwmod_ocp_if am33xx_l3_main__tptc2 = {
352
-	.master		= &am33xx_l3_main_hwmod,
353
-	.slave		= &am33xx_tptc2_hwmod,
354
-	.clk		= "l3_gclk",
355
-	.user		= OCP_USER_MPU,
356
-};
357
-
358
-/* l4 ls -> uart2 */
359
-struct omap_hwmod_ocp_if am33xx_l4_ls__uart2 = {
360
-	.master		= &am33xx_l4_ls_hwmod,
361
-	.slave		= &am33xx_uart2_hwmod,
362
-	.clk		= "l4ls_gclk",
363
-	.user		= OCP_USER_MPU,
364
-};
365
-
366
-/* l4 ls -> uart3 */
367
-struct omap_hwmod_ocp_if am33xx_l4_ls__uart3 = {
368
-	.master		= &am33xx_l4_ls_hwmod,
369
-	.slave		= &am33xx_uart3_hwmod,
370
-	.clk		= "l4ls_gclk",
371
-	.user		= OCP_USER_MPU,
372
-};
373
-
374
-/* l4 ls -> uart4 */
375
-struct omap_hwmod_ocp_if am33xx_l4_ls__uart4 = {
376
-	.master		= &am33xx_l4_ls_hwmod,
377
-	.slave		= &am33xx_uart4_hwmod,
378
-	.clk		= "l4ls_gclk",
379
-	.user		= OCP_USER_MPU,
380
-};
381
-
382
-/* l4 ls -> uart5 */
383
-struct omap_hwmod_ocp_if am33xx_l4_ls__uart5 = {
384
-	.master		= &am33xx_l4_ls_hwmod,
385
-	.slave		= &am33xx_uart5_hwmod,
386
-	.clk		= "l4ls_gclk",
387
-	.user		= OCP_USER_MPU,
388
-};
389
-
390
-/* l4 ls -> uart6 */
391
-struct omap_hwmod_ocp_if am33xx_l4_ls__uart6 = {
392
-	.master		= &am33xx_l4_ls_hwmod,
393
-	.slave		= &am33xx_uart6_hwmod,
394
-	.clk		= "l4ls_gclk",
395
-	.user		= OCP_USER_MPU,
396
-};
397
-
398
85
 /* l3 main -> ocmc */
399
86
 struct omap_hwmod_ocp_if am33xx_l3_main__ocmc = {
400
87
 	.master		= &am33xx_l3_main_hwmod,
401
88
 	.slave		= &am33xx_ocmcram_hwmod,
402
89
 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
403
-};
404
-
405
-/* l3 main -> sha0 HIB2 */
406
-struct omap_hwmod_ocp_if am33xx_l3_main__sha0 = {
407
-	.master		= &am33xx_l3_main_hwmod,
408
-	.slave		= &am33xx_sha0_hwmod,
409
-	.clk		= "sha0_fck",
410
-	.user		= OCP_USER_MPU | OCP_USER_SDMA,
411
-};
412
-
413
-/* l3 main -> AES0 HIB2 */
414
-struct omap_hwmod_ocp_if am33xx_l3_main__aes0 = {
415
-	.master		= &am33xx_l3_main_hwmod,
416
-	.slave		= &am33xx_aes0_hwmod,
417
-	.clk		= "aes0_fck",
418
-	.user		= OCP_USER_MPU | OCP_USER_SDMA,
419
-};
420
-
421
-/* l4 per -> rng */
422
-struct omap_hwmod_ocp_if am33xx_l4_per__rng = {
423
-	.master		= &am33xx_l4_ls_hwmod,
424
-	.slave		= &am33xx_rng_hwmod,
425
-	.clk		= "rng_fck",
426
-	.user		= OCP_USER_MPU,
427
90
 };