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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips |
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3 | 4 | * |
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.. | .. |
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5 | 6 | * Copyright (C) 2012 Texas Instruments, Inc. |
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6 | 7 | * Paul Walmsley |
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7 | 8 | * |
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8 | | - * This program is free software; you can redistribute it and/or modify |
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9 | | - * it under the terms of the GNU General Public License version 2 as |
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10 | | - * published by the Free Software Foundation. |
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11 | | - * |
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12 | 9 | * XXX handle crossbar/shared link difference for L3? |
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13 | 10 | * XXX these should be marked initdata for multi-OMAP kernels |
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14 | 11 | */ |
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15 | 12 | |
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16 | 13 | #include <linux/platform_data/i2c-omap.h> |
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17 | 14 | #include <linux/platform_data/hsmmc-omap.h> |
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18 | | -#include <linux/omap-dma.h> |
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19 | 15 | |
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20 | 16 | #include "omap_hwmod.h" |
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21 | 17 | #include "l3_2xxx.h" |
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.. | .. |
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68 | 64 | static struct omap_hwmod_class i2c_class = { |
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69 | 65 | .name = "i2c", |
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70 | 66 | .sysc = &i2c_sysc, |
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71 | | - .rev = OMAP_I2C_IP_VERSION_1, |
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72 | 67 | .reset = &omap_i2c_reset, |
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73 | 68 | }; |
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74 | 69 | |
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.. | .. |
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123 | 118 | }, |
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124 | 119 | }, |
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125 | 120 | .class = &omap2xxx_gpio_hwmod_class, |
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126 | | -}; |
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127 | | - |
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128 | | -/* dma attributes */ |
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129 | | -static struct omap_dma_dev_attr dma_dev_attr = { |
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130 | | - .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | |
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131 | | - IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY, |
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132 | | - .lch_count = 32, |
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133 | | -}; |
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134 | | - |
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135 | | -static struct omap_hwmod omap2430_dma_system_hwmod = { |
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136 | | - .name = "dma", |
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137 | | - .class = &omap2xxx_dma_hwmod_class, |
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138 | | - .main_clk = "core_l3_ck", |
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139 | | - .dev_attr = &dma_dev_attr, |
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140 | | - .flags = HWMOD_NO_IDLEST, |
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141 | 121 | }; |
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142 | 122 | |
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143 | 123 | /* mailbox */ |
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.. | .. |
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456 | 436 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
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457 | 437 | }; |
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458 | 438 | |
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459 | | -/* l4_wkup -> timer1 */ |
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460 | | -static struct omap_hwmod_ocp_if omap2430_l4_wkup__timer1 = { |
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461 | | - .master = &omap2xxx_l4_wkup_hwmod, |
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462 | | - .slave = &omap2xxx_timer1_hwmod, |
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463 | | - .clk = "gpt1_ick", |
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464 | | - .user = OCP_USER_MPU | OCP_USER_SDMA, |
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465 | | -}; |
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466 | | - |
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467 | 439 | /* l4_wkup -> wd_timer2 */ |
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468 | 440 | static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { |
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469 | 441 | .master = &omap2xxx_l4_wkup_hwmod, |
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.. | .. |
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509 | 481 | .master = &omap2xxx_l4_core_hwmod, |
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510 | 482 | .slave = &omap2430_gpio5_hwmod, |
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511 | 483 | .clk = "gpio5_ick", |
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512 | | - .user = OCP_USER_MPU | OCP_USER_SDMA, |
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513 | | -}; |
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514 | | - |
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515 | | -/* dma_system -> L3 */ |
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516 | | -static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = { |
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517 | | - .master = &omap2430_dma_system_hwmod, |
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518 | | - .slave = &omap2xxx_l3_main_hwmod, |
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519 | | - .clk = "core_l3_ck", |
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520 | | - .user = OCP_USER_MPU | OCP_USER_SDMA, |
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521 | | -}; |
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522 | | - |
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523 | | -/* l4_core -> dma_system */ |
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524 | | -static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = { |
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525 | | - .master = &omap2xxx_l4_core_hwmod, |
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526 | | - .slave = &omap2430_dma_system_hwmod, |
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527 | | - .clk = "sdma_ick", |
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528 | 484 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
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529 | 485 | }; |
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530 | 486 | |
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.. | .. |
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584 | 540 | .flags = OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE, |
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585 | 541 | }; |
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586 | 542 | |
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587 | | -/* l4_wkup -> 32ksync_counter */ |
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588 | | -static struct omap_hwmod_ocp_if omap2430_l4_wkup__counter_32k = { |
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589 | | - .master = &omap2xxx_l4_wkup_hwmod, |
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590 | | - .slave = &omap2xxx_counter_32k_hwmod, |
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591 | | - .clk = "sync_32k_ick", |
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592 | | - .user = OCP_USER_MPU | OCP_USER_SDMA, |
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593 | | -}; |
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594 | | - |
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595 | 543 | static struct omap_hwmod_ocp_if omap2430_l3__gpmc = { |
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596 | 544 | .master = &omap2xxx_l3_main_hwmod, |
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597 | 545 | .slave = &omap2xxx_gpmc_hwmod, |
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.. | .. |
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617 | 565 | &omap2xxx_l4_core__mcspi2, |
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618 | 566 | &omap2430_l4_core__mcspi3, |
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619 | 567 | &omap2430_l3__iva, |
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620 | | - &omap2430_l4_wkup__timer1, |
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621 | | - &omap2xxx_l4_core__timer2, |
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622 | 568 | &omap2xxx_l4_core__timer3, |
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623 | 569 | &omap2xxx_l4_core__timer4, |
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624 | 570 | &omap2xxx_l4_core__timer5, |
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.. | .. |
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639 | 585 | &omap2430_l4_wkup__gpio3, |
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640 | 586 | &omap2430_l4_wkup__gpio4, |
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641 | 587 | &omap2430_l4_core__gpio5, |
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642 | | - &omap2430_dma_system__l3, |
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643 | | - &omap2430_l4_core__dma_system, |
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644 | 588 | &omap2430_l4_core__mailbox, |
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645 | 589 | &omap2430_l4_core__mcbsp1, |
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646 | 590 | &omap2430_l4_core__mcbsp2, |
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.. | .. |
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651 | 595 | &omap2xxx_l4_core__rng, |
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652 | 596 | &omap2xxx_l4_core__sham, |
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653 | 597 | &omap2xxx_l4_core__aes, |
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654 | | - &omap2430_l4_wkup__counter_32k, |
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655 | 598 | &omap2430_l3__gpmc, |
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656 | 599 | NULL, |
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657 | 600 | }; |
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