add stmac read mac form eeprom

hc

2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c

 kernel/arch/arm/boot/dts/rk3xxx.dtsi
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@@ -32,7 +32,7 @@
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 		spi1 = &spi1;
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 	};
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-	amba {
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+	amba: bus {
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 		compatible = "simple-bus";
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 		#address-cells = <1>;
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 		#size-cells = <1>;
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@@ -70,6 +70,7 @@
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 				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
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 			#dma-cells = <1>;
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 			arm,pl330-broken-no-flushp;
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+			arm,pl330-periph-burst;
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 			clocks = <&cru ACLK_DMA2>;
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 			clock-names = "apb_pclk";
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 		};
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@@ -93,7 +94,7 @@
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 		status = "disabled";
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 	};
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-	L2: l2-cache-controller@10138000 {
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+	L2: cache-controller@10138000 {
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 		compatible = "arm,pl310-cache";
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 		reg = <0x10138000 0x1000>;
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 		cache-unified;
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@@ -110,6 +111,13 @@
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 		reg = <0x1013c200 0x20>;
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 		interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>;
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 		clocks = <&cru CORE_PERI>;
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+		status = "disabled";
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+		/* The clock source and the sched_clock provided by the arm_global_timer
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+		 * on Rockchip rk3066a/rk3188 are quite unstable because their rates
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+		 * depend on the CPU frequency.
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+		 * Keep the arm_global_timer disabled in order to have the
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+		 * DW_APB_TIMER (rk3066a) or ROCKCHIP_TIMER (rk3188) selected by default.
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+		 */
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 	};
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 	local_timer: local-timer@1013c600 {
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@@ -147,6 +155,46 @@
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 		clock-names = "baudclk", "apb_pclk";
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 		clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
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 		status = "disabled";
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+	};
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+
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+	qos_gpu: qos@1012d000 {
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+		compatible = "syscon";
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+		reg = <0x1012d000 0x20>;
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+	};
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+
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+	qos_vpu: qos@1012e000 {
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+		compatible = "syscon";
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+		reg = <0x1012e000 0x20>;
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+	};
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+
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+	qos_lcdc0: qos@1012f000 {
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+		compatible = "syscon";
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+		reg = <0x1012f000 0x20>;
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+	};
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+
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+	qos_cif0: qos@1012f080 {
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+		compatible = "syscon";
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+		reg = <0x1012f080 0x20>;
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+	};
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+
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+	qos_ipp: qos@1012f100 {
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+		compatible = "syscon";
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+		reg = <0x1012f100 0x20>;
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+	};
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+
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+	qos_lcdc1: qos@1012f180 {
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+		compatible = "syscon";
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+		reg = <0x1012f180 0x20>;
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+	};
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+
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+	qos_cif1: qos@1012f200 {
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+		compatible = "syscon";
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+		reg = <0x1012f200 0x20>;
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+	};
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+
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+	qos_rga: qos@1012f280 {
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+		compatible = "syscon";
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+		reg = <0x1012f280 0x20>;
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 	};
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 	usb_otg: usb@10180000 {
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@@ -193,7 +241,7 @@
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 		status = "disabled";
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 	};
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-	mmc0: dwmmc@10214000 {
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+	mmc0: mmc@10214000 {
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 		compatible = "rockchip,rk2928-dw-mshc";
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 		reg = <0x10214000 0x1000>;
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 		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
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@@ -207,7 +255,7 @@
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 		status = "disabled";
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 	};
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-	mmc1: dwmmc@10218000 {
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+	mmc1: mmc@10218000 {
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 		compatible = "rockchip,rk2928-dw-mshc";
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 		reg = <0x10218000 0x1000>;
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 		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
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@@ -221,7 +269,7 @@
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 		status = "disabled";
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 	};
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-	emmc: dwmmc@1021c000 {
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+	emmc: mmc@1021c000 {
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 		compatible = "rockchip,rk2928-dw-mshc";
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 		reg = <0x1021c000 0x1000>;
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 		interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
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@@ -249,7 +297,7 @@
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 		compatible = "rockchip,rk3066-pmu", "syscon", "simple-mfd";
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 		reg = <0x20004000 0x100>;
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-		reboot_mode: reboot-mode {
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+		reboot-mode {
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 			compatible = "syscon-reboot-mode";
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 			offset = <0x40>;
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 			mode-normal = <BOOT_NORMAL>;