add stmac read mac form eeprom

hc

2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c

 kernel/arch/arm/boot/dts/imx6qdl-gw5904.dtsi
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@@ -46,6 +46,8 @@
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  */
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 #include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/input/linux-event-codes.h>
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+#include <dt-bindings/interrupt-controller/irq.h>
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 / {
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 	/* these are used by bootloader for disabling nodes */
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@@ -66,6 +68,53 @@
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 		pwms = <&pwm4 0 5000000>;
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 		brightness-levels = <0 4 8 16 32 64 128 255>;
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 		default-brightness-level = <7>;
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+	};
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+
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+	gpio-keys {
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+		compatible = "gpio-keys";
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+		#address-cells = <1>;
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+		#size-cells = <0>;
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+
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+		user-pb {
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+			label = "user_pb";
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+			gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
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+			linux,code = <BTN_0>;
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+		};
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+
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+		user-pb1x {
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+			label = "user_pb1x";
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+			linux,code = <BTN_1>;
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+			interrupt-parent = <&gsc>;
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+			interrupts = <0>;
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+		};
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+
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+		key-erased {
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+			label = "key-erased";
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+			linux,code = <BTN_2>;
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+			interrupt-parent = <&gsc>;
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+			interrupts = <1>;
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+		};
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+
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+		eeprom-wp {
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+			label = "eeprom_wp";
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+			linux,code = <BTN_3>;
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+			interrupt-parent = <&gsc>;
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+			interrupts = <2>;
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+		};
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+
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+		tamper {
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+			label = "tamper";
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+			linux,code = <BTN_4>;
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+			interrupt-parent = <&gsc>;
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+			interrupts = <5>;
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+		};
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+
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+		switch-hold {
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+			label = "switch_hold";
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+			linux,code = <BTN_5>;
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+			interrupt-parent = <&gsc>;
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+			interrupts = <7>;
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+		};
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 	};
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 	leds {
..
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@@ -94,6 +143,7 @@
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 	};
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 	memory@10000000 {
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+		device_type = "memory";
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 		reg = <0x10000000 0x40000000>;
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 	};
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@@ -204,11 +254,101 @@
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 	pinctrl-0 = <&pinctrl_i2c1>;
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 	status = "okay";
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-	pca9555: gpio@23 {
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+	gsc: gsc@20 {
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+		compatible = "gw,gsc";
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+		reg = <0x20>;
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+		interrupt-parent = <&gpio1>;
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+		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
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+		interrupt-controller;
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+		#interrupt-cells = <1>;
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+		#size-cells = <0>;
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+
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+		adc {
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+			compatible = "gw,gsc-adc";
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+			#address-cells = <1>;
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+			#size-cells = <0>;
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+
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+			channel@0 {
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+				gw,mode = <0>;
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+				reg = <0x00>;
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+				label = "temp";
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+			};
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+
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+			channel@2 {
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+				gw,mode = <1>;
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+				reg = <0x02>;
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+				label = "vdd_vin";
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+			};
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+
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+			channel@5 {
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+				gw,mode = <1>;
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+				reg = <0x05>;
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+				label = "vdd_3p3";
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+			};
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+
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+			channel@8 {
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+				gw,mode = <1>;
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+				reg = <0x08>;
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+				label = "vdd_bat";
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+			};
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+
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+			channel@b {
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+				gw,mode = <1>;
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+				reg = <0x0b>;
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+				label = "vdd_5p0";
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+			};
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+
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+			channel@e {
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+				gw,mode = <1>;
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+				reg = <0xe>;
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+				label = "vdd_arm";
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+			};
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+
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+			channel@11 {
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+				gw,mode = <1>;
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+				reg = <0x11>;
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+				label = "vdd_soc";
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+			};
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+
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+			channel@14 {
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+				gw,mode = <1>;
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+				reg = <0x14>;
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+				label = "vdd_3p0";
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+			};
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+
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+			channel@17 {
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+				gw,mode = <1>;
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+				reg = <0x17>;
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+				label = "vdd_1p5";
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+			};
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+
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+			channel@1d {
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+				gw,mode = <1>;
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+				reg = <0x1d>;
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+				label = "vdd_1p8";
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+			};
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+
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+			channel@20 {
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+				gw,mode = <1>;
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+				reg = <0x20>;
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+				label = "vdd_an1";
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+			};
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+
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+			channel@23 {
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+				gw,mode = <1>;
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+				reg = <0x23>;
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+				label = "vdd_2p5";
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+			};
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+		};
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+	};
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+
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+	gsc_gpio: gpio@23 {
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 		compatible = "nxp,pca9555";
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 		reg = <0x23>;
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 		gpio-controller;
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 		#gpio-cells = <2>;
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+		interrupt-parent = <&gsc>;
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+		interrupts = <4>;
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 	};
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 	eeprom1: eeprom@50 {
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@@ -246,6 +386,15 @@
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 	pinctrl-names = "default";
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 	pinctrl-0 = <&pinctrl_i2c2>;
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 	status = "okay";
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+
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+	magn@1c {
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+		compatible = "st,lsm9ds1-magn";
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+		reg = <0x1c>;
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+		pinctrl-names = "default";
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+		pinctrl-0 = <&pinctrl_mag>;
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+		interrupt-parent = <&gpio5>;
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+		interrupts = <17 IRQ_TYPE_EDGE_RISING>;
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+	};
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 	ltc3676: pmic@3c {
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 		compatible = "lltc,ltc3676";
..
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@@ -319,6 +468,16 @@
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 			};
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 		};
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 	};
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+
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+	imu@6a {
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+		compatible = "st,lsm9ds1-imu";
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+		reg = <0x6a>;
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+		st,drdy-int-pin = <1>;
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+		pinctrl-names = "default";
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+		pinctrl-0 = <&pinctrl_imu>;
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+		interrupt-parent = <&gpio4>;
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+		interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
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+	};
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 };
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 &i2c3 {
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@@ -381,6 +540,7 @@
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 };
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541
 
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 &pwm4 {
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+	#pwm-cells = <2>;
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 	pinctrl-names = "default";
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 	pinctrl-0 = <&pinctrl_pwm4>;
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 	status = "okay";
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@@ -483,6 +643,7 @@
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 		fsl,pins = <
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 			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
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 			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
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+			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x0001b0b0 /* GSC_IRQ# */
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 		>;
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 	};
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..
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@@ -500,6 +661,18 @@
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 		>;
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 	};
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+	pinctrl_imu: imugrp {
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+		fsl,pins = <
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+			MX6QDL_PAD_DI0_PIN2__GPIO4_IO18		0x1b0b0
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+		>;
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+	};
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+
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+	pinctrl_mag: maggrp {
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+		fsl,pins = <
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+			MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17	0x1b0b0
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+		>;
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+	};
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+
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 	pinctrl_pcie: pciegrp {
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 		fsl,pins = <
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 			MX6QDL_PAD_GPIO_0__GPIO1_IO00	0x1b0b0 /* PCIE RST */