hc
2024-10-12 a5969cabbb4660eab42b6ef0412cbbd1200cf14d
kernel/drivers/pwm/pwm-lpc32xx.c
....@@ -1,10 +1,6 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23 * Copyright 2012 Alexandre Pereira da Silva <aletes.xgr@gmail.com>
3
- *
4
- * This program is free software; you can redistribute it and/or modify
5
- * it under the terms of the GNU General Public License as published by
6
- * the Free Software Foundation; version 2.
7
- *
84 */
95
106 #include <linux/clk.h>
....@@ -55,10 +51,10 @@
5551 if (duty_cycles > 255)
5652 duty_cycles = 255;
5753
58
- val = readl(lpc32xx->base + (pwm->hwpwm << 2));
54
+ val = readl(lpc32xx->base);
5955 val &= ~0xFFFF;
6056 val |= (period_cycles << 8) | duty_cycles;
61
- writel(val, lpc32xx->base + (pwm->hwpwm << 2));
57
+ writel(val, lpc32xx->base);
6258
6359 return 0;
6460 }
....@@ -73,9 +69,9 @@
7369 if (ret)
7470 return ret;
7571
76
- val = readl(lpc32xx->base + (pwm->hwpwm << 2));
72
+ val = readl(lpc32xx->base);
7773 val |= PWM_ENABLE;
78
- writel(val, lpc32xx->base + (pwm->hwpwm << 2));
74
+ writel(val, lpc32xx->base);
7975
8076 return 0;
8177 }
....@@ -85,9 +81,9 @@
8581 struct lpc32xx_pwm_chip *lpc32xx = to_lpc32xx_pwm_chip(chip);
8682 u32 val;
8783
88
- val = readl(lpc32xx->base + (pwm->hwpwm << 2));
84
+ val = readl(lpc32xx->base);
8985 val &= ~PWM_ENABLE;
90
- writel(val, lpc32xx->base + (pwm->hwpwm << 2));
86
+ writel(val, lpc32xx->base);
9187
9288 clk_disable_unprepare(lpc32xx->clk);
9389 }
....@@ -125,9 +121,9 @@
125121 lpc32xx->chip.base = -1;
126122
127123 /* If PWM is disabled, configure the output to the default value */
128
- val = readl(lpc32xx->base + (lpc32xx->chip.pwms[0].hwpwm << 2));
124
+ val = readl(lpc32xx->base);
129125 val &= ~PWM_PIN_LEVEL;
130
- writel(val, lpc32xx->base + (lpc32xx->chip.pwms[0].hwpwm << 2));
126
+ writel(val, lpc32xx->base);
131127
132128 ret = pwmchip_add(&lpc32xx->chip);
133129 if (ret < 0) {