hc
2024-10-12 a5969cabbb4660eab42b6ef0412cbbd1200cf14d
kernel/drivers/pwm/pwm-bcm2835.c
....@@ -1,9 +1,6 @@
1
+// SPDX-License-Identifier: GPL-2.0
12 /*
23 * Copyright 2014 Bart Tanghe <bart.tanghe@thomasmore.be>
3
- *
4
- * This program is free software; you can redistribute it and/or modify
5
- * it under the terms of the GNU General Public License as published by
6
- * the Free Software Foundation; version 2.
74 */
85
96 #include <linux/clk.h>
....@@ -24,7 +21,7 @@
2421 #define PERIOD(x) (((x) * 0x10) + 0x10)
2522 #define DUTY(x) (((x) * 0x10) + 0x14)
2623
27
-#define MIN_PERIOD 108 /* 9.2 MHz max. PWM clock */
24
+#define PERIOD_MIN 0x2
2825
2926 struct bcm2835_pwm {
3027 struct pwm_chip chip;
....@@ -67,22 +64,22 @@
6764 struct bcm2835_pwm *pc = to_bcm2835_pwm(chip);
6865 unsigned long rate = clk_get_rate(pc->clk);
6966 unsigned long scaler;
67
+ u32 period;
7068
7169 if (!rate) {
7270 dev_err(pc->dev, "failed to get clock rate\n");
7371 return -EINVAL;
7472 }
7573
76
- scaler = NSEC_PER_SEC / rate;
74
+ scaler = DIV_ROUND_CLOSEST(NSEC_PER_SEC, rate);
75
+ period = DIV_ROUND_CLOSEST(period_ns, scaler);
7776
78
- if (period_ns <= MIN_PERIOD) {
79
- dev_err(pc->dev, "period %d not supported, minimum %d\n",
80
- period_ns, MIN_PERIOD);
77
+ if (period < PERIOD_MIN)
8178 return -EINVAL;
82
- }
8379
84
- writel(duty_ns / scaler, pc->base + DUTY(pwm->hwpwm));
85
- writel(period_ns / scaler, pc->base + PERIOD(pwm->hwpwm));
80
+ writel(DIV_ROUND_CLOSEST(duty_ns, scaler),
81
+ pc->base + DUTY(pwm->hwpwm));
82
+ writel(period, pc->base + PERIOD(pwm->hwpwm));
8683
8784 return 0;
8885 }
....@@ -155,10 +152,9 @@
155152 return PTR_ERR(pc->base);
156153
157154 pc->clk = devm_clk_get(&pdev->dev, NULL);
158
- if (IS_ERR(pc->clk)) {
159
- dev_err(&pdev->dev, "clock not found: %ld\n", PTR_ERR(pc->clk));
160
- return PTR_ERR(pc->clk);
161
- }
155
+ if (IS_ERR(pc->clk))
156
+ return dev_err_probe(&pdev->dev, PTR_ERR(pc->clk),
157
+ "clock not found\n");
162158
163159 ret = clk_prepare_enable(pc->clk);
164160 if (ret)