修改led为gpio

hc

2024-10-12 a5969cabbb4660eab42b6ef0412cbbd1200cf14d

 kernel/drivers/iommu/mtk_iommu.h
..
..
@@ -1,15 +1,7 @@
1
+/* SPDX-License-Identifier: GPL-2.0-only */
1
2
 /*
2
3
  * Copyright (c) 2015-2016 MediaTek Inc.
3
4
  * Author: Honghui Zhang <honghui.zhang@mediatek.com>
4
- *
5
- * This program is free software; you can redistribute it and/or modify
6
- * it under the terms of the GNU General Public License version 2 as
7
- * published by the Free Software Foundation.
8
- *
9
- * This program is distributed in the hope that it will be useful,
10
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
11
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12
- * GNU General Public License for more details.
13
5
  */
14
6
 
15
7
 #ifndef _MTK_IOMMU_H_
..
..
@@ -23,21 +15,49 @@
23
15
 #include <linux/iommu.h>
24
16
 #include <linux/list.h>
25
17
 #include <linux/spinlock.h>
18
+#include <linux/dma-mapping.h>
26
19
 #include <soc/mediatek/smi.h>
20
+#include <dt-bindings/memory/mtk-memory-port.h>
21
+
22
+#define MTK_LARB_COM_MAX	8
23
+#define MTK_LARB_SUBCOM_MAX	4
24
+
25
+#define MTK_IOMMU_GROUP_MAX	8
27
26
 
28
27
 struct mtk_iommu_suspend_reg {
29
-	u32				standard_axi_mode;
28
+	union {
29
+		u32			standard_axi_mode;/* v1 */
30
+		u32			misc_ctrl;/* v2 */
31
+	};
30
32
 	u32				dcm_dis;
31
33
 	u32				ctrl_reg;
32
34
 	u32				int_control0;
33
35
 	u32				int_main_control;
34
36
 	u32				ivrp_paddr;
37
+	u32				vld_pa_rng;
38
+	u32				wr_len_ctrl;
35
39
 };
36
40
 
37
41
 enum mtk_iommu_plat {
38
42
 	M4U_MT2701,
39
43
 	M4U_MT2712,
44
+	M4U_MT6779,
45
+	M4U_MT8167,
40
46
 	M4U_MT8173,
47
+	M4U_MT8183,
48
+	M4U_MT8192,
49
+};
50
+
51
+struct mtk_iommu_iova_region;
52
+
53
+struct mtk_iommu_plat_data {
54
+	enum mtk_iommu_plat m4u_plat;
55
+	u32                 flags;
56
+	u32                 inv_sel_reg;
57
+
58
+	unsigned int				iova_region_nr;
59
+	const struct mtk_iommu_iova_region	*iova_region;
60
+	unsigned char       larbid_remap[MTK_LARB_COM_MAX][MTK_LARB_SUBCOM_MAX];
41
61
 };
42
62
 
43
63
 struct mtk_iommu_domain;
..
..
@@ -50,15 +70,20 @@
50
70
 	phys_addr_t			protect_base; /* protect memory base */
51
71
 	struct mtk_iommu_suspend_reg	reg;
52
72
 	struct mtk_iommu_domain		*m4u_dom;
53
-	struct iommu_group		*m4u_group;
54
-	struct mtk_smi_iommu		smi_imu;      /* SMI larb iommu info */
73
+	struct iommu_group		*m4u_group[MTK_IOMMU_GROUP_MAX];
55
74
 	bool                            enable_4GB;
56
-	bool				tlb_flush_active;
75
+	spinlock_t			tlb_lock; /* lock for tlb range flush */
57
76
 
58
77
 	struct iommu_device		iommu;
59
-	enum mtk_iommu_plat		m4u_plat;
78
+	const struct mtk_iommu_plat_data *plat_data;
79
+	struct device			*smicomm_dev;
80
+
81
+	struct dma_iommu_mapping	*mapping; /* For mtk_iommu_v1.c */
82
+
83
+	struct mutex			mutex; /* Protect m4u_group/m4u_dom above */
60
84
 
61
85
 	struct list_head		list;
86
+	struct mtk_smi_larb_iommu	larb_imu[MTK_LARB_NR_MAX];
62
87
 };
63
88
 
64
89
 static inline int compare_of(struct device *dev, void *data)
..
..
@@ -75,14 +100,14 @@
75
100
 {
76
101
 	struct mtk_iommu_data *data = dev_get_drvdata(dev);
77
102
 
78
-	return component_bind_all(dev, &data->smi_imu);
103
+	return component_bind_all(dev, &data->larb_imu);
79
104
 }
80
105
 
81
106
 static inline void mtk_iommu_unbind(struct device *dev)
82
107
 {
83
108
 	struct mtk_iommu_data *data = dev_get_drvdata(dev);
84
109
 
85
-	component_unbind_all(dev, &data->smi_imu);
110
+	component_unbind_all(dev, &data->larb_imu);
86
111
 }
87
112
 
88
113
 #endif