hc
2024-10-12 a5969cabbb4660eab42b6ef0412cbbd1200cf14d
kernel/drivers/i2c/busses/i2c-xiic.c
....@@ -375,6 +375,9 @@
375375 struct xiic_i2c *i2c = dev_id;
376376 u32 pend, isr, ier;
377377 u32 clr = 0;
378
+ int xfer_more = 0;
379
+ int wakeup_req = 0;
380
+ int wakeup_code = 0;
378381
379382 /* Get the interrupt Status from the IPIF. There is no clearing of
380383 * interrupts in the IPIF. Interrupts must be cleared at the source.
....@@ -411,10 +414,16 @@
411414 */
412415 xiic_reinit(i2c);
413416
414
- if (i2c->rx_msg)
415
- xiic_wakeup(i2c, STATE_ERROR);
416
- if (i2c->tx_msg)
417
- xiic_wakeup(i2c, STATE_ERROR);
417
+ if (i2c->rx_msg) {
418
+ wakeup_req = 1;
419
+ wakeup_code = STATE_ERROR;
420
+ }
421
+ if (i2c->tx_msg) {
422
+ wakeup_req = 1;
423
+ wakeup_code = STATE_ERROR;
424
+ }
425
+ /* don't try to handle other events */
426
+ goto out;
418427 }
419428 if (pend & XIIC_INTR_RX_FULL_MASK) {
420429 /* Receive register/FIFO is full */
....@@ -448,8 +457,7 @@
448457 i2c->tx_msg++;
449458 dev_dbg(i2c->adap.dev.parent,
450459 "%s will start next...\n", __func__);
451
-
452
- __xiic_start_xfer(i2c);
460
+ xfer_more = 1;
453461 }
454462 }
455463 }
....@@ -463,11 +471,13 @@
463471 if (!i2c->tx_msg)
464472 goto out;
465473
466
- if ((i2c->nmsgs == 1) && !i2c->rx_msg &&
467
- xiic_tx_space(i2c) == 0)
468
- xiic_wakeup(i2c, STATE_DONE);
474
+ wakeup_req = 1;
475
+
476
+ if (i2c->nmsgs == 1 && !i2c->rx_msg &&
477
+ xiic_tx_space(i2c) == 0)
478
+ wakeup_code = STATE_DONE;
469479 else
470
- xiic_wakeup(i2c, STATE_ERROR);
480
+ wakeup_code = STATE_ERROR;
471481 }
472482 if (pend & (XIIC_INTR_TX_EMPTY_MASK | XIIC_INTR_TX_HALF_MASK)) {
473483 /* Transmit register/FIFO is empty or ½ empty */
....@@ -491,7 +501,7 @@
491501 if (i2c->nmsgs > 1) {
492502 i2c->nmsgs--;
493503 i2c->tx_msg++;
494
- __xiic_start_xfer(i2c);
504
+ xfer_more = 1;
495505 } else {
496506 xiic_irq_dis(i2c, XIIC_INTR_TX_HALF_MASK);
497507
....@@ -509,6 +519,13 @@
509519 dev_dbg(i2c->adap.dev.parent, "%s clr: 0x%x\n", __func__, clr);
510520
511521 xiic_setreg32(i2c, XIIC_IISR_OFFSET, clr);
522
+ if (xfer_more)
523
+ __xiic_start_xfer(i2c);
524
+ if (wakeup_req)
525
+ xiic_wakeup(i2c, wakeup_code);
526
+
527
+ WARN_ON(xfer_more && wakeup_req);
528
+
512529 mutex_unlock(&i2c->lock);
513530 return IRQ_HANDLED;
514531 }