hc
2024-10-12 a5969cabbb4660eab42b6ef0412cbbd1200cf14d
kernel/drivers/i2c/busses/i2c-uniphier-f.c
....@@ -1,15 +1,6 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
3
- *
4
- * This program is free software; you can redistribute it and/or modify
5
- * it under the terms of the GNU General Public License as published by
6
- * the Free Software Foundation; either version 2 of the License, or
7
- * (at your option) any later version.
8
- *
9
- * This program is distributed in the hope that it will be useful,
10
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
11
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12
- * GNU General Public License for more details.
134 */
145
156 #include <linux/clk.h>
....@@ -82,8 +73,6 @@
8273 #define UNIPHIER_FI2C_BYTE_WISE BIT(3)
8374 #define UNIPHIER_FI2C_DEFER_STOP_COMP BIT(4)
8475
85
-#define UNIPHIER_FI2C_DEFAULT_SPEED 100000
86
-#define UNIPHIER_FI2C_MAX_SPEED 400000
8776 #define UNIPHIER_FI2C_FIFO_SIZE 8
8877
8978 struct uniphier_fi2c_priv {
....@@ -117,7 +106,6 @@
117106 if (fifo_space-- <= 0)
118107 break;
119108
120
- dev_dbg(&priv->adap.dev, "write data: %02x\n", *priv->buf);
121109 writel(*priv->buf++, priv->membase + UNIPHIER_FI2C_DTTX);
122110 priv->len--;
123111 }
....@@ -133,7 +121,6 @@
133121 break;
134122
135123 *priv->buf++ = readl(priv->membase + UNIPHIER_FI2C_DTRX);
136
- dev_dbg(&priv->adap.dev, "read data: %02x\n", priv->buf[-1]);
137124 priv->len--;
138125 }
139126 }
....@@ -151,8 +138,6 @@
151138
152139 static void uniphier_fi2c_stop(struct uniphier_fi2c_priv *priv)
153140 {
154
- dev_dbg(&priv->adap.dev, "stop condition\n");
155
-
156141 priv->enabled_irqs |= UNIPHIER_FI2C_INT_STOP;
157142 uniphier_fi2c_set_irqs(priv);
158143 writel(UNIPHIER_FI2C_CR_MST | UNIPHIER_FI2C_CR_STO,
....@@ -169,21 +154,15 @@
169154 irq_status = readl(priv->membase + UNIPHIER_FI2C_INT);
170155 irq_status &= priv->enabled_irqs;
171156
172
- dev_dbg(&priv->adap.dev,
173
- "interrupt: enabled_irqs=%04x, irq_status=%04x\n",
174
- priv->enabled_irqs, irq_status);
175
-
176157 if (irq_status & UNIPHIER_FI2C_INT_STOP)
177158 goto complete;
178159
179160 if (unlikely(irq_status & UNIPHIER_FI2C_INT_AL)) {
180
- dev_dbg(&priv->adap.dev, "arbitration lost\n");
181161 priv->error = -EAGAIN;
182162 goto complete;
183163 }
184164
185165 if (unlikely(irq_status & UNIPHIER_FI2C_INT_NA)) {
186
- dev_dbg(&priv->adap.dev, "could not get ACK\n");
187166 priv->error = -ENXIO;
188167 if (priv->flags & UNIPHIER_FI2C_RD) {
189168 /*
....@@ -224,18 +203,14 @@
224203 if (unlikely(priv->flags & UNIPHIER_FI2C_MANUAL_NACK)) {
225204 if (priv->len <= UNIPHIER_FI2C_FIFO_SIZE &&
226205 !(priv->flags & UNIPHIER_FI2C_BYTE_WISE)) {
227
- dev_dbg(&priv->adap.dev,
228
- "enable read byte count IRQ\n");
229206 priv->enabled_irqs |= UNIPHIER_FI2C_INT_RB;
230207 uniphier_fi2c_set_irqs(priv);
231208 priv->flags |= UNIPHIER_FI2C_BYTE_WISE;
232209 }
233
- if (priv->len <= 1) {
234
- dev_dbg(&priv->adap.dev, "set NACK\n");
210
+ if (priv->len <= 1)
235211 writel(UNIPHIER_FI2C_CR_MST |
236212 UNIPHIER_FI2C_CR_NACK,
237213 priv->membase + UNIPHIER_FI2C_CR);
238
- }
239214 }
240215
241216 goto handled;
....@@ -269,7 +244,8 @@
269244 return IRQ_HANDLED;
270245 }
271246
272
-static void uniphier_fi2c_tx_init(struct uniphier_fi2c_priv *priv, u16 addr)
247
+static void uniphier_fi2c_tx_init(struct uniphier_fi2c_priv *priv, u16 addr,
248
+ bool repeat)
273249 {
274250 priv->enabled_irqs |= UNIPHIER_FI2C_INT_TE;
275251 uniphier_fi2c_set_irqs(priv);
....@@ -279,8 +255,12 @@
279255 /* set slave address */
280256 writel(UNIPHIER_FI2C_DTTX_CMD | addr << 1,
281257 priv->membase + UNIPHIER_FI2C_DTTX);
282
- /* first chunk of data */
283
- uniphier_fi2c_fill_txfifo(priv, true);
258
+ /*
259
+ * First chunk of data. For a repeated START condition, do not write
260
+ * data to the TX fifo here to avoid the timing issue.
261
+ */
262
+ if (!repeat)
263
+ uniphier_fi2c_fill_txfifo(priv, true);
284264 }
285265
286266 static void uniphier_fi2c_rx_init(struct uniphier_fi2c_priv *priv, u16 addr)
....@@ -338,10 +318,6 @@
338318 bool is_read = msg->flags & I2C_M_RD;
339319 unsigned long time_left, flags;
340320
341
- dev_dbg(&adap->dev, "%s: addr=0x%02x, len=%d, repeat=%d, stop=%d\n",
342
- is_read ? "receive" : "transmit", msg->addr, msg->len,
343
- repeat, stop);
344
-
345321 priv->len = msg->len;
346322 priv->buf = msg->buf;
347323 priv->enabled_irqs = UNIPHIER_FI2C_INT_FAULTS;
....@@ -361,9 +337,8 @@
361337 if (is_read)
362338 uniphier_fi2c_rx_init(priv, msg->addr);
363339 else
364
- uniphier_fi2c_tx_init(priv, msg->addr);
340
+ uniphier_fi2c_tx_init(priv, msg->addr, repeat);
365341
366
- dev_dbg(&adap->dev, "start condition\n");
367342 /*
368343 * For a repeated START condition, writing a slave address to the FIFO
369344 * kicks the controller. So, the UNIPHIER_FI2C_CR register should be
....@@ -387,7 +362,6 @@
387362 uniphier_fi2c_recover(priv);
388363 return -ETIMEDOUT;
389364 }
390
- dev_dbg(&adap->dev, "complete\n");
391365
392366 if (unlikely(priv->flags & UNIPHIER_FI2C_DEFER_STOP_COMP)) {
393367 u32 status;
....@@ -542,7 +516,6 @@
542516 {
543517 struct device *dev = &pdev->dev;
544518 struct uniphier_fi2c_priv *priv;
545
- struct resource *regs;
546519 u32 bus_speed;
547520 unsigned long clk_rate;
548521 int irq, ret;
....@@ -551,21 +524,18 @@
551524 if (!priv)
552525 return -ENOMEM;
553526
554
- regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
555
- priv->membase = devm_ioremap_resource(dev, regs);
527
+ priv->membase = devm_platform_ioremap_resource(pdev, 0);
556528 if (IS_ERR(priv->membase))
557529 return PTR_ERR(priv->membase);
558530
559531 irq = platform_get_irq(pdev, 0);
560
- if (irq < 0) {
561
- dev_err(dev, "failed to get IRQ number\n");
532
+ if (irq < 0)
562533 return irq;
563
- }
564534
565535 if (of_property_read_u32(dev->of_node, "clock-frequency", &bus_speed))
566
- bus_speed = UNIPHIER_FI2C_DEFAULT_SPEED;
536
+ bus_speed = I2C_MAX_STANDARD_MODE_FREQ;
567537
568
- if (!bus_speed || bus_speed > UNIPHIER_FI2C_MAX_SPEED) {
538
+ if (!bus_speed || bus_speed > I2C_MAX_FAST_MODE_FREQ) {
569539 dev_err(dev, "invalid clock-frequency %d\n", bus_speed);
570540 return -EINVAL;
571541 }