.. | .. |
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2 | 2 | /* |
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3 | 3 | * SuperH Mobile I2C Controller |
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4 | 4 | * |
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5 | | - * Copyright (C) 2014 Wolfram Sang <wsa@sang-engineering.com> |
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6 | | - * |
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| 5 | + * Copyright (C) 2014-19 Wolfram Sang <wsa@sang-engineering.com> |
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7 | 6 | * Copyright (C) 2008 Magnus Damm |
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8 | 7 | * |
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9 | 8 | * Portions of the code based on out-of-tree driver i2c-sh7343.c |
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.. | .. |
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130 | 129 | int sr; |
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131 | 130 | bool send_stop; |
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132 | 131 | bool stop_after_dma; |
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| 132 | + bool atomic_xfer; |
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133 | 133 | |
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134 | 134 | struct resource *res; |
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135 | 135 | struct dma_chan *dma_tx; |
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.. | .. |
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145 | 145 | }; |
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146 | 146 | |
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147 | 147 | #define IIC_FLAG_HAS_ICIC67 (1 << 0) |
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148 | | - |
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149 | | -#define STANDARD_MODE 100000 |
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150 | | -#define FAST_MODE 400000 |
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151 | 148 | |
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152 | 149 | /* Register offsets */ |
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153 | 150 | #define ICDR 0x00 |
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.. | .. |
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271 | 268 | |
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272 | 269 | i2c_clk_khz = clk_get_rate(pd->clk) / 1000 / pd->clks_per_count; |
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273 | 270 | |
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274 | | - if (pd->bus_speed == STANDARD_MODE) { |
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| 271 | + if (pd->bus_speed == I2C_MAX_STANDARD_MODE_FREQ) { |
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275 | 272 | tLOW = 47; /* tLOW = 4.7 us */ |
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276 | 273 | tHIGH = 40; /* tHD;STA = tHIGH = 4.0 us */ |
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277 | 274 | tf = 3; /* tf = 0.3 us */ |
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278 | | - } else if (pd->bus_speed == FAST_MODE) { |
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| 275 | + } else if (pd->bus_speed == I2C_MAX_FAST_MODE_FREQ) { |
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279 | 276 | tLOW = 13; /* tLOW = 1.3 us */ |
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280 | 277 | tHIGH = 6; /* tHD;STA = tHIGH = 0.6 us */ |
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281 | 278 | tf = 3; /* tf = 0.3 us */ |
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.. | .. |
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303 | 300 | return sh_mobile_i2c_check_timing(pd); |
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304 | 301 | } |
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305 | 302 | |
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306 | | -static unsigned char i2c_op(struct sh_mobile_i2c_data *pd, |
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307 | | - enum sh_mobile_i2c_op op, unsigned char data) |
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| 303 | +static unsigned char i2c_op(struct sh_mobile_i2c_data *pd, enum sh_mobile_i2c_op op) |
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308 | 304 | { |
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309 | 305 | unsigned char ret = 0; |
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310 | 306 | unsigned long flags; |
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311 | 307 | |
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312 | | - dev_dbg(pd->dev, "op %d, data in 0x%02x\n", op, data); |
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| 308 | + dev_dbg(pd->dev, "op %d\n", op); |
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313 | 309 | |
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314 | 310 | spin_lock_irqsave(&pd->lock, flags); |
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315 | 311 | |
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.. | .. |
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317 | 313 | case OP_START: /* issue start and trigger DTE interrupt */ |
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318 | 314 | iic_wr(pd, ICCR, ICCR_ICE | ICCR_TRS | ICCR_BBSY); |
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319 | 315 | break; |
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320 | | - case OP_TX_FIRST: /* disable DTE interrupt and write data */ |
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| 316 | + case OP_TX_FIRST: /* disable DTE interrupt and write client address */ |
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321 | 317 | iic_wr(pd, ICIC, ICIC_WAITE | ICIC_ALE | ICIC_TACKE); |
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322 | | - iic_wr(pd, ICDR, data); |
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| 318 | + iic_wr(pd, ICDR, i2c_8bit_addr_from_msg(pd->msg)); |
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323 | 319 | break; |
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324 | 320 | case OP_TX: /* write data */ |
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325 | | - iic_wr(pd, ICDR, data); |
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| 321 | + iic_wr(pd, ICDR, pd->msg->buf[pd->pos]); |
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326 | 322 | break; |
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327 | 323 | case OP_TX_STOP: /* issue a stop (or rep_start) */ |
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328 | 324 | iic_wr(pd, ICCR, pd->send_stop ? ICCR_ICE | ICCR_TRS |
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.. | .. |
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335 | 331 | ret = iic_rd(pd, ICDR); |
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336 | 332 | break; |
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337 | 333 | case OP_RX_STOP: /* enable DTE interrupt, issue stop */ |
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338 | | - iic_wr(pd, ICIC, |
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339 | | - ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE); |
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| 334 | + if (!pd->atomic_xfer) |
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| 335 | + iic_wr(pd, ICIC, |
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| 336 | + ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE); |
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340 | 337 | iic_wr(pd, ICCR, ICCR_ICE | ICCR_RACK); |
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341 | 338 | break; |
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342 | 339 | case OP_RX_STOP_DATA: /* enable DTE interrupt, read data, issue stop */ |
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343 | | - iic_wr(pd, ICIC, |
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344 | | - ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE); |
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| 340 | + if (!pd->atomic_xfer) |
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| 341 | + iic_wr(pd, ICIC, |
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| 342 | + ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE); |
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345 | 343 | ret = iic_rd(pd, ICDR); |
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346 | 344 | iic_wr(pd, ICCR, ICCR_ICE | ICCR_RACK); |
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347 | 345 | break; |
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.. | .. |
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353 | 351 | return ret; |
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354 | 352 | } |
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355 | 353 | |
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356 | | -static bool sh_mobile_i2c_is_first_byte(struct sh_mobile_i2c_data *pd) |
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357 | | -{ |
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358 | | - return pd->pos == -1; |
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359 | | -} |
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360 | | - |
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361 | | -static void sh_mobile_i2c_get_data(struct sh_mobile_i2c_data *pd, |
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362 | | - unsigned char *buf) |
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363 | | -{ |
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364 | | - switch (pd->pos) { |
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365 | | - case -1: |
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366 | | - *buf = i2c_8bit_addr_from_msg(pd->msg); |
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367 | | - break; |
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368 | | - default: |
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369 | | - *buf = pd->msg->buf[pd->pos]; |
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370 | | - } |
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371 | | -} |
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372 | | - |
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373 | 354 | static int sh_mobile_i2c_isr_tx(struct sh_mobile_i2c_data *pd) |
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374 | 355 | { |
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375 | | - unsigned char data; |
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376 | | - |
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377 | 356 | if (pd->pos == pd->msg->len) { |
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378 | | - i2c_op(pd, OP_TX_STOP, 0); |
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| 357 | + i2c_op(pd, OP_TX_STOP); |
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379 | 358 | return 1; |
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380 | 359 | } |
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381 | 360 | |
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382 | | - sh_mobile_i2c_get_data(pd, &data); |
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383 | | - i2c_op(pd, sh_mobile_i2c_is_first_byte(pd) ? OP_TX_FIRST : OP_TX, data); |
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| 361 | + if (pd->pos == -1) |
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| 362 | + i2c_op(pd, OP_TX_FIRST); |
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| 363 | + else |
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| 364 | + i2c_op(pd, OP_TX); |
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384 | 365 | |
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385 | 366 | pd->pos++; |
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386 | 367 | return 0; |
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.. | .. |
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388 | 369 | |
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389 | 370 | static int sh_mobile_i2c_isr_rx(struct sh_mobile_i2c_data *pd) |
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390 | 371 | { |
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391 | | - unsigned char data; |
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392 | 372 | int real_pos; |
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393 | 373 | |
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394 | | - do { |
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395 | | - if (pd->pos <= -1) { |
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396 | | - sh_mobile_i2c_get_data(pd, &data); |
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| 374 | + /* switch from TX (address) to RX (data) adds two interrupts */ |
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| 375 | + real_pos = pd->pos - 2; |
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397 | 376 | |
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398 | | - if (sh_mobile_i2c_is_first_byte(pd)) |
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399 | | - i2c_op(pd, OP_TX_FIRST, data); |
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400 | | - else |
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401 | | - i2c_op(pd, OP_TX, data); |
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402 | | - break; |
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| 377 | + if (pd->pos == -1) { |
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| 378 | + i2c_op(pd, OP_TX_FIRST); |
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| 379 | + } else if (pd->pos == 0) { |
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| 380 | + i2c_op(pd, OP_TX_TO_RX); |
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| 381 | + } else if (pd->pos == pd->msg->len) { |
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| 382 | + if (pd->stop_after_dma) { |
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| 383 | + /* Simulate PIO end condition after DMA transfer */ |
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| 384 | + i2c_op(pd, OP_RX_STOP); |
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| 385 | + pd->pos++; |
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| 386 | + goto done; |
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403 | 387 | } |
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404 | 388 | |
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405 | | - if (pd->pos == 0) { |
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406 | | - i2c_op(pd, OP_TX_TO_RX, 0); |
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407 | | - break; |
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408 | | - } |
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| 389 | + if (real_pos < 0) |
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| 390 | + i2c_op(pd, OP_RX_STOP); |
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| 391 | + else |
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| 392 | + pd->msg->buf[real_pos] = i2c_op(pd, OP_RX_STOP_DATA); |
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| 393 | + } else if (real_pos >= 0) { |
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| 394 | + pd->msg->buf[real_pos] = i2c_op(pd, OP_RX); |
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| 395 | + } |
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409 | 396 | |
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410 | | - real_pos = pd->pos - 2; |
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411 | | - |
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412 | | - if (pd->pos == pd->msg->len) { |
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413 | | - if (pd->stop_after_dma) { |
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414 | | - /* Simulate PIO end condition after DMA transfer */ |
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415 | | - i2c_op(pd, OP_RX_STOP, 0); |
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416 | | - pd->pos++; |
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417 | | - break; |
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418 | | - } |
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419 | | - |
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420 | | - if (real_pos < 0) { |
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421 | | - i2c_op(pd, OP_RX_STOP, 0); |
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422 | | - break; |
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423 | | - } |
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424 | | - data = i2c_op(pd, OP_RX_STOP_DATA, 0); |
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425 | | - } else if (real_pos >= 0) { |
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426 | | - data = i2c_op(pd, OP_RX, 0); |
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427 | | - } |
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428 | | - |
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429 | | - if (real_pos >= 0) |
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430 | | - pd->msg->buf[real_pos] = data; |
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431 | | - } while (0); |
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432 | | - |
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| 397 | + done: |
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433 | 398 | pd->pos++; |
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434 | 399 | return pd->pos == (pd->msg->len + 2); |
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435 | 400 | } |
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.. | .. |
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467 | 432 | |
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468 | 433 | if (wakeup) { |
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469 | 434 | pd->sr |= SW_DONE; |
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470 | | - wake_up(&pd->wait); |
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| 435 | + if (!pd->atomic_xfer) |
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| 436 | + wake_up(&pd->wait); |
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471 | 437 | } |
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472 | 438 | |
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473 | 439 | /* defeat write posting to avoid spurious WAIT interrupts */ |
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.. | .. |
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518 | 484 | char *chan_name = dir == DMA_MEM_TO_DEV ? "tx" : "rx"; |
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519 | 485 | int ret; |
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520 | 486 | |
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521 | | - chan = dma_request_slave_channel_reason(dev, chan_name); |
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| 487 | + chan = dma_request_chan(dev, chan_name); |
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522 | 488 | if (IS_ERR(chan)) { |
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523 | 489 | dev_dbg(dev, "request_channel failed for %s (%ld)\n", chan_name, |
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524 | 490 | PTR_ERR(chan)); |
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.. | .. |
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619 | 585 | pd->pos = -1; |
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620 | 586 | pd->sr = 0; |
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621 | 587 | |
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| 588 | + if (pd->atomic_xfer) |
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| 589 | + return; |
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| 590 | + |
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622 | 591 | pd->dma_buf = i2c_get_dma_safe_msg_buf(pd->msg, 8); |
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623 | 592 | if (pd->dma_buf) |
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624 | 593 | sh_mobile_i2c_xfer_dma(pd); |
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.. | .. |
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675 | 644 | return i ? 0 : -ETIMEDOUT; |
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676 | 645 | } |
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677 | 646 | |
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678 | | -static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter, |
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679 | | - struct i2c_msg *msgs, |
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680 | | - int num) |
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| 647 | +static int sh_mobile_xfer(struct sh_mobile_i2c_data *pd, |
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| 648 | + struct i2c_msg *msgs, int num) |
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681 | 649 | { |
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682 | | - struct sh_mobile_i2c_data *pd = i2c_get_adapdata(adapter); |
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683 | 650 | struct i2c_msg *msg; |
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684 | 651 | int err = 0; |
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685 | 652 | int i; |
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686 | | - long timeout; |
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| 653 | + long time_left; |
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687 | 654 | |
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688 | 655 | /* Wake up device and enable clock */ |
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689 | 656 | pm_runtime_get_sync(pd->dev); |
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.. | .. |
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698 | 665 | start_ch(pd, msg, do_start); |
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699 | 666 | |
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700 | 667 | if (do_start) |
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701 | | - i2c_op(pd, OP_START, 0); |
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| 668 | + i2c_op(pd, OP_START); |
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702 | 669 | |
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703 | | - /* The interrupt handler takes care of the rest... */ |
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704 | | - timeout = wait_event_timeout(pd->wait, |
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705 | | - pd->sr & (ICSR_TACK | SW_DONE), |
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706 | | - adapter->timeout); |
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| 670 | + if (pd->atomic_xfer) { |
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| 671 | + unsigned long j = jiffies + pd->adap.timeout; |
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707 | 672 | |
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708 | | - /* 'stop_after_dma' tells if DMA transfer was complete */ |
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709 | | - i2c_put_dma_safe_msg_buf(pd->dma_buf, pd->msg, pd->stop_after_dma); |
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| 673 | + time_left = time_before_eq(jiffies, j); |
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| 674 | + while (time_left && |
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| 675 | + !(pd->sr & (ICSR_TACK | SW_DONE))) { |
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| 676 | + unsigned char sr = iic_rd(pd, ICSR); |
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710 | 677 | |
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711 | | - if (!timeout) { |
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| 678 | + if (sr & (ICSR_AL | ICSR_TACK | |
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| 679 | + ICSR_WAIT | ICSR_DTE)) { |
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| 680 | + sh_mobile_i2c_isr(0, pd); |
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| 681 | + udelay(150); |
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| 682 | + } else { |
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| 683 | + cpu_relax(); |
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| 684 | + } |
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| 685 | + time_left = time_before_eq(jiffies, j); |
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| 686 | + } |
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| 687 | + } else { |
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| 688 | + /* The interrupt handler takes care of the rest... */ |
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| 689 | + time_left = wait_event_timeout(pd->wait, |
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| 690 | + pd->sr & (ICSR_TACK | SW_DONE), |
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| 691 | + pd->adap.timeout); |
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| 692 | + |
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| 693 | + /* 'stop_after_dma' tells if DMA xfer was complete */ |
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| 694 | + i2c_put_dma_safe_msg_buf(pd->dma_buf, pd->msg, |
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| 695 | + pd->stop_after_dma); |
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| 696 | + } |
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| 697 | + |
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| 698 | + if (!time_left) { |
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712 | 699 | dev_err(pd->dev, "Transfer request timed out\n"); |
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713 | 700 | if (pd->dma_direction != DMA_NONE) |
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714 | 701 | sh_mobile_i2c_cleanup_dma(pd); |
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.. | .. |
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734 | 721 | return err ?: num; |
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735 | 722 | } |
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736 | 723 | |
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| 724 | +static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter, |
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| 725 | + struct i2c_msg *msgs, |
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| 726 | + int num) |
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| 727 | +{ |
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| 728 | + struct sh_mobile_i2c_data *pd = i2c_get_adapdata(adapter); |
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| 729 | + |
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| 730 | + pd->atomic_xfer = false; |
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| 731 | + return sh_mobile_xfer(pd, msgs, num); |
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| 732 | +} |
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| 733 | + |
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| 734 | +static int sh_mobile_i2c_xfer_atomic(struct i2c_adapter *adapter, |
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| 735 | + struct i2c_msg *msgs, |
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| 736 | + int num) |
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| 737 | +{ |
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| 738 | + struct sh_mobile_i2c_data *pd = i2c_get_adapdata(adapter); |
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| 739 | + |
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| 740 | + pd->atomic_xfer = true; |
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| 741 | + return sh_mobile_xfer(pd, msgs, num); |
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| 742 | +} |
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| 743 | + |
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737 | 744 | static u32 sh_mobile_i2c_func(struct i2c_adapter *adapter) |
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738 | 745 | { |
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739 | 746 | return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_PROTOCOL_MANGLING; |
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740 | 747 | } |
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741 | 748 | |
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742 | 749 | static const struct i2c_algorithm sh_mobile_i2c_algorithm = { |
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743 | | - .functionality = sh_mobile_i2c_func, |
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744 | | - .master_xfer = sh_mobile_i2c_xfer, |
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| 750 | + .functionality = sh_mobile_i2c_func, |
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| 751 | + .master_xfer = sh_mobile_i2c_xfer, |
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| 752 | + .master_xfer_atomic = sh_mobile_i2c_xfer_atomic, |
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745 | 753 | }; |
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746 | 754 | |
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747 | 755 | static const struct i2c_adapter_quirks sh_mobile_i2c_quirks = { |
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.. | .. |
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749 | 757 | }; |
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750 | 758 | |
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751 | 759 | /* |
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752 | | - * r8a7740 chip has lasting errata on I2C I/O pad reset. |
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753 | | - * this is work-around for it. |
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| 760 | + * r8a7740 has an errata regarding I2C I/O pad reset needing this workaround. |
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754 | 761 | */ |
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755 | 762 | static int sh_mobile_i2c_r8a7740_workaround(struct sh_mobile_i2c_data *pd) |
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756 | 763 | { |
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.. | .. |
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800 | 807 | static const struct of_device_id sh_mobile_i2c_dt_ids[] = { |
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801 | 808 | { .compatible = "renesas,iic-r8a73a4", .data = &fast_clock_dt_config }, |
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802 | 809 | { .compatible = "renesas,iic-r8a7740", .data = &r8a7740_dt_config }, |
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803 | | - { .compatible = "renesas,iic-r8a774c0", .data = &fast_clock_dt_config }, |
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| 810 | + { .compatible = "renesas,iic-r8a774c0", .data = &v2_freq_calc_dt_config }, |
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804 | 811 | { .compatible = "renesas,iic-r8a7790", .data = &v2_freq_calc_dt_config }, |
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805 | | - { .compatible = "renesas,iic-r8a7791", .data = &fast_clock_dt_config }, |
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806 | | - { .compatible = "renesas,iic-r8a7792", .data = &fast_clock_dt_config }, |
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807 | | - { .compatible = "renesas,iic-r8a7793", .data = &fast_clock_dt_config }, |
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808 | | - { .compatible = "renesas,iic-r8a7794", .data = &fast_clock_dt_config }, |
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809 | | - { .compatible = "renesas,rcar-gen2-iic", .data = &fast_clock_dt_config }, |
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810 | | - { .compatible = "renesas,iic-r8a7795", .data = &fast_clock_dt_config }, |
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811 | | - { .compatible = "renesas,rcar-gen3-iic", .data = &fast_clock_dt_config }, |
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812 | | - { .compatible = "renesas,iic-r8a77990", .data = &fast_clock_dt_config }, |
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| 812 | + { .compatible = "renesas,iic-r8a7791", .data = &v2_freq_calc_dt_config }, |
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| 813 | + { .compatible = "renesas,iic-r8a7792", .data = &v2_freq_calc_dt_config }, |
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| 814 | + { .compatible = "renesas,iic-r8a7793", .data = &v2_freq_calc_dt_config }, |
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| 815 | + { .compatible = "renesas,iic-r8a7794", .data = &v2_freq_calc_dt_config }, |
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| 816 | + { .compatible = "renesas,iic-r8a7795", .data = &v2_freq_calc_dt_config }, |
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| 817 | + { .compatible = "renesas,iic-r8a77990", .data = &v2_freq_calc_dt_config }, |
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813 | 818 | { .compatible = "renesas,iic-sh73a0", .data = &fast_clock_dt_config }, |
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| 819 | + { .compatible = "renesas,rcar-gen2-iic", .data = &v2_freq_calc_dt_config }, |
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| 820 | + { .compatible = "renesas,rcar-gen3-iic", .data = &v2_freq_calc_dt_config }, |
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814 | 821 | { .compatible = "renesas,rmobile-iic", .data = &default_dt_config }, |
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815 | 822 | {}, |
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816 | 823 | }; |
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.. | .. |
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884 | 891 | return PTR_ERR(pd->reg); |
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885 | 892 | |
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886 | 893 | ret = of_property_read_u32(dev->dev.of_node, "clock-frequency", &bus_speed); |
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887 | | - pd->bus_speed = (ret || !bus_speed) ? STANDARD_MODE : bus_speed; |
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| 894 | + pd->bus_speed = (ret || !bus_speed) ? I2C_MAX_STANDARD_MODE_FREQ : bus_speed; |
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888 | 895 | pd->clks_per_count = 1; |
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889 | 896 | |
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890 | 897 | /* Newer variants come with two new bits in ICIC */ |
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.. | .. |
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949 | 956 | return 0; |
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950 | 957 | } |
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951 | 958 | |
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952 | | -static int sh_mobile_i2c_runtime_nop(struct device *dev) |
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953 | | -{ |
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954 | | - /* Runtime PM callback shared between ->runtime_suspend() |
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955 | | - * and ->runtime_resume(). Simply returns success. |
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956 | | - * |
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957 | | - * This driver re-initializes all registers after |
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958 | | - * pm_runtime_get_sync() anyway so there is no need |
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959 | | - * to save and restore registers here. |
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960 | | - */ |
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961 | | - return 0; |
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962 | | -} |
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963 | | - |
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964 | | -static const struct dev_pm_ops sh_mobile_i2c_dev_pm_ops = { |
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965 | | - .runtime_suspend = sh_mobile_i2c_runtime_nop, |
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966 | | - .runtime_resume = sh_mobile_i2c_runtime_nop, |
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967 | | -}; |
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968 | | - |
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969 | 959 | static struct platform_driver sh_mobile_i2c_driver = { |
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970 | 960 | .driver = { |
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971 | 961 | .name = "i2c-sh_mobile", |
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972 | | - .pm = &sh_mobile_i2c_dev_pm_ops, |
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973 | 962 | .of_match_table = sh_mobile_i2c_dt_ids, |
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974 | 963 | }, |
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975 | 964 | .probe = sh_mobile_i2c_probe, |
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.. | .. |
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989 | 978 | module_exit(sh_mobile_i2c_adap_exit); |
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990 | 979 | |
---|
991 | 980 | MODULE_DESCRIPTION("SuperH Mobile I2C Bus Controller driver"); |
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992 | | -MODULE_AUTHOR("Magnus Damm and Wolfram Sang"); |
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| 981 | +MODULE_AUTHOR("Magnus Damm"); |
---|
| 982 | +MODULE_AUTHOR("Wolfram Sang"); |
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993 | 983 | MODULE_LICENSE("GPL v2"); |
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994 | 984 | MODULE_ALIAS("platform:i2c-sh_mobile"); |
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