forked from ~ljy/RK356X_SDK_RELEASE

blame | history | patch | commit | commitdiff
hc
2024-10-12 a5969cabbb4660eab42b6ef0412cbbd1200cf14d 
 kernel/drivers/i2c/busses/i2c-rk3x.c
....@@ -1,24 +1,24 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23  * Driver for I2C adapter in Rockchip RK3xxx SoC
34  *
45  * Max Schwarz <max.schwarz@online.de>
56  * based on the patches by Rockchip Inc.
6
- *
7
- * This program is free software; you can redistribute it and/or modify
8
- * it under the terms of the GNU General Public License version 2 as
9
- * published by the Free Software Foundation.
107  */
118 
9
+#include <linux/acpi.h>
1210 #include <linux/kernel.h>
1311 #include <linux/module.h>
1412 #include <linux/i2c.h>
1513 #include <linux/interrupt.h>
14
+#include <linux/iopoll.h>
1615 #include <linux/errno.h>
1716 #include <linux/err.h>
1817 #include <linux/platform_device.h>
1918 #include <linux/io.h>
2019 #include <linux/of_address.h>
2120 #include <linux/of_irq.h>
21
+#include <linux/reset.h>
2222 #include <linux/spinlock.h>
2323 #include <linux/clk.h>
2424 #include <linux/wait.h>
....@@ -27,6 +27,7 @@
2727 #include <linux/math64.h>
2828 #include <linux/reboot.h>
2929 #include <linux/delay.h>
30
+#include <linux/soc/rockchip/rockchip_thunderboot_service.h>
3031 
3132 
3233 /* Register Map */
....@@ -39,6 +40,8 @@
3940 #define REG_IEN        0x18 /* interrupt enable */
4041 #define REG_IPD        0x1c /* interrupt pending */
4142 #define REG_FCNT       0x20 /* finished count */
43
+#define REG_SCL_OE_DB  0x24 /* Slave hold scl debounce */
44
+#define REG_CON1       0x228 /* control register1 */
4245 
4346 /* Data buffer offsets */
4447 #define TXBUFFER_BASE 0x100
....@@ -66,6 +69,15 @@
6669 #define REG_CON_STA_CFG(cfg) ((cfg) << 12)
6770 #define REG_CON_STO_CFG(cfg) ((cfg) << 14)
6871 
72
+enum {
73
+	RK_I2C_VERSION0 = 0,
74
+	RK_I2C_VERSION1,
75
+	RK_I2C_VERSION5 = 5,
76
+};
77
+
78
+#define REG_CON_VERSION GENMASK_ULL(24, 16)
79
+#define REG_CON_VERSION_SHIFT 16
80
+
6981 /* REG_MRXADDR bits */
7082 #define REG_MRXADDR_VALID(x) BIT(24 + (x)) /* [x*8+7:x*8] of MRX[R]ADDR valid */
7183 
....@@ -77,17 +89,22 @@
7789 #define REG_INT_START     BIT(4) /* START condition generated */
7890 #define REG_INT_STOP      BIT(5) /* STOP condition generated */
7991 #define REG_INT_NAKRCV    BIT(6) /* NACK received */
92
+#define REG_INT_SLV_HDSCL BIT(7) /* slave hold scl */
8093 #define REG_INT_ALL       0xff
8194 
8295 /* Disable i2c all irqs */
8396 #define IEN_ALL_DISABLE   0
8497 
98
+#define REG_CON1_AUTO_STOP BIT(0)
99
+#define REG_CON1_TRANSFER_AUTO_STOP BIT(1)
100
+#define REG_CON1_NACK_AUTO_STOP BIT(2)
101
+
85102 /* Constants */
86
-#define WAIT_TIMEOUT      1000 /* ms */
103
+#define WAIT_TIMEOUT      200 /* ms */
87104 #define DEFAULT_SCL_RATE  (100 * 1000) /* Hz */
88105 
89106 /**
90
- * struct i2c_spec_values:
107
+ * struct i2c_spec_values - I2C specification values for various modes
91108  * @min_hold_start_ns: min hold time (repeated) START condition
92109  * @min_low_ns: min LOW period of the SCL clock
93110  * @min_high_ns: min HIGH period of the SCL cloc
....@@ -143,7 +160,7 @@
143160 };
144161 
145162 /**
146
- * struct rk3x_i2c_calced_timings:
163
+ * struct rk3x_i2c_calced_timings - calculated V1 timings
147164  * @div_low: Divider output for low
148165  * @div_high: Divider output for high
149166  * @tuning: Used to adjust setup/hold data time,
....@@ -165,7 +182,7 @@
165182 };
166183 
167184 /**
168
- * struct rk3x_i2c_soc_data:
185
+ * struct rk3x_i2c_soc_data - SOC-specific data
169186  * @grf_offset: offset inside the grf regmap for setting the i2c type
170187  * @calc_timings: Callback function for i2c timing information calculated
171188  */
....@@ -197,6 +214,7 @@
197214  * @error: error code for i2c transfer
198215  * @i2c_restart_nb: make sure the i2c transfer to be finished
199216  * @system_restarting: true if system is restarting
217
+ * @tb_cl: client for rockchip thunder boot service
200218  */
201219 struct rk3x_i2c {
202220 	struct i2c_adapter adap;
....@@ -208,6 +226,10 @@
208226 	struct clk *clk;
209227 	struct clk *pclk;
210228 	struct notifier_block clk_rate_nb;
229
+	bool autostop_supported;
230
+
231
+	struct reset_control *reset;
232
+	struct reset_control *reset_apb;
211233 
212234 	/* Settings */
213235 	struct i2c_timings t;
....@@ -231,10 +253,12 @@
231253 
232254 	struct notifier_block i2c_restart_nb;
233255 	bool system_restarting;
256
+	struct rk_tb_client tb_cl;
257
+	int irq;
234258 };
235259 
236
-static int rk3x_i2c_fill_transmit_buf(struct rk3x_i2c *i2c, bool sended);
237260 static void rk3x_i2c_prepare_read(struct rk3x_i2c *i2c);
261
+static int rk3x_i2c_fill_transmit_buf(struct rk3x_i2c *i2c, bool sended);
238262 
239263 static inline void rk3x_i2c_wake_up(struct rk3x_i2c *i2c)
240264 {
....@@ -271,23 +295,70 @@
271295 	i2c_writel(i2c, val, REG_CON);
272296 }
273297 
298
+static bool rk3x_i2c_auto_stop(struct rk3x_i2c *i2c)
299
+{
300
+	unsigned int len, con1 = 0;
301
+
302
+	if (!i2c->autostop_supported)
303
+		return false;
304
+
305
+	if (!(i2c->msg->flags & I2C_M_IGNORE_NAK))
306
+		con1 = REG_CON1_NACK_AUTO_STOP | REG_CON1_AUTO_STOP;
307
+
308
+	if (!i2c->is_last_msg)
309
+		goto out;
310
+
311
+	len = i2c->msg->len - i2c->processed;
312
+
313
+	if (len > 32)
314
+		goto out;
315
+
316
+	/* For tx mode, one byte of the device address also needs to be counted,
317
+	 * if the data length is equal to 32, which is actually 33 bytes, it would
318
+	 * need to be divided into two parts, and needs to jump out of autostop.
319
+	 */
320
+	if (i2c->msg->len == 32 && i2c->mode == REG_CON_MOD_TX && !i2c->processed)
321
+		goto out;
322
+
323
+	i2c->state = STATE_STOP;
324
+
325
+	con1 |= REG_CON1_TRANSFER_AUTO_STOP | REG_CON1_AUTO_STOP;
326
+	i2c_writel(i2c, con1, REG_CON1);
327
+	if (con1 & REG_CON1_NACK_AUTO_STOP)
328
+		i2c_writel(i2c, REG_INT_STOP, REG_IEN);
329
+	else
330
+		i2c_writel(i2c, REG_INT_STOP | REG_INT_NAKRCV, REG_IEN);
331
+
332
+	return true;
333
+
334
+out:
335
+	i2c_writel(i2c, con1, REG_CON1);
336
+	return false;
337
+}
338
+
274339 /**
275
- * Generate a START condition, which triggers a REG_INT_START interrupt.
340
+ * rk3x_i2c_start - Generate a START condition, which triggers a REG_INT_START interrupt.
341
+ * @i2c: target controller data
276342  */
277343 static void rk3x_i2c_start(struct rk3x_i2c *i2c)
278344 {
279345 	u32 val = i2c_readl(i2c, REG_CON) & REG_CON_TUNING_MASK;
346
+	bool auto_stop = rk3x_i2c_auto_stop(i2c);
280347 	int length = 0;
281348 
282349 	/* enable appropriate interrupts */
283350 	if (i2c->mode == REG_CON_MOD_TX) {
284
-		i2c_writel(i2c, REG_INT_MBTF | REG_INT_NAKRCV, REG_IEN);
285
-		i2c->state = STATE_WRITE;
351
+		if (!auto_stop) {
352
+			i2c_writel(i2c, REG_INT_MBTF | REG_INT_NAKRCV, REG_IEN);
353
+			i2c->state = STATE_WRITE;
354
+		}
286355 		length = rk3x_i2c_fill_transmit_buf(i2c, false);
287356 	} else {
288357 		/* in any other case, we are going to be reading. */
289
-		i2c_writel(i2c, REG_INT_MBRF | REG_INT_NAKRCV, REG_IEN);
290
-		i2c->state = STATE_READ;
358
+		if (!auto_stop) {
359
+			i2c_writel(i2c, REG_INT_MBRF | REG_INT_NAKRCV, REG_IEN);
360
+			i2c->state = STATE_READ;
361
+		}
291362 	}
292363 
293364 	/* enable adapter with correct mode, send START condition */
....@@ -307,8 +378,8 @@
307378 }
308379 
309380 /**
310
- * Generate a STOP condition, which triggers a REG_INT_STOP interrupt.
311
- *
381
+ * rk3x_i2c_stop - Generate a STOP condition, which triggers a REG_INT_STOP interrupt.
382
+ * @i2c: target controller data
312383  * @error: Error code to return in rk3x_i2c_xfer
313384  */
314385 static void rk3x_i2c_stop(struct rk3x_i2c *i2c, int error)
....@@ -316,7 +387,6 @@
316387 	unsigned int ctrl;
317388 
318389 	i2c->processed = 0;
319
-	i2c->msg = NULL;
320390 	i2c->error = error;
321391 
322392 	if (i2c->is_last_msg) {
....@@ -333,6 +403,7 @@
333403 		/* Signal rk3x_i2c_xfer to start the next message. */
334404 		i2c->busy = false;
335405 		i2c->state = STATE_IDLE;
406
+		i2c->msg = NULL;
336407 
337408 		/*
338409 		 * The HW is actually not capable of REPEATED START. But we can
....@@ -348,7 +419,8 @@
348419 }
349420 
350421 /**
351
- * Setup a read according to i2c->msg
422
+ * rk3x_i2c_prepare_read - Setup a read according to i2c->msg
423
+ * @i2c: target controller data
352424  */
353425 static void rk3x_i2c_prepare_read(struct rk3x_i2c *i2c)
354426 {
....@@ -381,7 +453,8 @@
381453 }
382454 
383455 /**
384
- * Fill the transmit buffer with data from i2c->msg
456
+ * rk3x_i2c_fill_transmit_buf - Fill the transmit buffer with data from i2c->msg
457
+ * @i2c: target controller data
385458  */
386459 static int rk3x_i2c_fill_transmit_buf(struct rk3x_i2c *i2c, bool sendend)
387460 {
....@@ -424,7 +497,7 @@
424497 {
425498 	if (!(ipd & REG_INT_MBTF)) {
426499 		rk3x_i2c_stop(i2c, -EIO);
427
-		dev_err(i2c->dev, "unexpected irq in WRITE: 0x%x\n", ipd);
500
+		dev_warn_ratelimited(i2c->dev, "unexpected irq in WRITE: 0x%x\n", ipd);
428501 		rk3x_i2c_clean_ipd(i2c);
429502 		return;
430503 	}
....@@ -432,6 +505,7 @@
432505 	/* ack interrupt */
433506 	i2c_writel(i2c, REG_INT_MBTF, REG_IPD);
434507 
508
+	rk3x_i2c_auto_stop(i2c);
435509 	/* are we finished? */
436510 	if (i2c->processed == i2c->msg->len)
437511 		rk3x_i2c_stop(i2c, i2c->error);
....@@ -439,19 +513,12 @@
439513 		rk3x_i2c_fill_transmit_buf(i2c, true);
440514 }
441515 
442
-static void rk3x_i2c_handle_read(struct rk3x_i2c *i2c, unsigned int ipd)
516
+static void rk3x_i2c_read(struct rk3x_i2c *i2c)
443517 {
444518 	unsigned int i;
445519 	unsigned int len = i2c->msg->len - i2c->processed;
446
-	u32 uninitialized_var(val);
520
+	u32 val;
447521 	u8 byte;
448
-
449
-	/* we only care for MBRF here. */
450
-	if (!(ipd & REG_INT_MBRF))
451
-		return;
452
-
453
-	/* ack interrupt (read also produces a spurious START flag, clear it too) */
454
-	i2c_writel(i2c, REG_INT_MBRF | REG_INT_START, REG_IPD);
455522 
456523 	/* Can only handle a maximum of 32 bytes at a time */
457524 	if (len > 32)
....@@ -465,7 +532,21 @@
465532 		byte = (val >> ((i % 4) * 8)) & 0xff;
466533 		i2c->msg->buf[i2c->processed++] = byte;
467534 	}
535
+}
468536 
537
+static void rk3x_i2c_handle_read(struct rk3x_i2c *i2c, unsigned int ipd)
538
+{
539
+	/* we only care for MBRF here. */
540
+	if (!(ipd & REG_INT_MBRF))
541
+		return;
542
+
543
+	/* ack interrupt (read also produces a spurious START flag, clear it too) */
544
+	i2c_writel(i2c, REG_INT_MBRF | REG_INT_START, REG_IPD);
545
+
546
+	/* read the data from receive buffer */
547
+	rk3x_i2c_read(i2c);
548
+
549
+	rk3x_i2c_auto_stop(i2c);
469550 	/* are we finished? */
470551 	if (i2c->processed == i2c->msg->len)
471552 		rk3x_i2c_stop(i2c, i2c->error);
....@@ -479,9 +560,18 @@
479560 
480561 	if (!(ipd & REG_INT_STOP)) {
481562 		rk3x_i2c_stop(i2c, -EIO);
482
-		dev_err(i2c->dev, "unexpected irq in STOP: 0x%x\n", ipd);
563
+		dev_warn_ratelimited(i2c->dev, "unexpected irq in STOP: 0x%x\n", ipd);
483564 		rk3x_i2c_clean_ipd(i2c);
484565 		return;
566
+	}
567
+
568
+	if (i2c->autostop_supported && !i2c->error) {
569
+		if (i2c->mode != REG_CON_MOD_TX && i2c->msg) {
570
+			if ((i2c->msg->len - i2c->processed) > 0)
571
+				rk3x_i2c_read(i2c);
572
+		}
573
+
574
+		i2c->processed = 0;
485575 	}
486576 
487577 	/* ack interrupt */
....@@ -490,10 +580,13 @@
490580 	/* disable STOP bit */
491581 	con = i2c_readl(i2c, REG_CON);
492582 	con &= ~REG_CON_STOP;
583
+	if (i2c->autostop_supported)
584
+		con &= ~REG_CON_START;
493585 	i2c_writel(i2c, con, REG_CON);
494586 
495587 	i2c->busy = false;
496588 	i2c->state = STATE_IDLE;
589
+	i2c->msg = NULL;
497590 
498591 	/* signal rk3x_i2c_xfer that we are finished */
499592 	rk3x_i2c_wake_up(i2c);
....@@ -518,7 +611,7 @@
518611 	dev_dbg(i2c->dev, "IRQ: state %d, ipd: %x\n", i2c->state, ipd);
519612 
520613 	/* Clean interrupt bits we don't care about */
521
-	ipd &= ~(REG_INT_BRF | REG_INT_BTF);
614
+	ipd &= ~(REG_INT_BRF | REG_INT_BTF | REG_INT_START);
522615 
523616 	if (ipd & REG_INT_NAKRCV) {
524617 		/*
....@@ -531,8 +624,13 @@
531624 		ipd &= ~REG_INT_NAKRCV;
532625 
533626 		if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
534
-			rk3x_i2c_stop(i2c, -ENXIO);
535
-			goto out;
627
+			if (i2c->autostop_supported) {
628
+				i2c->error = -ENXIO;
629
+				i2c->state = STATE_STOP;
630
+			} else {
631
+				rk3x_i2c_stop(i2c, -ENXIO);
632
+				goto out;
633
+			}
536634 		}
537635 	}
538636 
....@@ -560,30 +658,28 @@
560658 }
561659 
562660 /**
563
- * Get timing values of I2C specification
564
- *
661
+ * rk3x_i2c_get_spec - Get timing values of I2C specification
565662  * @speed: Desired SCL frequency
566663  *
567
- * Returns: Matched i2c spec values.
664
+ * Return: Matched i2c_spec_values.
568665  */
569666 static const struct i2c_spec_values *rk3x_i2c_get_spec(unsigned int speed)
570667 {
571
-	if (speed <= 100000)
668
+	if (speed <= I2C_MAX_STANDARD_MODE_FREQ)
572669 		return &standard_mode_spec;
573
-	else if (speed <= 400000)
670
+	else if (speed <= I2C_MAX_FAST_MODE_FREQ)
574671 		return &fast_mode_spec;
575672 	else
576673 		return &fast_mode_plus_spec;
577674 }
578675 
579676 /**
580
- * Calculate divider values for desired SCL frequency
581
- *
677
+ * rk3x_i2c_v0_calc_timings - Calculate divider values for desired SCL frequency
582678  * @clk_rate: I2C input clock rate
583679  * @t: Known I2C timing information
584680  * @t_calc: Caculated rk3x private timings that would be written into regs
585681  *
586
- * Returns: 0 on success, -EINVAL if the goal SCL rate is too slow. In that case
682
+ * Return: %0 on success, -%EINVAL if the goal SCL rate is too slow. In that case
587683  * a best-effort divider value is returned in divs. If the target rate is
588684  * too high, we silently use the highest possible rate.
589685  */
....@@ -607,8 +703,8 @@
607703 	int ret = 0;
608704 
609705 	/* Only support standard-mode and fast-mode */
610
-	if (WARN_ON(t->bus_freq_hz > 400000))
611
-		t->bus_freq_hz = 400000;
706
+	if (WARN_ON(t->bus_freq_hz > I2C_MAX_FAST_MODE_FREQ))
707
+		t->bus_freq_hz = I2C_MAX_FAST_MODE_FREQ;
612708 
613709 	/* prevent scl_rate_khz from becoming 0 */
614710 	if (WARN_ON(t->bus_freq_hz < 1000))
....@@ -738,13 +834,12 @@
738834 }
739835 
740836 /**
741
- * Calculate timing values for desired SCL frequency
742
- *
837
+ * rk3x_i2c_v1_calc_timings - Calculate timing values for desired SCL frequency
743838  * @clk_rate: I2C input clock rate
744839  * @t: Known I2C timing information
745840  * @t_calc: Caculated rk3x private timings that would be written into regs
746841  *
747
- * Returns: 0 on success, -EINVAL if the goal SCL rate is too slow. In that case
842
+ * Return: %0 on success, -%EINVAL if the goal SCL rate is too slow. In that case
748843  * a best-effort divider value is returned in divs. If the target rate is
749844  * too high, we silently use the highest possible rate.
750845  * The following formulas are v1's method to calculate timings.
....@@ -787,8 +882,8 @@
787882 	int ret = 0;
788883 
789884 	/* Support standard-mode, fast-mode and fast-mode plus */
790
-	if (WARN_ON(t->bus_freq_hz > 1000000))
791
-		t->bus_freq_hz = 1000000;
885
+	if (WARN_ON(t->bus_freq_hz > I2C_MAX_FAST_MODE_PLUS_FREQ))
886
+		t->bus_freq_hz = I2C_MAX_FAST_MODE_PLUS_FREQ;
792887 
793888 	/* prevent scl_rate_khz from becoming 0 */
794889 	if (WARN_ON(t->bus_freq_hz < 1000))
....@@ -901,9 +996,10 @@
901996 {
902997 	struct i2c_timings *t = &i2c->t;
903998 	struct rk3x_i2c_calced_timings calc;
999
+	unsigned long period, time_hold = (WAIT_TIMEOUT / 2) * 1000000;
9041000 	u64 t_low_ns, t_high_ns;
9051001 	unsigned long flags;
906
-	u32 val;
1002
+	u32 val, cnt;
9071003 	int ret;
9081004 
9091005 	ret = i2c->soc_data->calc_timings(clk_rate, t, &calc);
....@@ -918,6 +1014,10 @@
9181014 	i2c_writel(i2c, val, REG_CON);
9191015 	i2c_writel(i2c, (calc.div_high << 16) | (calc.div_low & 0xffff),
9201016 		   REG_CLKDIV);
1017
+
1018
+	period = DIV_ROUND_UP(1000000000, clk_rate);
1019
+	cnt = DIV_ROUND_UP(time_hold, period);
1020
+	i2c_writel(i2c, cnt, REG_SCL_OE_DB);
9211021 	spin_unlock_irqrestore(&i2c->lock, flags);
9221022 
9231023 	clk_disable(i2c->pclk);
....@@ -988,14 +1088,14 @@
9881088 }
9891089 
9901090 /**
991
- * Setup I2C registers for an I2C operation specified by msgs, num.
992
- *
993
- * Must be called with i2c->lock held.
994
- *
1091
+ * rk3x_i2c_setup - Setup I2C registers for an I2C operation specified by msgs, num.
1092
+ * @i2c: target controller data
9951093  * @msgs: I2C msgs to process
9961094  * @num: Number of msgs
9971095  *
998
- * returns: Number of I2C msgs processed or negative in case of error
1096
+ * Must be called with i2c->lock held.
1097
+ *
1098
+ * Return: Number of I2C msgs processed or negative in case of error
9991099  */
10001100 static int rk3x_i2c_setup(struct rk3x_i2c *i2c, struct i2c_msg *msgs, int num)
10011101 {
....@@ -1064,16 +1164,49 @@
10641164 	i2c->error = 0;
10651165 
10661166 	rk3x_i2c_clean_ipd(i2c);
1167
+	if (i2c->autostop_supported)
1168
+		i2c_writel(i2c, 0, REG_CON1);
10671169 
10681170 	return ret;
10691171 }
10701172 
1071
-static int rk3x_i2c_xfer(struct i2c_adapter *adap,
1072
-			 struct i2c_msg *msgs, int num)
1173
+static int rk3x_i2c_wait_xfer_poll(struct rk3x_i2c *i2c, unsigned long xfer_time)
1174
+{
1175
+	ktime_t timeout = ktime_add_ms(ktime_get(), xfer_time);
1176
+
1177
+	while (READ_ONCE(i2c->busy) &&
1178
+	       ktime_compare(ktime_get(), timeout) < 0) {
1179
+		udelay(5);
1180
+		rk3x_i2c_irq(0, i2c);
1181
+	}
1182
+
1183
+	return !i2c->busy;
1184
+}
1185
+
1186
+/*
1187
+ * Reset i2c controller, reset all i2c registers.
1188
+ */
1189
+static void rk3x_i2c_reset_controller(struct rk3x_i2c *i2c)
1190
+{
1191
+	if (!IS_ERR_OR_NULL(i2c->reset)) {
1192
+		reset_control_assert(i2c->reset);
1193
+		udelay(10);
1194
+		reset_control_deassert(i2c->reset);
1195
+	}
1196
+
1197
+	if (!IS_ERR_OR_NULL(i2c->reset_apb)) {
1198
+		reset_control_assert(i2c->reset_apb);
1199
+		udelay(10);
1200
+		reset_control_deassert(i2c->reset_apb);
1201
+	}
1202
+}
1203
+
1204
+static int rk3x_i2c_xfer_common(struct i2c_adapter *adap,
1205
+				struct i2c_msg *msgs, int num, bool polling)
10731206 {
10741207 	struct rk3x_i2c *i2c = (struct rk3x_i2c *)adap->algo_data;
10751208 	unsigned long timeout, flags;
1076
-	u32 val;
1209
+	u32 val, ipd = 0;
10771210 	int ret = 0;
10781211 	int i;
10791212 
....@@ -1092,12 +1225,26 @@
10921225 	 * rk3x_i2c_setup()).
10931226 	 */
10941227 	for (i = 0; i < num; i += ret) {
1095
-		ret = rk3x_i2c_setup(i2c, msgs + i, num - i);
1228
+		unsigned long xfer_time = WAIT_TIMEOUT;
1229
+		int len;
10961230 
1231
+		ret = rk3x_i2c_setup(i2c, msgs + i, num - i);
10971232 		if (ret < 0) {
10981233 			dev_err(i2c->dev, "rk3x_i2c_setup() failed\n");
10991234 			break;
11001235 		}
1236
+
1237
+		/*
1238
+		 * Transfer time in mSec = Total bits / transfer rate + interval time
1239
+		 * Total bits = 9 bits per byte (including ACK bit) + Start & stop bits
1240
+		 */
1241
+		if (ret == 2)
1242
+			len = msgs[i + 1].len;
1243
+		else
1244
+			len = msgs[i].len;
1245
+		xfer_time += len / 64;
1246
+		xfer_time += DIV_ROUND_CLOSEST(((len * 9) + 2) * MSEC_PER_SEC,
1247
+					       i2c->t.bus_freq_hz);
11011248 
11021249 		if (i + ret >= num)
11031250 			i2c->is_last_msg = true;
....@@ -1106,14 +1253,19 @@
11061253 
11071254 		spin_unlock_irqrestore(&i2c->lock, flags);
11081255 
1109
-		timeout = wait_event_timeout(i2c->wait, !i2c->busy,
1110
-					     msecs_to_jiffies(WAIT_TIMEOUT));
1256
+		if (!polling) {
1257
+			timeout = wait_event_timeout(i2c->wait, !i2c->busy,
1258
+						     msecs_to_jiffies(xfer_time));
1259
+		} else {
1260
+			timeout = rk3x_i2c_wait_xfer_poll(i2c, xfer_time);
1261
+		}
11111262 
11121263 		spin_lock_irqsave(&i2c->lock, flags);
11131264 
11141265 		if (timeout == 0) {
1266
+			ipd = i2c_readl(i2c, REG_IPD);
11151267 			dev_err(i2c->dev, "timeout, ipd: 0x%02x, state: %d\n",
1116
-				i2c_readl(i2c, REG_IPD), i2c->state);
1268
+				ipd, i2c->state);
11171269 
11181270 			/* Force a STOP condition without interrupt */
11191271 			rk3x_i2c_disable_irq(i2c);
....@@ -1141,7 +1293,25 @@
11411293 
11421294 	spin_unlock_irqrestore(&i2c->lock, flags);
11431295 
1296
+	if ((ret == -ETIMEDOUT) && (ipd & REG_INT_SLV_HDSCL)) {
1297
+		rk3x_i2c_reset_controller(i2c);
1298
+		dev_err(i2c->dev, "SCL hold by slave, check your device.\n");
1299
+		rk3x_i2c_adapt_div(i2c, clk_get_rate(i2c->clk));
1300
+	}
1301
+
11441302 	return ret < 0 ? ret : num;
1303
+}
1304
+
1305
+static int rk3x_i2c_xfer(struct i2c_adapter *adap,
1306
+			 struct i2c_msg *msgs, int num)
1307
+{
1308
+	return rk3x_i2c_xfer_common(adap, msgs, num, false);
1309
+}
1310
+
1311
+static int rk3x_i2c_xfer_polling(struct i2c_adapter *adap,
1312
+				 struct i2c_msg *msgs, int num)
1313
+{
1314
+	return rk3x_i2c_xfer_common(adap, msgs, num, true);
11451315 }
11461316 
11471317 static int rk3x_i2c_restart_notify(struct notifier_block *this,
....@@ -1177,6 +1347,57 @@
11771347 
11781348 	return NOTIFY_DONE;
11791349 }
1350
+
1351
+static unsigned int rk3x_i2c_get_version(struct rk3x_i2c *i2c)
1352
+{
1353
+	unsigned int version;
1354
+
1355
+	clk_enable(i2c->pclk);
1356
+	version = i2c_readl(i2c, REG_CON) & REG_CON_VERSION;
1357
+	clk_disable(i2c->pclk);
1358
+	version >>= REG_CON_VERSION_SHIFT;
1359
+
1360
+	return version;
1361
+}
1362
+
1363
+static int rk3x_i2c_of_get_bus_id(struct device *dev, struct rk3x_i2c *priv)
1364
+{
1365
+	int bus_id = -1;
1366
+
1367
+	if (IS_ENABLED(CONFIG_OF) && dev->of_node)
1368
+		bus_id = of_alias_get_id(dev->of_node, "i2c");
1369
+
1370
+	return bus_id;
1371
+}
1372
+
1373
+#ifdef CONFIG_ACPI
1374
+static int rk3x_i2c_acpi_get_bus_id(struct device *dev, struct rk3x_i2c *priv)
1375
+{
1376
+	struct acpi_device *adev;
1377
+	unsigned long bus_id = -1;
1378
+	const char *uid;
1379
+	int ret;
1380
+
1381
+	adev = ACPI_COMPANION(dev);
1382
+	if (!adev)
1383
+		return -ENXIO;
1384
+
1385
+	uid = acpi_device_uid(adev);
1386
+	if (!uid || !(*uid)) {
1387
+		dev_err(dev, "Cannot retrieve UID\n");
1388
+		return -ENODEV;
1389
+	}
1390
+
1391
+	ret = kstrtoul(uid, 0, &bus_id);
1392
+
1393
+	return !ret ? bus_id : -ERANGE;
1394
+}
1395
+#else
1396
+static int rk3x_i2c_acpi_get_bus_id(struct device *dev, struct rk3x_i2c *priv)
1397
+{
1398
+	return -ENOENT;
1399
+}
1400
+#endif /* CONFIG_ACPI */
11801401 
11811402 static __maybe_unused int rk3x_i2c_suspend_noirq(struct device *dev)
11821403 {
....@@ -1217,6 +1438,7 @@
12171438 
12181439 static const struct i2c_algorithm rk3x_i2c_algorithm = {
12191440 	.master_xfer		= rk3x_i2c_xfer,
1441
+	.master_xfer_atomic	= rk3x_i2c_xfer_polling,
12201442 	.functionality		= rk3x_i2c_func,
12211443 };
12221444 
....@@ -1288,12 +1510,38 @@
12881510 };
12891511 MODULE_DEVICE_TABLE(of, rk3x_i2c_match);
12901512 
1513
+static void rk3x_i2c_tb_cb(void *data)
1514
+{
1515
+	unsigned long clk_rate;
1516
+	int ret;
1517
+	struct rk3x_i2c *i2c = (struct rk3x_i2c *)data;
1518
+
1519
+	if (i2c->clk) {
1520
+		i2c->clk_rate_nb.notifier_call = rk3x_i2c_clk_notifier_cb;
1521
+		ret = clk_notifier_register(i2c->clk, &i2c->clk_rate_nb);
1522
+		if (ret != 0) {
1523
+			dev_err(i2c->dev, "Unable to register clock notifier\n");
1524
+			clk_unprepare(i2c->pclk);
1525
+			clk_unprepare(i2c->clk);
1526
+			return;
1527
+		}
1528
+	}
1529
+
1530
+	clk_rate = clk_get_rate(i2c->clk);
1531
+	if (!clk_rate)
1532
+		device_property_read_u32(i2c->dev, "i2c,clk-rate", (u32 *)&clk_rate);
1533
+
1534
+	rk3x_i2c_adapt_div(i2c, clk_rate);
1535
+	if (rk3x_i2c_get_version(i2c) >= RK_I2C_VERSION5)
1536
+		i2c->autostop_supported = true;
1537
+	enable_irq(i2c->irq);
1538
+}
1539
+
12911540 static int rk3x_i2c_probe(struct platform_device *pdev)
12921541 {
1542
+	struct fwnode_handle *fw = dev_fwnode(&pdev->dev);
12931543 	struct device_node *np = pdev->dev.of_node;
1294
-	const struct of_device_id *match;
12951544 	struct rk3x_i2c *i2c;
1296
-	struct resource *mem;
12971545 	int ret = 0;
12981546 	u32 value;
12991547 	int irq;
....@@ -1303,8 +1551,16 @@
13031551 	if (!i2c)
13041552 		return -ENOMEM;
13051553 
1306
-	match = of_match_node(rk3x_i2c_match, np);
1307
-	i2c->soc_data = match->data;
1554
+	i2c->soc_data = (struct rk3x_i2c_soc_data *)device_get_match_data(&pdev->dev);
1555
+
1556
+	ret = rk3x_i2c_acpi_get_bus_id(&pdev->dev, i2c);
1557
+	if (ret < 0) {
1558
+		ret = rk3x_i2c_of_get_bus_id(&pdev->dev, i2c);
1559
+		if (ret < 0)
1560
+			return ret;
1561
+	}
1562
+
1563
+	i2c->adap.nr = ret;
13081564 
13091565 	/* use common interface to get I2C timing properties */
13101566 	i2c_parse_fw_timings(&pdev->dev, &i2c->t, true);
....@@ -1313,9 +1569,10 @@
13131569 	i2c->adap.owner = THIS_MODULE;
13141570 	i2c->adap.algo = &rk3x_i2c_algorithm;
13151571 	i2c->adap.retries = 3;
1316
-	i2c->adap.dev.of_node = np;
1572
+	i2c->adap.dev.of_node = pdev->dev.of_node;
13171573 	i2c->adap.algo_data = i2c;
13181574 	i2c->adap.dev.parent = &pdev->dev;
1575
+	i2c->adap.dev.fwnode = fw;
13191576 
13201577 	i2c->dev = &pdev->dev;
13211578 
....@@ -1330,8 +1587,7 @@
13301587 		return ret;
13311588 	}
13321589 
1333
-	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1334
-	i2c->regs = devm_ioremap_resource(&pdev->dev, mem);
1590
+	i2c->regs = devm_platform_ioremap_resource(pdev, 0);
13351591 	if (IS_ERR(i2c->regs))
13361592 		return PTR_ERR(i2c->regs);
13371593 
....@@ -1344,14 +1600,7 @@
13441600 
13451601 		grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
13461602 		if (!IS_ERR(grf)) {
1347
-			int bus_nr;
1348
-
1349
-			/* Try to set the I2C adapter number from dt */
1350
-			bus_nr = of_alias_get_id(np, "i2c");
1351
-			if (bus_nr < 0) {
1352
-				dev_err(&pdev->dev, "rk3x-i2c needs i2cX alias");
1353
-				return -EINVAL;
1354
-			}
1603
+			int bus_nr = i2c->adap.nr;
13551604 
13561605 			if (i2c->soc_data == &rv1108_soc_data && bus_nr == 2)
13571606 				/* rv1108 i2c2 set grf offset-0x408, bit-10 */
....@@ -1376,9 +1625,15 @@
13761625 
13771626 	/* IRQ setup */
13781627 	irq = platform_get_irq(pdev, 0);
1379
-	if (irq < 0) {
1380
-		dev_err(&pdev->dev, "cannot find rk3x IRQ\n");
1628
+	if (irq < 0)
13811629 		return irq;
1630
+	i2c->irq = irq;
1631
+
1632
+	if (IS_ENABLED(CONFIG_ROCKCHIP_THUNDER_BOOT_SERVICE) &&
1633
+	    device_property_read_bool(&pdev->dev, "rockchip,amp-shared")) {
1634
+		i2c->tb_cl.data = i2c;
1635
+		i2c->tb_cl.cb = rk3x_i2c_tb_cb;
1636
+		irq_set_status_flags(irq, IRQ_NOAUTOEN);
13821637 	}
13831638 
13841639 	ret = devm_request_irq(&pdev->dev, irq, rk3x_i2c_irq,
....@@ -1390,26 +1645,25 @@
13901645 
13911646 	platform_set_drvdata(pdev, i2c);
13921647 
1393
-	if (i2c->soc_data->calc_timings == rk3x_i2c_v0_calc_timings) {
1394
-		/* Only one clock to use for bus clock and peripheral clock */
1395
-		i2c->clk = devm_clk_get(&pdev->dev, NULL);
1396
-		i2c->pclk = i2c->clk;
1397
-	} else {
1398
-		i2c->clk = devm_clk_get(&pdev->dev, "i2c");
1399
-		i2c->pclk = devm_clk_get(&pdev->dev, "pclk");
1400
-	}
1648
+	i2c->reset = devm_reset_control_get(&pdev->dev, "i2c");
1649
+	if (!has_acpi_companion(&pdev->dev)) {
1650
+		if (i2c->soc_data->calc_timings == rk3x_i2c_v0_calc_timings) {
1651
+			/* Only one clock to use for bus clock and peripheral clock */
1652
+			i2c->clk = devm_clk_get(&pdev->dev, NULL);
1653
+			i2c->pclk = i2c->clk;
1654
+		} else {
1655
+			i2c->clk = devm_clk_get(&pdev->dev, "i2c");
1656
+			i2c->pclk = devm_clk_get(&pdev->dev, "pclk");
1657
+			i2c->reset_apb = devm_reset_control_get(&pdev->dev, "apb");
1658
+		}
14011659 
1402
-	if (IS_ERR(i2c->clk)) {
1403
-		ret = PTR_ERR(i2c->clk);
1404
-		if (ret != -EPROBE_DEFER)
1405
-			dev_err(&pdev->dev, "Can't get bus clk: %d\n", ret);
1406
-		return ret;
1407
-	}
1408
-	if (IS_ERR(i2c->pclk)) {
1409
-		ret = PTR_ERR(i2c->pclk);
1410
-		if (ret != -EPROBE_DEFER)
1411
-			dev_err(&pdev->dev, "Can't get periph clk: %d\n", ret);
1412
-		return ret;
1660
+		if (IS_ERR(i2c->clk))
1661
+			return dev_err_probe(&pdev->dev, PTR_ERR(i2c->clk),
1662
+					     "Can't get bus clk\n");
1663
+
1664
+		if (IS_ERR(i2c->pclk))
1665
+			return dev_err_probe(&pdev->dev, PTR_ERR(i2c->pclk),
1666
+					     "Can't get periph clk\n");
14131667 	}
14141668 
14151669 	ret = clk_prepare(i2c->clk);
....@@ -1423,17 +1677,29 @@
14231677 		goto err_clk;
14241678 	}
14251679 
1426
-	i2c->clk_rate_nb.notifier_call = rk3x_i2c_clk_notifier_cb;
1427
-	ret = clk_notifier_register(i2c->clk, &i2c->clk_rate_nb);
1428
-	if (ret != 0) {
1429
-		dev_err(&pdev->dev, "Unable to register clock notifier\n");
1430
-		goto err_pclk;
1680
+	if (IS_ENABLED(CONFIG_ROCKCHIP_THUNDER_BOOT_SERVICE) && i2c->tb_cl.cb) {
1681
+		rk_tb_client_register_cb(&i2c->tb_cl);
1682
+	} else {
1683
+		if (i2c->clk) {
1684
+			i2c->clk_rate_nb.notifier_call = rk3x_i2c_clk_notifier_cb;
1685
+			ret = clk_notifier_register(i2c->clk, &i2c->clk_rate_nb);
1686
+			if (ret != 0) {
1687
+				dev_err(&pdev->dev, "Unable to register clock notifier\n");
1688
+				goto err_pclk;
1689
+			}
1690
+		}
1691
+
1692
+		clk_rate = clk_get_rate(i2c->clk);
1693
+		if (!clk_rate)
1694
+			device_property_read_u32(&pdev->dev, "i2c,clk-rate", (u32 *)&clk_rate);
1695
+
1696
+		rk3x_i2c_adapt_div(i2c, clk_rate);
1697
+
1698
+		if (rk3x_i2c_get_version(i2c) >= RK_I2C_VERSION5)
1699
+			i2c->autostop_supported = true;
14311700 	}
14321701 
1433
-	clk_rate = clk_get_rate(i2c->clk);
1434
-	rk3x_i2c_adapt_div(i2c, clk_rate);
1435
-
1436
-	ret = i2c_add_adapter(&i2c->adap);
1702
+	ret = i2c_add_numbered_adapter(&i2c->adap);
14371703 	if (ret < 0)
14381704 		goto err_clk_notifier;
14391705 
....@@ -1462,7 +1728,7 @@
14621728 	return 0;
14631729 }
14641730 
1465
-const static struct dev_pm_ops rk3x_i2c_pm_ops = {
1731
+static const struct dev_pm_ops rk3x_i2c_pm_ops = {
14661732 	SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(rk3x_i2c_suspend_noirq,
14671733 				      rk3x_i2c_resume_noirq)
14681734 };
....@@ -1482,7 +1748,11 @@
14821748 {
14831749 	return platform_driver_register(&rk3x_i2c_driver);
14841750 }
1751
+#ifdef CONFIG_INITCALL_ASYNC
14851752 subsys_initcall_sync(rk3x_i2c_driver_init);
1753
+#else
1754
+subsys_initcall(rk3x_i2c_driver_init);
1755
+#endif
14861756 
14871757 static void __exit rk3x_i2c_driver_exit(void)
14881758 {