hc
2024-10-12 a5969cabbb4660eab42b6ef0412cbbd1200cf14d
kernel/drivers/i2c/busses/i2c-qup.c
....@@ -136,13 +136,8 @@
136136 */
137137 #define TOUT_MIN 2
138138
139
-/* I2C Frequency Modes */
140
-#define I2C_STANDARD_FREQ 100000
141
-#define I2C_FAST_MODE_FREQ 400000
142
-#define I2C_FAST_MODE_PLUS_FREQ 1000000
143
-
144139 /* Default values. Use these if FW query fails */
145
-#define DEFAULT_CLK_FREQ I2C_STANDARD_FREQ
140
+#define DEFAULT_CLK_FREQ I2C_MAX_STANDARD_MODE_FREQ
146141 #define DEFAULT_SRC_CLK 20000000
147142
148143 /*
....@@ -628,7 +623,7 @@
628623 int err;
629624
630625 if (!qup->btx.dma) {
631
- qup->btx.dma = dma_request_slave_channel_reason(qup->dev, "tx");
626
+ qup->btx.dma = dma_request_chan(qup->dev, "tx");
632627 if (IS_ERR(qup->btx.dma)) {
633628 err = PTR_ERR(qup->btx.dma);
634629 qup->btx.dma = NULL;
....@@ -638,7 +633,7 @@
638633 }
639634
640635 if (!qup->brx.dma) {
641
- qup->brx.dma = dma_request_slave_channel_reason(qup->dev, "rx");
636
+ qup->brx.dma = dma_request_chan(qup->dev, "rx");
642637 if (IS_ERR(qup->brx.dma)) {
643638 dev_err(qup->dev, "\n rx channel not available");
644639 err = PTR_ERR(qup->brx.dma);
....@@ -962,10 +957,8 @@
962957 u32 qup_config = I2C_MINI_CORE | I2C_N_VAL;
963958 u32 io_mode = QUP_REPACK_EN;
964959
965
- blk->is_tx_blk_mode =
966
- blk->total_tx_len > qup->out_fifo_sz ? true : false;
967
- blk->is_rx_blk_mode =
968
- blk->total_rx_len > qup->in_fifo_sz ? true : false;
960
+ blk->is_tx_blk_mode = blk->total_tx_len > qup->out_fifo_sz;
961
+ blk->is_rx_blk_mode = blk->total_rx_len > qup->in_fifo_sz;
969962
970963 if (blk->is_tx_blk_mode) {
971964 io_mode |= QUP_OUTPUT_BLK_MODE;
....@@ -1534,9 +1527,9 @@
15341527 qup->use_dma = true;
15351528 } else {
15361529 qup->blk.is_tx_blk_mode = max_tx_len > qup->out_fifo_sz -
1537
- QUP_MAX_TAGS_LEN ? true : false;
1530
+ QUP_MAX_TAGS_LEN;
15381531 qup->blk.is_rx_blk_mode = max_rx_len > qup->in_fifo_sz -
1539
- READ_RX_TAGS_LEN ? true : false;
1532
+ READ_RX_TAGS_LEN;
15401533 }
15411534
15421535 return 0;
....@@ -1666,7 +1659,6 @@
16661659 static const int blk_sizes[] = {4, 16, 32};
16671660 struct qup_i2c_dev *qup;
16681661 unsigned long one_bit_t;
1669
- struct resource *res;
16701662 u32 io_mode, hw_ver, size;
16711663 int ret, fs_div, hs_div;
16721664 u32 src_clk_freq = DEFAULT_SRC_CLK;
....@@ -1757,21 +1749,23 @@
17571749
17581750 nodma:
17591751 /* We support frequencies up to FAST Mode Plus (1MHz) */
1760
- if (!clk_freq || clk_freq > I2C_FAST_MODE_PLUS_FREQ) {
1752
+ if (!clk_freq || clk_freq > I2C_MAX_FAST_MODE_PLUS_FREQ) {
17611753 dev_err(qup->dev, "clock frequency not supported %d\n",
17621754 clk_freq);
1763
- return -EINVAL;
1755
+ ret = -EINVAL;
1756
+ goto fail_dma;
17641757 }
17651758
1766
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1767
- qup->base = devm_ioremap_resource(qup->dev, res);
1768
- if (IS_ERR(qup->base))
1769
- return PTR_ERR(qup->base);
1759
+ qup->base = devm_platform_ioremap_resource(pdev, 0);
1760
+ if (IS_ERR(qup->base)) {
1761
+ ret = PTR_ERR(qup->base);
1762
+ goto fail_dma;
1763
+ }
17701764
17711765 qup->irq = platform_get_irq(pdev, 0);
17721766 if (qup->irq < 0) {
1773
- dev_err(qup->dev, "No IRQ defined\n");
1774
- return qup->irq;
1767
+ ret = qup->irq;
1768
+ goto fail_dma;
17751769 }
17761770
17771771 if (has_acpi_companion(qup->dev)) {
....@@ -1786,13 +1780,15 @@
17861780 qup->clk = devm_clk_get(qup->dev, "core");
17871781 if (IS_ERR(qup->clk)) {
17881782 dev_err(qup->dev, "Could not get core clock\n");
1789
- return PTR_ERR(qup->clk);
1783
+ ret = PTR_ERR(qup->clk);
1784
+ goto fail_dma;
17901785 }
17911786
17921787 qup->pclk = devm_clk_get(qup->dev, "iface");
17931788 if (IS_ERR(qup->pclk)) {
17941789 dev_err(qup->dev, "Could not get iface clock\n");
1795
- return PTR_ERR(qup->pclk);
1790
+ ret = PTR_ERR(qup->pclk);
1791
+ goto fail_dma;
17961792 }
17971793 qup_i2c_enable_clocks(qup);
17981794 src_clk_freq = clk_get_rate(qup->clk);
....@@ -1862,7 +1858,7 @@
18621858 qup->in_fifo_sz = qup->in_blk_sz * (2 << size);
18631859
18641860 hs_div = 3;
1865
- if (clk_freq <= I2C_STANDARD_FREQ) {
1861
+ if (clk_freq <= I2C_MAX_STANDARD_MODE_FREQ) {
18661862 fs_div = ((src_clk_freq / clk_freq) / 2) - 3;
18671863 qup->clk_ctl = (hs_div << 8) | (fs_div & 0xff);
18681864 } else {