.. | .. |
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136 | 136 | */ |
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137 | 137 | #define TOUT_MIN 2 |
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138 | 138 | |
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139 | | -/* I2C Frequency Modes */ |
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140 | | -#define I2C_STANDARD_FREQ 100000 |
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141 | | -#define I2C_FAST_MODE_FREQ 400000 |
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142 | | -#define I2C_FAST_MODE_PLUS_FREQ 1000000 |
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143 | | - |
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144 | 139 | /* Default values. Use these if FW query fails */ |
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145 | | -#define DEFAULT_CLK_FREQ I2C_STANDARD_FREQ |
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| 140 | +#define DEFAULT_CLK_FREQ I2C_MAX_STANDARD_MODE_FREQ |
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146 | 141 | #define DEFAULT_SRC_CLK 20000000 |
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147 | 142 | |
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148 | 143 | /* |
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.. | .. |
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628 | 623 | int err; |
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629 | 624 | |
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630 | 625 | if (!qup->btx.dma) { |
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631 | | - qup->btx.dma = dma_request_slave_channel_reason(qup->dev, "tx"); |
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| 626 | + qup->btx.dma = dma_request_chan(qup->dev, "tx"); |
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632 | 627 | if (IS_ERR(qup->btx.dma)) { |
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633 | 628 | err = PTR_ERR(qup->btx.dma); |
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634 | 629 | qup->btx.dma = NULL; |
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.. | .. |
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638 | 633 | } |
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639 | 634 | |
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640 | 635 | if (!qup->brx.dma) { |
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641 | | - qup->brx.dma = dma_request_slave_channel_reason(qup->dev, "rx"); |
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| 636 | + qup->brx.dma = dma_request_chan(qup->dev, "rx"); |
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642 | 637 | if (IS_ERR(qup->brx.dma)) { |
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643 | 638 | dev_err(qup->dev, "\n rx channel not available"); |
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644 | 639 | err = PTR_ERR(qup->brx.dma); |
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.. | .. |
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962 | 957 | u32 qup_config = I2C_MINI_CORE | I2C_N_VAL; |
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963 | 958 | u32 io_mode = QUP_REPACK_EN; |
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964 | 959 | |
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965 | | - blk->is_tx_blk_mode = |
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966 | | - blk->total_tx_len > qup->out_fifo_sz ? true : false; |
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967 | | - blk->is_rx_blk_mode = |
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968 | | - blk->total_rx_len > qup->in_fifo_sz ? true : false; |
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| 960 | + blk->is_tx_blk_mode = blk->total_tx_len > qup->out_fifo_sz; |
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| 961 | + blk->is_rx_blk_mode = blk->total_rx_len > qup->in_fifo_sz; |
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969 | 962 | |
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970 | 963 | if (blk->is_tx_blk_mode) { |
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971 | 964 | io_mode |= QUP_OUTPUT_BLK_MODE; |
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.. | .. |
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1534 | 1527 | qup->use_dma = true; |
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1535 | 1528 | } else { |
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1536 | 1529 | qup->blk.is_tx_blk_mode = max_tx_len > qup->out_fifo_sz - |
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1537 | | - QUP_MAX_TAGS_LEN ? true : false; |
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| 1530 | + QUP_MAX_TAGS_LEN; |
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1538 | 1531 | qup->blk.is_rx_blk_mode = max_rx_len > qup->in_fifo_sz - |
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1539 | | - READ_RX_TAGS_LEN ? true : false; |
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| 1532 | + READ_RX_TAGS_LEN; |
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1540 | 1533 | } |
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1541 | 1534 | |
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1542 | 1535 | return 0; |
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.. | .. |
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1666 | 1659 | static const int blk_sizes[] = {4, 16, 32}; |
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1667 | 1660 | struct qup_i2c_dev *qup; |
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1668 | 1661 | unsigned long one_bit_t; |
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1669 | | - struct resource *res; |
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1670 | 1662 | u32 io_mode, hw_ver, size; |
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1671 | 1663 | int ret, fs_div, hs_div; |
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1672 | 1664 | u32 src_clk_freq = DEFAULT_SRC_CLK; |
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.. | .. |
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1757 | 1749 | |
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1758 | 1750 | nodma: |
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1759 | 1751 | /* We support frequencies up to FAST Mode Plus (1MHz) */ |
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1760 | | - if (!clk_freq || clk_freq > I2C_FAST_MODE_PLUS_FREQ) { |
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| 1752 | + if (!clk_freq || clk_freq > I2C_MAX_FAST_MODE_PLUS_FREQ) { |
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1761 | 1753 | dev_err(qup->dev, "clock frequency not supported %d\n", |
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1762 | 1754 | clk_freq); |
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1763 | | - return -EINVAL; |
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| 1755 | + ret = -EINVAL; |
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| 1756 | + goto fail_dma; |
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1764 | 1757 | } |
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1765 | 1758 | |
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1766 | | - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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1767 | | - qup->base = devm_ioremap_resource(qup->dev, res); |
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1768 | | - if (IS_ERR(qup->base)) |
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1769 | | - return PTR_ERR(qup->base); |
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| 1759 | + qup->base = devm_platform_ioremap_resource(pdev, 0); |
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| 1760 | + if (IS_ERR(qup->base)) { |
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| 1761 | + ret = PTR_ERR(qup->base); |
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| 1762 | + goto fail_dma; |
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| 1763 | + } |
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1770 | 1764 | |
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1771 | 1765 | qup->irq = platform_get_irq(pdev, 0); |
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1772 | 1766 | if (qup->irq < 0) { |
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1773 | | - dev_err(qup->dev, "No IRQ defined\n"); |
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1774 | | - return qup->irq; |
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| 1767 | + ret = qup->irq; |
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| 1768 | + goto fail_dma; |
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1775 | 1769 | } |
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1776 | 1770 | |
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1777 | 1771 | if (has_acpi_companion(qup->dev)) { |
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.. | .. |
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1786 | 1780 | qup->clk = devm_clk_get(qup->dev, "core"); |
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1787 | 1781 | if (IS_ERR(qup->clk)) { |
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1788 | 1782 | dev_err(qup->dev, "Could not get core clock\n"); |
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1789 | | - return PTR_ERR(qup->clk); |
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| 1783 | + ret = PTR_ERR(qup->clk); |
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| 1784 | + goto fail_dma; |
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1790 | 1785 | } |
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1791 | 1786 | |
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1792 | 1787 | qup->pclk = devm_clk_get(qup->dev, "iface"); |
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1793 | 1788 | if (IS_ERR(qup->pclk)) { |
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1794 | 1789 | dev_err(qup->dev, "Could not get iface clock\n"); |
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1795 | | - return PTR_ERR(qup->pclk); |
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| 1790 | + ret = PTR_ERR(qup->pclk); |
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| 1791 | + goto fail_dma; |
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1796 | 1792 | } |
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1797 | 1793 | qup_i2c_enable_clocks(qup); |
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1798 | 1794 | src_clk_freq = clk_get_rate(qup->clk); |
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.. | .. |
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1862 | 1858 | qup->in_fifo_sz = qup->in_blk_sz * (2 << size); |
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1863 | 1859 | |
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1864 | 1860 | hs_div = 3; |
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1865 | | - if (clk_freq <= I2C_STANDARD_FREQ) { |
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| 1861 | + if (clk_freq <= I2C_MAX_STANDARD_MODE_FREQ) { |
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1866 | 1862 | fs_div = ((src_clk_freq / clk_freq) / 2) - 3; |
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1867 | 1863 | qup->clk_ctl = (hs_div << 8) | (fs_div & 0xff); |
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1868 | 1864 | } else { |
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