hc
2024-10-12 a5969cabbb4660eab42b6ef0412cbbd1200cf14d
kernel/drivers/i2c/busses/i2c-i801.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23 Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl>,
34 Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker
....@@ -6,15 +7,6 @@
67 Copyright (C) 2010 Intel Corporation,
78 David Woodhouse <dwmw2@infradead.org>
89
9
- This program is free software; you can redistribute it and/or modify
10
- it under the terms of the GNU General Public License as published by
11
- the Free Software Foundation; either version 2 of the License, or
12
- (at your option) any later version.
13
-
14
- This program is distributed in the hope that it will be useful,
15
- but WITHOUT ANY WARRANTY; without even the implied warranty of
16
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17
- GNU General Public License for more details.
1810 */
1911
2012 /*
....@@ -62,6 +54,7 @@
6254 * Sunrise Point-H (PCH) 0xa123 32 hard yes yes yes
6355 * Sunrise Point-LP (PCH) 0x9d23 32 hard yes yes yes
6456 * DNV (SOC) 0x19df 32 hard yes yes yes
57
+ * Emmitsburg (PCH) 0x1bc9 32 hard yes yes yes
6558 * Broxton (SOC) 0x5ad4 32 hard yes yes yes
6659 * Lewisburg (PCH) 0xa1a3 32 hard yes yes yes
6760 * Lewisburg Supersku (PCH) 0xa223 32 hard yes yes yes
....@@ -72,18 +65,25 @@
7265 * Cedar Fork (PCH) 0x18df 32 hard yes yes yes
7366 * Ice Lake-LP (PCH) 0x34a3 32 hard yes yes yes
7467 * Comet Lake (PCH) 0x02a3 32 hard yes yes yes
68
+ * Comet Lake-H (PCH) 0x06a3 32 hard yes yes yes
69
+ * Elkhart Lake (PCH) 0x4b23 32 hard yes yes yes
70
+ * Tiger Lake-LP (PCH) 0xa0a3 32 hard yes yes yes
71
+ * Tiger Lake-H (PCH) 0x43a3 32 hard yes yes yes
72
+ * Jasper Lake (SOC) 0x4da3 32 hard yes yes yes
73
+ * Comet Lake-V (PCH) 0xa3a3 32 hard yes yes yes
74
+ * Alder Lake-S (PCH) 0x7aa3 32 hard yes yes yes
7575 *
7676 * Features supported by this driver:
7777 * Software PEC no
7878 * Hardware PEC yes
7979 * Block buffer yes
80
- * Block process call transaction no
80
+ * Block process call transaction yes
8181 * I2C block read transaction yes (doesn't use the block buffer)
8282 * Slave mode no
8383 * SMBus Host Notify yes
8484 * Interrupt processing yes
8585 *
86
- * See the file Documentation/i2c/busses/i2c-i801 for details.
86
+ * See the file Documentation/i2c/busses/i2c-i801.rst for details.
8787 */
8888
8989 #include <linux/interrupt.h>
....@@ -100,6 +100,7 @@
100100 #include <linux/io.h>
101101 #include <linux/dmi.h>
102102 #include <linux/slab.h>
103
+#include <linux/string.h>
103104 #include <linux/wait.h>
104105 #include <linux/err.h>
105106 #include <linux/platform_device.h>
....@@ -107,7 +108,7 @@
107108 #include <linux/pm_runtime.h>
108109
109110 #if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI
110
-#include <linux/gpio.h>
111
+#include <linux/gpio/machine.h>
111112 #include <linux/platform_data/i2c-mux-gpio.h>
112113 #endif
113114
....@@ -133,11 +134,6 @@
133134 #define SMBHSTCFG 0x040
134135 #define TCOBASE 0x050
135136 #define TCOCTL 0x054
136
-
137
-#define ACPIBASE 0x040
138
-#define ACPIBASE_SMI_OFF 0x030
139
-#define ACPICTRL 0x044
140
-#define ACPICTRL_EN 0x080
141137
142138 #define SBREG_BAR 0x10
143139 #define SBREG_SMBCTRL 0xc6000c
....@@ -177,6 +173,7 @@
177173 #define I801_PROC_CALL 0x10 /* unimplemented */
178174 #define I801_BLOCK_DATA 0x14
179175 #define I801_I2C_BLOCK_DATA 0x18 /* ICH5 and later */
176
+#define I801_BLOCK_PROC_CALL 0x1C
180177
181178 /* I801 Host Control register bits */
182179 #define SMBHSTCNT_INTREN BIT(0)
....@@ -208,9 +205,12 @@
208205 STATUS_ERROR_FLAGS)
209206
210207 /* Older devices have their ID defined in <linux/pci_ids.h> */
208
+#define PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS 0x02a3
209
+#define PCI_DEVICE_ID_INTEL_COMETLAKE_H_SMBUS 0x06a3
211210 #define PCI_DEVICE_ID_INTEL_BAYTRAIL_SMBUS 0x0f12
212211 #define PCI_DEVICE_ID_INTEL_CDF_SMBUS 0x18df
213212 #define PCI_DEVICE_ID_INTEL_DNV_SMBUS 0x19df
213
+#define PCI_DEVICE_ID_INTEL_EBG_SMBUS 0x1bc9
214214 #define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS 0x1c22
215215 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS 0x1d22
216216 /* Patsburg also has three 'Integrated Device Function' SMBus controllers */
....@@ -225,7 +225,11 @@
225225 #define PCI_DEVICE_ID_INTEL_GEMINILAKE_SMBUS 0x31d4
226226 #define PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS 0x34a3
227227 #define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS 0x3b30
228
+#define PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS 0x43a3
229
+#define PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS 0x4b23
230
+#define PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS 0x4da3
228231 #define PCI_DEVICE_ID_INTEL_BROXTON_SMBUS 0x5ad4
232
+#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS 0x7aa3
229233 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS 0x8c22
230234 #define PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS 0x8ca2
231235 #define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS 0x8d22
....@@ -236,12 +240,13 @@
236240 #define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS 0x9ca2
237241 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS 0x9d23
238242 #define PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS 0x9da3
243
+#define PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS 0xa0a3
239244 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS 0xa123
240245 #define PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS 0xa1a3
241246 #define PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS 0xa223
242247 #define PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS 0xa2a3
243248 #define PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS 0xa323
244
-#define PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS 0x02a3
249
+#define PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS 0xa3a3
245250
246251 struct i801_mux_config {
247252 char *gpio_chip;
....@@ -274,6 +279,7 @@
274279 #if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI
275280 const struct i801_mux_config *mux_drvdata;
276281 struct platform_device *mux_pdev;
282
+ struct gpiod_lookup_table *lookup;
277283 #endif
278284 struct platform_device *tco_pdev;
279285
....@@ -293,7 +299,8 @@
293299 #define FEATURE_HOST_NOTIFY BIT(5)
294300 /* Not really a feature, but it's convenient to handle it as such */
295301 #define FEATURE_IDF BIT(15)
296
-#define FEATURE_TCO BIT(16)
302
+#define FEATURE_TCO_SPT BIT(16)
303
+#define FEATURE_TCO_CNL BIT(17)
297304
298305 static const char *i801_feature_names[] = {
299306 "SMBus PEC",
....@@ -515,10 +522,23 @@
515522
516523 static int i801_block_transaction_by_block(struct i801_priv *priv,
517524 union i2c_smbus_data *data,
518
- char read_write, int hwpec)
525
+ char read_write, int command,
526
+ int hwpec)
519527 {
520528 int i, len;
521529 int status;
530
+ int xact = hwpec ? SMBHSTCNT_PEC_EN : 0;
531
+
532
+ switch (command) {
533
+ case I2C_SMBUS_BLOCK_PROC_CALL:
534
+ xact |= I801_BLOCK_PROC_CALL;
535
+ break;
536
+ case I2C_SMBUS_BLOCK_DATA:
537
+ xact |= I801_BLOCK_DATA;
538
+ break;
539
+ default:
540
+ return -EOPNOTSUPP;
541
+ }
522542
523543 inb_p(SMBHSTCNT(priv)); /* reset the data buffer index */
524544
....@@ -530,12 +550,12 @@
530550 outb_p(data->block[i+1], SMBBLKDAT(priv));
531551 }
532552
533
- status = i801_transaction(priv, I801_BLOCK_DATA |
534
- (hwpec ? SMBHSTCNT_PEC_EN : 0));
553
+ status = i801_transaction(priv, xact);
535554 if (status)
536555 return status;
537556
538
- if (read_write == I2C_SMBUS_READ) {
557
+ if (read_write == I2C_SMBUS_READ ||
558
+ command == I2C_SMBUS_BLOCK_PROC_CALL) {
539559 len = inb_p(SMBHSTDAT0(priv));
540560 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX)
541561 return -EPROTO;
....@@ -673,6 +693,9 @@
673693 int result;
674694 const struct i2c_adapter *adap = &priv->adapter;
675695
696
+ if (command == I2C_SMBUS_BLOCK_PROC_CALL)
697
+ return -EOPNOTSUPP;
698
+
676699 result = i801_check_pre(priv);
677700 if (result < 0)
678701 return result;
....@@ -799,7 +822,8 @@
799822 && command != I2C_SMBUS_I2C_BLOCK_DATA
800823 && i801_set_block_buffer_mode(priv) == 0)
801824 result = i801_block_transaction_by_block(priv, data,
802
- read_write, hwpec);
825
+ read_write,
826
+ command, hwpec);
803827 else
804828 result = i801_block_transaction_byte_by_byte(priv, data,
805829 read_write,
....@@ -891,6 +915,15 @@
891915 outb_p(command, SMBHSTCMD(priv));
892916 block = 1;
893917 break;
918
+ case I2C_SMBUS_BLOCK_PROC_CALL:
919
+ /*
920
+ * Bit 0 of the slave address register always indicate a write
921
+ * command.
922
+ */
923
+ outb_p((addr & 0x7f) << 1, SMBHSTADD(priv));
924
+ outb_p(command, SMBHSTCMD(priv));
925
+ block = 1;
926
+ break;
894927 default:
895928 dev_err(&priv->pci_dev->dev, "Unsupported transaction %d\n",
896929 size);
....@@ -936,6 +969,9 @@
936969 }
937970
938971 out:
972
+ /* Unlock the SMBus device for use by BIOS/ACPI */
973
+ outb_p(SMBHSTSTS_INUSE_STS, SMBHSTSTS(priv));
974
+
939975 pm_runtime_mark_last_busy(&priv->pci_dev->dev);
940976 pm_runtime_put_autosuspend(&priv->pci_dev->dev);
941977 mutex_unlock(&priv->acpi_lock);
....@@ -951,6 +987,8 @@
951987 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
952988 I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK |
953989 ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) |
990
+ ((priv->features & FEATURE_BLOCK_PROC) ?
991
+ I2C_FUNC_SMBUS_BLOCK_PROC_CALL : 0) |
954992 ((priv->features & FEATURE_I2C_BLOCK_READ) ?
955993 I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0) |
956994 ((priv->features & FEATURE_HOST_NOTIFY) ?
....@@ -1026,6 +1064,7 @@
10261064 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS) },
10271065 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CDF_SMBUS) },
10281066 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DNV_SMBUS) },
1067
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EBG_SMBUS) },
10291068 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BROXTON_SMBUS) },
10301069 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS) },
10311070 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS) },
....@@ -1034,6 +1073,13 @@
10341073 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS) },
10351074 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS) },
10361075 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS) },
1076
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_H_SMBUS) },
1077
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS) },
1078
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS) },
1079
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS) },
1080
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS) },
1081
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS) },
1082
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS) },
10371083 { 0, }
10381084 };
10391085
....@@ -1099,7 +1145,7 @@
10991145 memset(&info, 0, sizeof(struct i2c_board_info));
11001146 info.addr = dmi_devices[i].i2c_addr;
11011147 strlcpy(info.type, dmi_devices[i].i2c_type, I2C_NAME_SIZE);
1102
- i2c_new_device(adap, &info);
1148
+ i2c_new_client_device(adap, &info);
11031149 break;
11041150 }
11051151 }
....@@ -1135,6 +1181,129 @@
11351181 }
11361182 }
11371183
1184
+/* NOTE: Keep this list in sync with drivers/platform/x86/dell-smo8800.c */
1185
+static const char *const acpi_smo8800_ids[] = {
1186
+ "SMO8800",
1187
+ "SMO8801",
1188
+ "SMO8810",
1189
+ "SMO8811",
1190
+ "SMO8820",
1191
+ "SMO8821",
1192
+ "SMO8830",
1193
+ "SMO8831",
1194
+};
1195
+
1196
+static acpi_status check_acpi_smo88xx_device(acpi_handle obj_handle,
1197
+ u32 nesting_level,
1198
+ void *context,
1199
+ void **return_value)
1200
+{
1201
+ struct acpi_device_info *info;
1202
+ acpi_status status;
1203
+ char *hid;
1204
+ int i;
1205
+
1206
+ status = acpi_get_object_info(obj_handle, &info);
1207
+ if (ACPI_FAILURE(status))
1208
+ return AE_OK;
1209
+
1210
+ if (!(info->valid & ACPI_VALID_HID))
1211
+ goto smo88xx_not_found;
1212
+
1213
+ hid = info->hardware_id.string;
1214
+ if (!hid)
1215
+ goto smo88xx_not_found;
1216
+
1217
+ i = match_string(acpi_smo8800_ids, ARRAY_SIZE(acpi_smo8800_ids), hid);
1218
+ if (i < 0)
1219
+ goto smo88xx_not_found;
1220
+
1221
+ kfree(info);
1222
+
1223
+ *((bool *)return_value) = true;
1224
+ return AE_CTRL_TERMINATE;
1225
+
1226
+smo88xx_not_found:
1227
+ kfree(info);
1228
+ return AE_OK;
1229
+}
1230
+
1231
+static bool is_dell_system_with_lis3lv02d(void)
1232
+{
1233
+ bool found;
1234
+ const char *vendor;
1235
+
1236
+ vendor = dmi_get_system_info(DMI_SYS_VENDOR);
1237
+ if (!vendor || strcmp(vendor, "Dell Inc."))
1238
+ return false;
1239
+
1240
+ /*
1241
+ * Check that ACPI device SMO88xx is present and is functioning.
1242
+ * Function acpi_get_devices() already filters all ACPI devices
1243
+ * which are not present or are not functioning.
1244
+ * ACPI device SMO88xx represents our ST microelectronics lis3lv02d
1245
+ * accelerometer but unfortunately ACPI does not provide any other
1246
+ * information (like I2C address).
1247
+ */
1248
+ found = false;
1249
+ acpi_get_devices(NULL, check_acpi_smo88xx_device, NULL,
1250
+ (void **)&found);
1251
+
1252
+ return found;
1253
+}
1254
+
1255
+/*
1256
+ * Accelerometer's I2C address is not specified in DMI nor ACPI,
1257
+ * so it is needed to define mapping table based on DMI product names.
1258
+ */
1259
+static const struct {
1260
+ const char *dmi_product_name;
1261
+ unsigned short i2c_addr;
1262
+} dell_lis3lv02d_devices[] = {
1263
+ /*
1264
+ * Dell platform team told us that these Latitude devices have
1265
+ * ST microelectronics accelerometer at I2C address 0x29.
1266
+ */
1267
+ { "Latitude E5250", 0x29 },
1268
+ { "Latitude E5450", 0x29 },
1269
+ { "Latitude E5550", 0x29 },
1270
+ { "Latitude E6440", 0x29 },
1271
+ { "Latitude E6440 ATG", 0x29 },
1272
+ { "Latitude E6540", 0x29 },
1273
+ /*
1274
+ * Additional individual entries were added after verification.
1275
+ */
1276
+ { "Latitude 5480", 0x29 },
1277
+ { "Vostro V131", 0x1d },
1278
+ { "Vostro 5568", 0x29 },
1279
+};
1280
+
1281
+static void register_dell_lis3lv02d_i2c_device(struct i801_priv *priv)
1282
+{
1283
+ struct i2c_board_info info;
1284
+ const char *dmi_product_name;
1285
+ int i;
1286
+
1287
+ dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
1288
+ for (i = 0; i < ARRAY_SIZE(dell_lis3lv02d_devices); ++i) {
1289
+ if (strcmp(dmi_product_name,
1290
+ dell_lis3lv02d_devices[i].dmi_product_name) == 0)
1291
+ break;
1292
+ }
1293
+
1294
+ if (i == ARRAY_SIZE(dell_lis3lv02d_devices)) {
1295
+ dev_warn(&priv->pci_dev->dev,
1296
+ "Accelerometer lis3lv02d is present on SMBus but its"
1297
+ " address is unknown, skipping registration\n");
1298
+ return;
1299
+ }
1300
+
1301
+ memset(&info, 0, sizeof(struct i2c_board_info));
1302
+ info.addr = dell_lis3lv02d_devices[i].i2c_addr;
1303
+ strlcpy(info.type, "lis3lv02d", I2C_NAME_SIZE);
1304
+ i2c_new_client_device(&priv->adapter, &info);
1305
+}
1306
+
11381307 /* Register optional slaves */
11391308 static void i801_probe_optional_slaves(struct i801_priv *priv)
11401309 {
....@@ -1148,11 +1317,20 @@
11481317 memset(&info, 0, sizeof(struct i2c_board_info));
11491318 info.addr = apanel_addr;
11501319 strlcpy(info.type, "fujitsu_apanel", I2C_NAME_SIZE);
1151
- i2c_new_device(&priv->adapter, &info);
1320
+ i2c_new_client_device(&priv->adapter, &info);
11521321 }
11531322
11541323 if (dmi_name_in_vendors("FUJITSU"))
11551324 dmi_walk(dmi_check_onboard_devices, &priv->adapter);
1325
+
1326
+ if (is_dell_system_with_lis3lv02d())
1327
+ register_dell_lis3lv02d_i2c_device(priv);
1328
+
1329
+ /* Instantiate SPD EEPROMs unless the SMBus is multiplexed */
1330
+#if IS_ENABLED(CONFIG_I2C_MUX_GPIO)
1331
+ if (!priv->mux_drvdata)
1332
+#endif
1333
+ i2c_register_spd(&priv->adapter);
11561334 }
11571335 #else
11581336 static void __init input_apanel_init(void) {}
....@@ -1251,7 +1429,8 @@
12511429 struct device *dev = &priv->adapter.dev;
12521430 const struct i801_mux_config *mux_config;
12531431 struct i2c_mux_gpio_platform_data gpio_data;
1254
- int err;
1432
+ struct gpiod_lookup_table *lookup;
1433
+ int err, i;
12551434
12561435 if (!priv->mux_drvdata)
12571436 return 0;
....@@ -1263,17 +1442,36 @@
12631442 gpio_data.values = mux_config->values;
12641443 gpio_data.n_values = mux_config->n_values;
12651444 gpio_data.classes = mux_config->classes;
1266
- gpio_data.gpio_chip = mux_config->gpio_chip;
1267
- gpio_data.gpios = mux_config->gpios;
1268
- gpio_data.n_gpios = mux_config->n_gpios;
12691445 gpio_data.idle = I2C_MUX_GPIO_NO_IDLE;
12701446
1271
- /* Register the mux device */
1447
+ /* Register GPIO descriptor lookup table */
1448
+ lookup = devm_kzalloc(dev,
1449
+ struct_size(lookup, table, mux_config->n_gpios + 1),
1450
+ GFP_KERNEL);
1451
+ if (!lookup)
1452
+ return -ENOMEM;
1453
+ lookup->dev_id = "i2c-mux-gpio";
1454
+ for (i = 0; i < mux_config->n_gpios; i++) {
1455
+ lookup->table[i] = (struct gpiod_lookup)
1456
+ GPIO_LOOKUP(mux_config->gpio_chip,
1457
+ mux_config->gpios[i], "mux", 0);
1458
+ }
1459
+ gpiod_add_lookup_table(lookup);
1460
+ priv->lookup = lookup;
1461
+
1462
+ /*
1463
+ * Register the mux device, we use PLATFORM_DEVID_NONE here
1464
+ * because since we are referring to the GPIO chip by name we are
1465
+ * anyways in deep trouble if there is more than one of these
1466
+ * devices, and there should likely only be one platform controller
1467
+ * hub.
1468
+ */
12721469 priv->mux_pdev = platform_device_register_data(dev, "i2c-mux-gpio",
1273
- PLATFORM_DEVID_AUTO, &gpio_data,
1470
+ PLATFORM_DEVID_NONE, &gpio_data,
12741471 sizeof(struct i2c_mux_gpio_platform_data));
12751472 if (IS_ERR(priv->mux_pdev)) {
12761473 err = PTR_ERR(priv->mux_pdev);
1474
+ gpiod_remove_lookup_table(lookup);
12771475 priv->mux_pdev = NULL;
12781476 dev_err(dev, "Failed to register i2c-mux-gpio device\n");
12791477 return err;
....@@ -1286,6 +1484,8 @@
12861484 {
12871485 if (priv->mux_pdev)
12881486 platform_device_unregister(priv->mux_pdev);
1487
+ if (priv->lookup)
1488
+ gpiod_remove_lookup_table(priv->lookup);
12891489 }
12901490
12911491 static unsigned int i801_get_adapter_class(struct i801_priv *priv)
....@@ -1318,56 +1518,22 @@
13181518 }
13191519 #endif
13201520
1321
-static const struct itco_wdt_platform_data tco_platform_data = {
1521
+static const struct itco_wdt_platform_data spt_tco_platform_data = {
13221522 .name = "Intel PCH",
13231523 .version = 4,
13241524 };
13251525
13261526 static DEFINE_SPINLOCK(p2sb_spinlock);
13271527
1328
-static void i801_add_tco(struct i801_priv *priv)
1528
+static struct platform_device *
1529
+i801_add_tco_spt(struct i801_priv *priv, struct pci_dev *pci_dev,
1530
+ struct resource *tco_res)
13291531 {
1330
- struct pci_dev *pci_dev = priv->pci_dev;
1331
- struct resource tco_res[3], *res;
1332
- struct platform_device *pdev;
1532
+ struct resource *res;
13331533 unsigned int devfn;
1334
- u32 tco_base, tco_ctl;
1335
- u32 base_addr, ctrl_val;
13361534 u64 base64_addr;
1535
+ u32 base_addr;
13371536 u8 hidden;
1338
-
1339
- if (!(priv->features & FEATURE_TCO))
1340
- return;
1341
-
1342
- pci_read_config_dword(pci_dev, TCOBASE, &tco_base);
1343
- pci_read_config_dword(pci_dev, TCOCTL, &tco_ctl);
1344
- if (!(tco_ctl & TCOCTL_EN))
1345
- return;
1346
-
1347
- memset(tco_res, 0, sizeof(tco_res));
1348
-
1349
- res = &tco_res[ICH_RES_IO_TCO];
1350
- res->start = tco_base & ~1;
1351
- res->end = res->start + 32 - 1;
1352
- res->flags = IORESOURCE_IO;
1353
-
1354
- /*
1355
- * Power Management registers.
1356
- */
1357
- devfn = PCI_DEVFN(PCI_SLOT(pci_dev->devfn), 2);
1358
- pci_bus_read_config_dword(pci_dev->bus, devfn, ACPIBASE, &base_addr);
1359
-
1360
- res = &tco_res[ICH_RES_IO_SMI];
1361
- res->start = (base_addr & ~1) + ACPIBASE_SMI_OFF;
1362
- res->end = res->start + 3;
1363
- res->flags = IORESOURCE_IO;
1364
-
1365
- /*
1366
- * Enable the ACPI I/O space.
1367
- */
1368
- pci_bus_read_config_dword(pci_dev->bus, devfn, ACPICTRL, &ctrl_val);
1369
- ctrl_val |= ACPICTRL_EN;
1370
- pci_bus_write_config_dword(pci_dev->bus, devfn, ACPICTRL, ctrl_val);
13711537
13721538 /*
13731539 * We must access the NO_REBOOT bit over the Primary to Sideband
....@@ -1395,7 +1561,7 @@
13951561 pci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, hidden);
13961562 spin_unlock(&p2sb_spinlock);
13971563
1398
- res = &tco_res[ICH_RES_MEM_OFF];
1564
+ res = &tco_res[1];
13991565 if (pci_dev->device == PCI_DEVICE_ID_INTEL_DNV_SMBUS)
14001566 res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL_DNV;
14011567 else
....@@ -1404,15 +1570,60 @@
14041570 res->end = res->start + 3;
14051571 res->flags = IORESOURCE_MEM;
14061572
1407
- pdev = platform_device_register_resndata(&pci_dev->dev, "iTCO_wdt", -1,
1408
- tco_res, 3, &tco_platform_data,
1409
- sizeof(tco_platform_data));
1410
- if (IS_ERR(pdev)) {
1411
- dev_warn(&pci_dev->dev, "failed to create iTCO device\n");
1412
- return;
1413
- }
1573
+ return platform_device_register_resndata(&pci_dev->dev, "iTCO_wdt", -1,
1574
+ tco_res, 2, &spt_tco_platform_data,
1575
+ sizeof(spt_tco_platform_data));
1576
+}
14141577
1415
- priv->tco_pdev = pdev;
1578
+static const struct itco_wdt_platform_data cnl_tco_platform_data = {
1579
+ .name = "Intel PCH",
1580
+ .version = 6,
1581
+};
1582
+
1583
+static struct platform_device *
1584
+i801_add_tco_cnl(struct i801_priv *priv, struct pci_dev *pci_dev,
1585
+ struct resource *tco_res)
1586
+{
1587
+ return platform_device_register_resndata(&pci_dev->dev,
1588
+ "iTCO_wdt", -1, tco_res, 1, &cnl_tco_platform_data,
1589
+ sizeof(cnl_tco_platform_data));
1590
+}
1591
+
1592
+static void i801_add_tco(struct i801_priv *priv)
1593
+{
1594
+ struct pci_dev *pci_dev = priv->pci_dev;
1595
+ struct resource tco_res[2], *res;
1596
+ u32 tco_base, tco_ctl;
1597
+
1598
+ /* If we have ACPI based watchdog use that instead */
1599
+ if (acpi_has_watchdog())
1600
+ return;
1601
+
1602
+ if (!(priv->features & (FEATURE_TCO_SPT | FEATURE_TCO_CNL)))
1603
+ return;
1604
+
1605
+ pci_read_config_dword(pci_dev, TCOBASE, &tco_base);
1606
+ pci_read_config_dword(pci_dev, TCOCTL, &tco_ctl);
1607
+ if (!(tco_ctl & TCOCTL_EN))
1608
+ return;
1609
+
1610
+ memset(tco_res, 0, sizeof(tco_res));
1611
+ /*
1612
+ * Always populate the main iTCO IO resource here. The second entry
1613
+ * for NO_REBOOT MMIO is filled by the SPT specific function.
1614
+ */
1615
+ res = &tco_res[0];
1616
+ res->start = tco_base & ~1;
1617
+ res->end = res->start + 32 - 1;
1618
+ res->flags = IORESOURCE_IO;
1619
+
1620
+ if (priv->features & FEATURE_TCO_CNL)
1621
+ priv->tco_pdev = i801_add_tco_cnl(priv, pci_dev, tco_res);
1622
+ else
1623
+ priv->tco_pdev = i801_add_tco_spt(priv, pci_dev, tco_res);
1624
+
1625
+ if (IS_ERR(priv->tco_pdev))
1626
+ dev_warn(&pci_dev->dev, "failed to create iTCO device\n");
14161627 }
14171628
14181629 #ifdef CONFIG_ACPI
....@@ -1532,22 +1743,38 @@
15321743 switch (dev->device) {
15331744 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS:
15341745 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS:
1535
- case PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS:
1536
- case PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS:
15371746 case PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS:
15381747 case PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS:
1539
- case PCI_DEVICE_ID_INTEL_CDF_SMBUS:
15401748 case PCI_DEVICE_ID_INTEL_DNV_SMBUS:
15411749 case PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS:
1542
- case PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS:
1543
- case PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS:
1750
+ case PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS:
1751
+ priv->features |= FEATURE_BLOCK_PROC;
15441752 priv->features |= FEATURE_I2C_BLOCK_READ;
15451753 priv->features |= FEATURE_IRQ;
15461754 priv->features |= FEATURE_SMBUS_PEC;
15471755 priv->features |= FEATURE_BLOCK_BUFFER;
1548
- /* If we have ACPI based watchdog use that instead */
1549
- if (!acpi_has_watchdog())
1550
- priv->features |= FEATURE_TCO;
1756
+ priv->features |= FEATURE_TCO_SPT;
1757
+ priv->features |= FEATURE_HOST_NOTIFY;
1758
+ break;
1759
+
1760
+ case PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS:
1761
+ case PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS:
1762
+ case PCI_DEVICE_ID_INTEL_CDF_SMBUS:
1763
+ case PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS:
1764
+ case PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS:
1765
+ case PCI_DEVICE_ID_INTEL_COMETLAKE_H_SMBUS:
1766
+ case PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS:
1767
+ case PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS:
1768
+ case PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS:
1769
+ case PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS:
1770
+ case PCI_DEVICE_ID_INTEL_EBG_SMBUS:
1771
+ case PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS:
1772
+ priv->features |= FEATURE_BLOCK_PROC;
1773
+ priv->features |= FEATURE_I2C_BLOCK_READ;
1774
+ priv->features |= FEATURE_IRQ;
1775
+ priv->features |= FEATURE_SMBUS_PEC;
1776
+ priv->features |= FEATURE_BLOCK_BUFFER;
1777
+ priv->features |= FEATURE_TCO_CNL;
15511778 priv->features |= FEATURE_HOST_NOTIFY;
15521779 break;
15531780
....@@ -1558,18 +1785,19 @@
15581785 case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1:
15591786 case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2:
15601787 priv->features |= FEATURE_IDF;
1561
- /* fall through */
1788
+ fallthrough;
15621789 default:
1790
+ priv->features |= FEATURE_BLOCK_PROC;
15631791 priv->features |= FEATURE_I2C_BLOCK_READ;
15641792 priv->features |= FEATURE_IRQ;
1565
- /* fall through */
1793
+ fallthrough;
15661794 case PCI_DEVICE_ID_INTEL_82801DB_3:
15671795 priv->features |= FEATURE_SMBUS_PEC;
15681796 priv->features |= FEATURE_BLOCK_BUFFER;
1569
- /* fall through */
1797
+ fallthrough;
15701798 case PCI_DEVICE_ID_INTEL_82801CA_3:
15711799 priv->features |= FEATURE_HOST_NOTIFY;
1572
- /* fall through */
1800
+ fallthrough;
15731801 case PCI_DEVICE_ID_INTEL_82801BA_2:
15741802 case PCI_DEVICE_ID_INTEL_82801AB_3:
15751803 case PCI_DEVICE_ID_INTEL_82801AA_3:
....@@ -1679,6 +1907,7 @@
16791907 "SMBus I801 adapter at %04lx", priv->smba);
16801908 err = i2c_add_adapter(&priv->adapter);
16811909 if (err) {
1910
+ platform_device_unregister(priv->tco_pdev);
16821911 i801_acpi_remove(priv);
16831912 return err;
16841913 }
....@@ -1691,7 +1920,7 @@
16911920
16921921 pci_set_drvdata(dev, priv);
16931922
1694
- dev_pm_set_driver_flags(&dev->dev, DPM_FLAG_NEVER_SKIP);
1923
+ dev_pm_set_driver_flags(&dev->dev, DPM_FLAG_NO_DIRECT_COMPLETE);
16951924 pm_runtime_set_autosuspend_delay(&dev->dev, 1000);
16961925 pm_runtime_use_autosuspend(&dev->dev);
16971926 pm_runtime_put_autosuspend(&dev->dev);
....@@ -1733,17 +1962,15 @@
17331962 #ifdef CONFIG_PM_SLEEP
17341963 static int i801_suspend(struct device *dev)
17351964 {
1736
- struct pci_dev *pci_dev = to_pci_dev(dev);
1737
- struct i801_priv *priv = pci_get_drvdata(pci_dev);
1965
+ struct i801_priv *priv = dev_get_drvdata(dev);
17381966
1739
- pci_write_config_byte(pci_dev, SMBHSTCFG, priv->original_hstcfg);
1967
+ pci_write_config_byte(priv->pci_dev, SMBHSTCFG, priv->original_hstcfg);
17401968 return 0;
17411969 }
17421970
17431971 static int i801_resume(struct device *dev)
17441972 {
1745
- struct pci_dev *pci_dev = to_pci_dev(dev);
1746
- struct i801_priv *priv = pci_get_drvdata(pci_dev);
1973
+ struct i801_priv *priv = dev_get_drvdata(dev);
17471974
17481975 i801_setup_hstcfg(priv);
17491976 i801_enable_host_notify(&priv->adapter);
....@@ -1777,7 +2004,8 @@
17772004 pci_unregister_driver(&i801_driver);
17782005 }
17792006
1780
-MODULE_AUTHOR("Mark D. Studebaker <mdsxyz123@yahoo.com>, Jean Delvare <jdelvare@suse.de>");
2007
+MODULE_AUTHOR("Mark D. Studebaker <mdsxyz123@yahoo.com>");
2008
+MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
17812009 MODULE_DESCRIPTION("I801 SMBus driver");
17822010 MODULE_LICENSE("GPL");
17832011