.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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1 | 2 | /* |
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2 | 3 | Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl>, |
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3 | 4 | Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker |
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.. | .. |
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6 | 7 | Copyright (C) 2010 Intel Corporation, |
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7 | 8 | David Woodhouse <dwmw2@infradead.org> |
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8 | 9 | |
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9 | | - This program is free software; you can redistribute it and/or modify |
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10 | | - it under the terms of the GNU General Public License as published by |
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11 | | - the Free Software Foundation; either version 2 of the License, or |
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12 | | - (at your option) any later version. |
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13 | | - |
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14 | | - This program is distributed in the hope that it will be useful, |
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15 | | - but WITHOUT ANY WARRANTY; without even the implied warranty of |
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16 | | - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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17 | | - GNU General Public License for more details. |
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18 | 10 | */ |
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19 | 11 | |
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20 | 12 | /* |
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.. | .. |
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62 | 54 | * Sunrise Point-H (PCH) 0xa123 32 hard yes yes yes |
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63 | 55 | * Sunrise Point-LP (PCH) 0x9d23 32 hard yes yes yes |
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64 | 56 | * DNV (SOC) 0x19df 32 hard yes yes yes |
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| 57 | + * Emmitsburg (PCH) 0x1bc9 32 hard yes yes yes |
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65 | 58 | * Broxton (SOC) 0x5ad4 32 hard yes yes yes |
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66 | 59 | * Lewisburg (PCH) 0xa1a3 32 hard yes yes yes |
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67 | 60 | * Lewisburg Supersku (PCH) 0xa223 32 hard yes yes yes |
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.. | .. |
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72 | 65 | * Cedar Fork (PCH) 0x18df 32 hard yes yes yes |
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73 | 66 | * Ice Lake-LP (PCH) 0x34a3 32 hard yes yes yes |
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74 | 67 | * Comet Lake (PCH) 0x02a3 32 hard yes yes yes |
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| 68 | + * Comet Lake-H (PCH) 0x06a3 32 hard yes yes yes |
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| 69 | + * Elkhart Lake (PCH) 0x4b23 32 hard yes yes yes |
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| 70 | + * Tiger Lake-LP (PCH) 0xa0a3 32 hard yes yes yes |
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| 71 | + * Tiger Lake-H (PCH) 0x43a3 32 hard yes yes yes |
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| 72 | + * Jasper Lake (SOC) 0x4da3 32 hard yes yes yes |
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| 73 | + * Comet Lake-V (PCH) 0xa3a3 32 hard yes yes yes |
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| 74 | + * Alder Lake-S (PCH) 0x7aa3 32 hard yes yes yes |
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75 | 75 | * |
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76 | 76 | * Features supported by this driver: |
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77 | 77 | * Software PEC no |
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78 | 78 | * Hardware PEC yes |
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79 | 79 | * Block buffer yes |
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80 | | - * Block process call transaction no |
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| 80 | + * Block process call transaction yes |
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81 | 81 | * I2C block read transaction yes (doesn't use the block buffer) |
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82 | 82 | * Slave mode no |
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83 | 83 | * SMBus Host Notify yes |
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84 | 84 | * Interrupt processing yes |
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85 | 85 | * |
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86 | | - * See the file Documentation/i2c/busses/i2c-i801 for details. |
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| 86 | + * See the file Documentation/i2c/busses/i2c-i801.rst for details. |
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87 | 87 | */ |
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88 | 88 | |
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89 | 89 | #include <linux/interrupt.h> |
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.. | .. |
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100 | 100 | #include <linux/io.h> |
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101 | 101 | #include <linux/dmi.h> |
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102 | 102 | #include <linux/slab.h> |
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| 103 | +#include <linux/string.h> |
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103 | 104 | #include <linux/wait.h> |
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104 | 105 | #include <linux/err.h> |
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105 | 106 | #include <linux/platform_device.h> |
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.. | .. |
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107 | 108 | #include <linux/pm_runtime.h> |
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108 | 109 | |
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109 | 110 | #if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI |
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110 | | -#include <linux/gpio.h> |
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| 111 | +#include <linux/gpio/machine.h> |
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111 | 112 | #include <linux/platform_data/i2c-mux-gpio.h> |
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112 | 113 | #endif |
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113 | 114 | |
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.. | .. |
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133 | 134 | #define SMBHSTCFG 0x040 |
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134 | 135 | #define TCOBASE 0x050 |
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135 | 136 | #define TCOCTL 0x054 |
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136 | | - |
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137 | | -#define ACPIBASE 0x040 |
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138 | | -#define ACPIBASE_SMI_OFF 0x030 |
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139 | | -#define ACPICTRL 0x044 |
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140 | | -#define ACPICTRL_EN 0x080 |
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141 | 137 | |
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142 | 138 | #define SBREG_BAR 0x10 |
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143 | 139 | #define SBREG_SMBCTRL 0xc6000c |
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.. | .. |
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177 | 173 | #define I801_PROC_CALL 0x10 /* unimplemented */ |
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178 | 174 | #define I801_BLOCK_DATA 0x14 |
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179 | 175 | #define I801_I2C_BLOCK_DATA 0x18 /* ICH5 and later */ |
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| 176 | +#define I801_BLOCK_PROC_CALL 0x1C |
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180 | 177 | |
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181 | 178 | /* I801 Host Control register bits */ |
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182 | 179 | #define SMBHSTCNT_INTREN BIT(0) |
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.. | .. |
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208 | 205 | STATUS_ERROR_FLAGS) |
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209 | 206 | |
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210 | 207 | /* Older devices have their ID defined in <linux/pci_ids.h> */ |
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| 208 | +#define PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS 0x02a3 |
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| 209 | +#define PCI_DEVICE_ID_INTEL_COMETLAKE_H_SMBUS 0x06a3 |
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211 | 210 | #define PCI_DEVICE_ID_INTEL_BAYTRAIL_SMBUS 0x0f12 |
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212 | 211 | #define PCI_DEVICE_ID_INTEL_CDF_SMBUS 0x18df |
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213 | 212 | #define PCI_DEVICE_ID_INTEL_DNV_SMBUS 0x19df |
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| 213 | +#define PCI_DEVICE_ID_INTEL_EBG_SMBUS 0x1bc9 |
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214 | 214 | #define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS 0x1c22 |
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215 | 215 | #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS 0x1d22 |
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216 | 216 | /* Patsburg also has three 'Integrated Device Function' SMBus controllers */ |
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.. | .. |
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225 | 225 | #define PCI_DEVICE_ID_INTEL_GEMINILAKE_SMBUS 0x31d4 |
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226 | 226 | #define PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS 0x34a3 |
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227 | 227 | #define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS 0x3b30 |
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| 228 | +#define PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS 0x43a3 |
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| 229 | +#define PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS 0x4b23 |
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| 230 | +#define PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS 0x4da3 |
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228 | 231 | #define PCI_DEVICE_ID_INTEL_BROXTON_SMBUS 0x5ad4 |
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| 232 | +#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS 0x7aa3 |
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229 | 233 | #define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS 0x8c22 |
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230 | 234 | #define PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS 0x8ca2 |
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231 | 235 | #define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS 0x8d22 |
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.. | .. |
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236 | 240 | #define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS 0x9ca2 |
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237 | 241 | #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS 0x9d23 |
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238 | 242 | #define PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS 0x9da3 |
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| 243 | +#define PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS 0xa0a3 |
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239 | 244 | #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS 0xa123 |
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240 | 245 | #define PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS 0xa1a3 |
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241 | 246 | #define PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS 0xa223 |
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242 | 247 | #define PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS 0xa2a3 |
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243 | 248 | #define PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS 0xa323 |
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244 | | -#define PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS 0x02a3 |
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| 249 | +#define PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS 0xa3a3 |
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245 | 250 | |
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246 | 251 | struct i801_mux_config { |
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247 | 252 | char *gpio_chip; |
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.. | .. |
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274 | 279 | #if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI |
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275 | 280 | const struct i801_mux_config *mux_drvdata; |
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276 | 281 | struct platform_device *mux_pdev; |
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| 282 | + struct gpiod_lookup_table *lookup; |
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277 | 283 | #endif |
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278 | 284 | struct platform_device *tco_pdev; |
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279 | 285 | |
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.. | .. |
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293 | 299 | #define FEATURE_HOST_NOTIFY BIT(5) |
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294 | 300 | /* Not really a feature, but it's convenient to handle it as such */ |
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295 | 301 | #define FEATURE_IDF BIT(15) |
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296 | | -#define FEATURE_TCO BIT(16) |
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| 302 | +#define FEATURE_TCO_SPT BIT(16) |
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| 303 | +#define FEATURE_TCO_CNL BIT(17) |
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297 | 304 | |
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298 | 305 | static const char *i801_feature_names[] = { |
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299 | 306 | "SMBus PEC", |
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.. | .. |
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515 | 522 | |
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516 | 523 | static int i801_block_transaction_by_block(struct i801_priv *priv, |
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517 | 524 | union i2c_smbus_data *data, |
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518 | | - char read_write, int hwpec) |
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| 525 | + char read_write, int command, |
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| 526 | + int hwpec) |
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519 | 527 | { |
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520 | 528 | int i, len; |
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521 | 529 | int status; |
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| 530 | + int xact = hwpec ? SMBHSTCNT_PEC_EN : 0; |
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| 531 | + |
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| 532 | + switch (command) { |
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| 533 | + case I2C_SMBUS_BLOCK_PROC_CALL: |
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| 534 | + xact |= I801_BLOCK_PROC_CALL; |
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| 535 | + break; |
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| 536 | + case I2C_SMBUS_BLOCK_DATA: |
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| 537 | + xact |= I801_BLOCK_DATA; |
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| 538 | + break; |
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| 539 | + default: |
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| 540 | + return -EOPNOTSUPP; |
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| 541 | + } |
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522 | 542 | |
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523 | 543 | inb_p(SMBHSTCNT(priv)); /* reset the data buffer index */ |
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524 | 544 | |
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.. | .. |
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530 | 550 | outb_p(data->block[i+1], SMBBLKDAT(priv)); |
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531 | 551 | } |
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532 | 552 | |
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533 | | - status = i801_transaction(priv, I801_BLOCK_DATA | |
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534 | | - (hwpec ? SMBHSTCNT_PEC_EN : 0)); |
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| 553 | + status = i801_transaction(priv, xact); |
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535 | 554 | if (status) |
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536 | 555 | return status; |
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537 | 556 | |
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538 | | - if (read_write == I2C_SMBUS_READ) { |
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| 557 | + if (read_write == I2C_SMBUS_READ || |
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| 558 | + command == I2C_SMBUS_BLOCK_PROC_CALL) { |
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539 | 559 | len = inb_p(SMBHSTDAT0(priv)); |
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540 | 560 | if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) |
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541 | 561 | return -EPROTO; |
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.. | .. |
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673 | 693 | int result; |
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674 | 694 | const struct i2c_adapter *adap = &priv->adapter; |
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675 | 695 | |
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| 696 | + if (command == I2C_SMBUS_BLOCK_PROC_CALL) |
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| 697 | + return -EOPNOTSUPP; |
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| 698 | + |
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676 | 699 | result = i801_check_pre(priv); |
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677 | 700 | if (result < 0) |
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678 | 701 | return result; |
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.. | .. |
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799 | 822 | && command != I2C_SMBUS_I2C_BLOCK_DATA |
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800 | 823 | && i801_set_block_buffer_mode(priv) == 0) |
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801 | 824 | result = i801_block_transaction_by_block(priv, data, |
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802 | | - read_write, hwpec); |
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| 825 | + read_write, |
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| 826 | + command, hwpec); |
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803 | 827 | else |
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804 | 828 | result = i801_block_transaction_byte_by_byte(priv, data, |
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805 | 829 | read_write, |
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.. | .. |
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891 | 915 | outb_p(command, SMBHSTCMD(priv)); |
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892 | 916 | block = 1; |
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893 | 917 | break; |
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| 918 | + case I2C_SMBUS_BLOCK_PROC_CALL: |
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| 919 | + /* |
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| 920 | + * Bit 0 of the slave address register always indicate a write |
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| 921 | + * command. |
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| 922 | + */ |
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| 923 | + outb_p((addr & 0x7f) << 1, SMBHSTADD(priv)); |
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| 924 | + outb_p(command, SMBHSTCMD(priv)); |
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| 925 | + block = 1; |
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| 926 | + break; |
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894 | 927 | default: |
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895 | 928 | dev_err(&priv->pci_dev->dev, "Unsupported transaction %d\n", |
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896 | 929 | size); |
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.. | .. |
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936 | 969 | } |
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937 | 970 | |
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938 | 971 | out: |
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| 972 | + /* Unlock the SMBus device for use by BIOS/ACPI */ |
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| 973 | + outb_p(SMBHSTSTS_INUSE_STS, SMBHSTSTS(priv)); |
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| 974 | + |
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939 | 975 | pm_runtime_mark_last_busy(&priv->pci_dev->dev); |
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940 | 976 | pm_runtime_put_autosuspend(&priv->pci_dev->dev); |
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941 | 977 | mutex_unlock(&priv->acpi_lock); |
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.. | .. |
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951 | 987 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | |
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952 | 988 | I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK | |
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953 | 989 | ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) | |
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| 990 | + ((priv->features & FEATURE_BLOCK_PROC) ? |
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| 991 | + I2C_FUNC_SMBUS_BLOCK_PROC_CALL : 0) | |
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954 | 992 | ((priv->features & FEATURE_I2C_BLOCK_READ) ? |
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955 | 993 | I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0) | |
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956 | 994 | ((priv->features & FEATURE_HOST_NOTIFY) ? |
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.. | .. |
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1026 | 1064 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS) }, |
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1027 | 1065 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CDF_SMBUS) }, |
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1028 | 1066 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DNV_SMBUS) }, |
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| 1067 | + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EBG_SMBUS) }, |
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1029 | 1068 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BROXTON_SMBUS) }, |
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1030 | 1069 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS) }, |
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1031 | 1070 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS) }, |
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.. | .. |
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1034 | 1073 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS) }, |
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1035 | 1074 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS) }, |
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1036 | 1075 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS) }, |
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| 1076 | + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_H_SMBUS) }, |
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| 1077 | + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS) }, |
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| 1078 | + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS) }, |
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| 1079 | + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS) }, |
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| 1080 | + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS) }, |
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| 1081 | + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS) }, |
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| 1082 | + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS) }, |
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1037 | 1083 | { 0, } |
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1038 | 1084 | }; |
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1039 | 1085 | |
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.. | .. |
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1099 | 1145 | memset(&info, 0, sizeof(struct i2c_board_info)); |
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1100 | 1146 | info.addr = dmi_devices[i].i2c_addr; |
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1101 | 1147 | strlcpy(info.type, dmi_devices[i].i2c_type, I2C_NAME_SIZE); |
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1102 | | - i2c_new_device(adap, &info); |
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| 1148 | + i2c_new_client_device(adap, &info); |
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1103 | 1149 | break; |
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1104 | 1150 | } |
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1105 | 1151 | } |
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.. | .. |
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1135 | 1181 | } |
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1136 | 1182 | } |
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1137 | 1183 | |
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| 1184 | +/* NOTE: Keep this list in sync with drivers/platform/x86/dell-smo8800.c */ |
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| 1185 | +static const char *const acpi_smo8800_ids[] = { |
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| 1186 | + "SMO8800", |
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| 1187 | + "SMO8801", |
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| 1188 | + "SMO8810", |
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| 1189 | + "SMO8811", |
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| 1190 | + "SMO8820", |
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| 1191 | + "SMO8821", |
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| 1192 | + "SMO8830", |
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| 1193 | + "SMO8831", |
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| 1194 | +}; |
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| 1195 | + |
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| 1196 | +static acpi_status check_acpi_smo88xx_device(acpi_handle obj_handle, |
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| 1197 | + u32 nesting_level, |
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| 1198 | + void *context, |
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| 1199 | + void **return_value) |
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| 1200 | +{ |
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| 1201 | + struct acpi_device_info *info; |
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| 1202 | + acpi_status status; |
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| 1203 | + char *hid; |
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| 1204 | + int i; |
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| 1205 | + |
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| 1206 | + status = acpi_get_object_info(obj_handle, &info); |
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| 1207 | + if (ACPI_FAILURE(status)) |
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| 1208 | + return AE_OK; |
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| 1209 | + |
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| 1210 | + if (!(info->valid & ACPI_VALID_HID)) |
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| 1211 | + goto smo88xx_not_found; |
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| 1212 | + |
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| 1213 | + hid = info->hardware_id.string; |
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| 1214 | + if (!hid) |
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| 1215 | + goto smo88xx_not_found; |
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| 1216 | + |
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| 1217 | + i = match_string(acpi_smo8800_ids, ARRAY_SIZE(acpi_smo8800_ids), hid); |
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| 1218 | + if (i < 0) |
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| 1219 | + goto smo88xx_not_found; |
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| 1220 | + |
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| 1221 | + kfree(info); |
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| 1222 | + |
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| 1223 | + *((bool *)return_value) = true; |
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| 1224 | + return AE_CTRL_TERMINATE; |
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| 1225 | + |
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| 1226 | +smo88xx_not_found: |
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| 1227 | + kfree(info); |
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| 1228 | + return AE_OK; |
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| 1229 | +} |
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| 1230 | + |
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| 1231 | +static bool is_dell_system_with_lis3lv02d(void) |
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| 1232 | +{ |
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| 1233 | + bool found; |
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| 1234 | + const char *vendor; |
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| 1235 | + |
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| 1236 | + vendor = dmi_get_system_info(DMI_SYS_VENDOR); |
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| 1237 | + if (!vendor || strcmp(vendor, "Dell Inc.")) |
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| 1238 | + return false; |
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| 1239 | + |
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| 1240 | + /* |
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| 1241 | + * Check that ACPI device SMO88xx is present and is functioning. |
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| 1242 | + * Function acpi_get_devices() already filters all ACPI devices |
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| 1243 | + * which are not present or are not functioning. |
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| 1244 | + * ACPI device SMO88xx represents our ST microelectronics lis3lv02d |
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| 1245 | + * accelerometer but unfortunately ACPI does not provide any other |
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| 1246 | + * information (like I2C address). |
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| 1247 | + */ |
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| 1248 | + found = false; |
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| 1249 | + acpi_get_devices(NULL, check_acpi_smo88xx_device, NULL, |
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| 1250 | + (void **)&found); |
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| 1251 | + |
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| 1252 | + return found; |
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| 1253 | +} |
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| 1254 | + |
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| 1255 | +/* |
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| 1256 | + * Accelerometer's I2C address is not specified in DMI nor ACPI, |
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| 1257 | + * so it is needed to define mapping table based on DMI product names. |
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| 1258 | + */ |
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| 1259 | +static const struct { |
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| 1260 | + const char *dmi_product_name; |
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| 1261 | + unsigned short i2c_addr; |
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| 1262 | +} dell_lis3lv02d_devices[] = { |
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| 1263 | + /* |
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| 1264 | + * Dell platform team told us that these Latitude devices have |
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| 1265 | + * ST microelectronics accelerometer at I2C address 0x29. |
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| 1266 | + */ |
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| 1267 | + { "Latitude E5250", 0x29 }, |
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| 1268 | + { "Latitude E5450", 0x29 }, |
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| 1269 | + { "Latitude E5550", 0x29 }, |
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| 1270 | + { "Latitude E6440", 0x29 }, |
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| 1271 | + { "Latitude E6440 ATG", 0x29 }, |
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| 1272 | + { "Latitude E6540", 0x29 }, |
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| 1273 | + /* |
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| 1274 | + * Additional individual entries were added after verification. |
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| 1275 | + */ |
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| 1276 | + { "Latitude 5480", 0x29 }, |
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| 1277 | + { "Vostro V131", 0x1d }, |
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| 1278 | + { "Vostro 5568", 0x29 }, |
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| 1279 | +}; |
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| 1280 | + |
---|
| 1281 | +static void register_dell_lis3lv02d_i2c_device(struct i801_priv *priv) |
---|
| 1282 | +{ |
---|
| 1283 | + struct i2c_board_info info; |
---|
| 1284 | + const char *dmi_product_name; |
---|
| 1285 | + int i; |
---|
| 1286 | + |
---|
| 1287 | + dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME); |
---|
| 1288 | + for (i = 0; i < ARRAY_SIZE(dell_lis3lv02d_devices); ++i) { |
---|
| 1289 | + if (strcmp(dmi_product_name, |
---|
| 1290 | + dell_lis3lv02d_devices[i].dmi_product_name) == 0) |
---|
| 1291 | + break; |
---|
| 1292 | + } |
---|
| 1293 | + |
---|
| 1294 | + if (i == ARRAY_SIZE(dell_lis3lv02d_devices)) { |
---|
| 1295 | + dev_warn(&priv->pci_dev->dev, |
---|
| 1296 | + "Accelerometer lis3lv02d is present on SMBus but its" |
---|
| 1297 | + " address is unknown, skipping registration\n"); |
---|
| 1298 | + return; |
---|
| 1299 | + } |
---|
| 1300 | + |
---|
| 1301 | + memset(&info, 0, sizeof(struct i2c_board_info)); |
---|
| 1302 | + info.addr = dell_lis3lv02d_devices[i].i2c_addr; |
---|
| 1303 | + strlcpy(info.type, "lis3lv02d", I2C_NAME_SIZE); |
---|
| 1304 | + i2c_new_client_device(&priv->adapter, &info); |
---|
| 1305 | +} |
---|
| 1306 | + |
---|
1138 | 1307 | /* Register optional slaves */ |
---|
1139 | 1308 | static void i801_probe_optional_slaves(struct i801_priv *priv) |
---|
1140 | 1309 | { |
---|
.. | .. |
---|
1148 | 1317 | memset(&info, 0, sizeof(struct i2c_board_info)); |
---|
1149 | 1318 | info.addr = apanel_addr; |
---|
1150 | 1319 | strlcpy(info.type, "fujitsu_apanel", I2C_NAME_SIZE); |
---|
1151 | | - i2c_new_device(&priv->adapter, &info); |
---|
| 1320 | + i2c_new_client_device(&priv->adapter, &info); |
---|
1152 | 1321 | } |
---|
1153 | 1322 | |
---|
1154 | 1323 | if (dmi_name_in_vendors("FUJITSU")) |
---|
1155 | 1324 | dmi_walk(dmi_check_onboard_devices, &priv->adapter); |
---|
| 1325 | + |
---|
| 1326 | + if (is_dell_system_with_lis3lv02d()) |
---|
| 1327 | + register_dell_lis3lv02d_i2c_device(priv); |
---|
| 1328 | + |
---|
| 1329 | + /* Instantiate SPD EEPROMs unless the SMBus is multiplexed */ |
---|
| 1330 | +#if IS_ENABLED(CONFIG_I2C_MUX_GPIO) |
---|
| 1331 | + if (!priv->mux_drvdata) |
---|
| 1332 | +#endif |
---|
| 1333 | + i2c_register_spd(&priv->adapter); |
---|
1156 | 1334 | } |
---|
1157 | 1335 | #else |
---|
1158 | 1336 | static void __init input_apanel_init(void) {} |
---|
.. | .. |
---|
1251 | 1429 | struct device *dev = &priv->adapter.dev; |
---|
1252 | 1430 | const struct i801_mux_config *mux_config; |
---|
1253 | 1431 | struct i2c_mux_gpio_platform_data gpio_data; |
---|
1254 | | - int err; |
---|
| 1432 | + struct gpiod_lookup_table *lookup; |
---|
| 1433 | + int err, i; |
---|
1255 | 1434 | |
---|
1256 | 1435 | if (!priv->mux_drvdata) |
---|
1257 | 1436 | return 0; |
---|
.. | .. |
---|
1263 | 1442 | gpio_data.values = mux_config->values; |
---|
1264 | 1443 | gpio_data.n_values = mux_config->n_values; |
---|
1265 | 1444 | gpio_data.classes = mux_config->classes; |
---|
1266 | | - gpio_data.gpio_chip = mux_config->gpio_chip; |
---|
1267 | | - gpio_data.gpios = mux_config->gpios; |
---|
1268 | | - gpio_data.n_gpios = mux_config->n_gpios; |
---|
1269 | 1445 | gpio_data.idle = I2C_MUX_GPIO_NO_IDLE; |
---|
1270 | 1446 | |
---|
1271 | | - /* Register the mux device */ |
---|
| 1447 | + /* Register GPIO descriptor lookup table */ |
---|
| 1448 | + lookup = devm_kzalloc(dev, |
---|
| 1449 | + struct_size(lookup, table, mux_config->n_gpios + 1), |
---|
| 1450 | + GFP_KERNEL); |
---|
| 1451 | + if (!lookup) |
---|
| 1452 | + return -ENOMEM; |
---|
| 1453 | + lookup->dev_id = "i2c-mux-gpio"; |
---|
| 1454 | + for (i = 0; i < mux_config->n_gpios; i++) { |
---|
| 1455 | + lookup->table[i] = (struct gpiod_lookup) |
---|
| 1456 | + GPIO_LOOKUP(mux_config->gpio_chip, |
---|
| 1457 | + mux_config->gpios[i], "mux", 0); |
---|
| 1458 | + } |
---|
| 1459 | + gpiod_add_lookup_table(lookup); |
---|
| 1460 | + priv->lookup = lookup; |
---|
| 1461 | + |
---|
| 1462 | + /* |
---|
| 1463 | + * Register the mux device, we use PLATFORM_DEVID_NONE here |
---|
| 1464 | + * because since we are referring to the GPIO chip by name we are |
---|
| 1465 | + * anyways in deep trouble if there is more than one of these |
---|
| 1466 | + * devices, and there should likely only be one platform controller |
---|
| 1467 | + * hub. |
---|
| 1468 | + */ |
---|
1272 | 1469 | priv->mux_pdev = platform_device_register_data(dev, "i2c-mux-gpio", |
---|
1273 | | - PLATFORM_DEVID_AUTO, &gpio_data, |
---|
| 1470 | + PLATFORM_DEVID_NONE, &gpio_data, |
---|
1274 | 1471 | sizeof(struct i2c_mux_gpio_platform_data)); |
---|
1275 | 1472 | if (IS_ERR(priv->mux_pdev)) { |
---|
1276 | 1473 | err = PTR_ERR(priv->mux_pdev); |
---|
| 1474 | + gpiod_remove_lookup_table(lookup); |
---|
1277 | 1475 | priv->mux_pdev = NULL; |
---|
1278 | 1476 | dev_err(dev, "Failed to register i2c-mux-gpio device\n"); |
---|
1279 | 1477 | return err; |
---|
.. | .. |
---|
1286 | 1484 | { |
---|
1287 | 1485 | if (priv->mux_pdev) |
---|
1288 | 1486 | platform_device_unregister(priv->mux_pdev); |
---|
| 1487 | + if (priv->lookup) |
---|
| 1488 | + gpiod_remove_lookup_table(priv->lookup); |
---|
1289 | 1489 | } |
---|
1290 | 1490 | |
---|
1291 | 1491 | static unsigned int i801_get_adapter_class(struct i801_priv *priv) |
---|
.. | .. |
---|
1318 | 1518 | } |
---|
1319 | 1519 | #endif |
---|
1320 | 1520 | |
---|
1321 | | -static const struct itco_wdt_platform_data tco_platform_data = { |
---|
| 1521 | +static const struct itco_wdt_platform_data spt_tco_platform_data = { |
---|
1322 | 1522 | .name = "Intel PCH", |
---|
1323 | 1523 | .version = 4, |
---|
1324 | 1524 | }; |
---|
1325 | 1525 | |
---|
1326 | 1526 | static DEFINE_SPINLOCK(p2sb_spinlock); |
---|
1327 | 1527 | |
---|
1328 | | -static void i801_add_tco(struct i801_priv *priv) |
---|
| 1528 | +static struct platform_device * |
---|
| 1529 | +i801_add_tco_spt(struct i801_priv *priv, struct pci_dev *pci_dev, |
---|
| 1530 | + struct resource *tco_res) |
---|
1329 | 1531 | { |
---|
1330 | | - struct pci_dev *pci_dev = priv->pci_dev; |
---|
1331 | | - struct resource tco_res[3], *res; |
---|
1332 | | - struct platform_device *pdev; |
---|
| 1532 | + struct resource *res; |
---|
1333 | 1533 | unsigned int devfn; |
---|
1334 | | - u32 tco_base, tco_ctl; |
---|
1335 | | - u32 base_addr, ctrl_val; |
---|
1336 | 1534 | u64 base64_addr; |
---|
| 1535 | + u32 base_addr; |
---|
1337 | 1536 | u8 hidden; |
---|
1338 | | - |
---|
1339 | | - if (!(priv->features & FEATURE_TCO)) |
---|
1340 | | - return; |
---|
1341 | | - |
---|
1342 | | - pci_read_config_dword(pci_dev, TCOBASE, &tco_base); |
---|
1343 | | - pci_read_config_dword(pci_dev, TCOCTL, &tco_ctl); |
---|
1344 | | - if (!(tco_ctl & TCOCTL_EN)) |
---|
1345 | | - return; |
---|
1346 | | - |
---|
1347 | | - memset(tco_res, 0, sizeof(tco_res)); |
---|
1348 | | - |
---|
1349 | | - res = &tco_res[ICH_RES_IO_TCO]; |
---|
1350 | | - res->start = tco_base & ~1; |
---|
1351 | | - res->end = res->start + 32 - 1; |
---|
1352 | | - res->flags = IORESOURCE_IO; |
---|
1353 | | - |
---|
1354 | | - /* |
---|
1355 | | - * Power Management registers. |
---|
1356 | | - */ |
---|
1357 | | - devfn = PCI_DEVFN(PCI_SLOT(pci_dev->devfn), 2); |
---|
1358 | | - pci_bus_read_config_dword(pci_dev->bus, devfn, ACPIBASE, &base_addr); |
---|
1359 | | - |
---|
1360 | | - res = &tco_res[ICH_RES_IO_SMI]; |
---|
1361 | | - res->start = (base_addr & ~1) + ACPIBASE_SMI_OFF; |
---|
1362 | | - res->end = res->start + 3; |
---|
1363 | | - res->flags = IORESOURCE_IO; |
---|
1364 | | - |
---|
1365 | | - /* |
---|
1366 | | - * Enable the ACPI I/O space. |
---|
1367 | | - */ |
---|
1368 | | - pci_bus_read_config_dword(pci_dev->bus, devfn, ACPICTRL, &ctrl_val); |
---|
1369 | | - ctrl_val |= ACPICTRL_EN; |
---|
1370 | | - pci_bus_write_config_dword(pci_dev->bus, devfn, ACPICTRL, ctrl_val); |
---|
1371 | 1537 | |
---|
1372 | 1538 | /* |
---|
1373 | 1539 | * We must access the NO_REBOOT bit over the Primary to Sideband |
---|
.. | .. |
---|
1395 | 1561 | pci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, hidden); |
---|
1396 | 1562 | spin_unlock(&p2sb_spinlock); |
---|
1397 | 1563 | |
---|
1398 | | - res = &tco_res[ICH_RES_MEM_OFF]; |
---|
| 1564 | + res = &tco_res[1]; |
---|
1399 | 1565 | if (pci_dev->device == PCI_DEVICE_ID_INTEL_DNV_SMBUS) |
---|
1400 | 1566 | res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL_DNV; |
---|
1401 | 1567 | else |
---|
.. | .. |
---|
1404 | 1570 | res->end = res->start + 3; |
---|
1405 | 1571 | res->flags = IORESOURCE_MEM; |
---|
1406 | 1572 | |
---|
1407 | | - pdev = platform_device_register_resndata(&pci_dev->dev, "iTCO_wdt", -1, |
---|
1408 | | - tco_res, 3, &tco_platform_data, |
---|
1409 | | - sizeof(tco_platform_data)); |
---|
1410 | | - if (IS_ERR(pdev)) { |
---|
1411 | | - dev_warn(&pci_dev->dev, "failed to create iTCO device\n"); |
---|
1412 | | - return; |
---|
1413 | | - } |
---|
| 1573 | + return platform_device_register_resndata(&pci_dev->dev, "iTCO_wdt", -1, |
---|
| 1574 | + tco_res, 2, &spt_tco_platform_data, |
---|
| 1575 | + sizeof(spt_tco_platform_data)); |
---|
| 1576 | +} |
---|
1414 | 1577 | |
---|
1415 | | - priv->tco_pdev = pdev; |
---|
| 1578 | +static const struct itco_wdt_platform_data cnl_tco_platform_data = { |
---|
| 1579 | + .name = "Intel PCH", |
---|
| 1580 | + .version = 6, |
---|
| 1581 | +}; |
---|
| 1582 | + |
---|
| 1583 | +static struct platform_device * |
---|
| 1584 | +i801_add_tco_cnl(struct i801_priv *priv, struct pci_dev *pci_dev, |
---|
| 1585 | + struct resource *tco_res) |
---|
| 1586 | +{ |
---|
| 1587 | + return platform_device_register_resndata(&pci_dev->dev, |
---|
| 1588 | + "iTCO_wdt", -1, tco_res, 1, &cnl_tco_platform_data, |
---|
| 1589 | + sizeof(cnl_tco_platform_data)); |
---|
| 1590 | +} |
---|
| 1591 | + |
---|
| 1592 | +static void i801_add_tco(struct i801_priv *priv) |
---|
| 1593 | +{ |
---|
| 1594 | + struct pci_dev *pci_dev = priv->pci_dev; |
---|
| 1595 | + struct resource tco_res[2], *res; |
---|
| 1596 | + u32 tco_base, tco_ctl; |
---|
| 1597 | + |
---|
| 1598 | + /* If we have ACPI based watchdog use that instead */ |
---|
| 1599 | + if (acpi_has_watchdog()) |
---|
| 1600 | + return; |
---|
| 1601 | + |
---|
| 1602 | + if (!(priv->features & (FEATURE_TCO_SPT | FEATURE_TCO_CNL))) |
---|
| 1603 | + return; |
---|
| 1604 | + |
---|
| 1605 | + pci_read_config_dword(pci_dev, TCOBASE, &tco_base); |
---|
| 1606 | + pci_read_config_dword(pci_dev, TCOCTL, &tco_ctl); |
---|
| 1607 | + if (!(tco_ctl & TCOCTL_EN)) |
---|
| 1608 | + return; |
---|
| 1609 | + |
---|
| 1610 | + memset(tco_res, 0, sizeof(tco_res)); |
---|
| 1611 | + /* |
---|
| 1612 | + * Always populate the main iTCO IO resource here. The second entry |
---|
| 1613 | + * for NO_REBOOT MMIO is filled by the SPT specific function. |
---|
| 1614 | + */ |
---|
| 1615 | + res = &tco_res[0]; |
---|
| 1616 | + res->start = tco_base & ~1; |
---|
| 1617 | + res->end = res->start + 32 - 1; |
---|
| 1618 | + res->flags = IORESOURCE_IO; |
---|
| 1619 | + |
---|
| 1620 | + if (priv->features & FEATURE_TCO_CNL) |
---|
| 1621 | + priv->tco_pdev = i801_add_tco_cnl(priv, pci_dev, tco_res); |
---|
| 1622 | + else |
---|
| 1623 | + priv->tco_pdev = i801_add_tco_spt(priv, pci_dev, tco_res); |
---|
| 1624 | + |
---|
| 1625 | + if (IS_ERR(priv->tco_pdev)) |
---|
| 1626 | + dev_warn(&pci_dev->dev, "failed to create iTCO device\n"); |
---|
1416 | 1627 | } |
---|
1417 | 1628 | |
---|
1418 | 1629 | #ifdef CONFIG_ACPI |
---|
.. | .. |
---|
1532 | 1743 | switch (dev->device) { |
---|
1533 | 1744 | case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS: |
---|
1534 | 1745 | case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS: |
---|
1535 | | - case PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS: |
---|
1536 | | - case PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS: |
---|
1537 | 1746 | case PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS: |
---|
1538 | 1747 | case PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS: |
---|
1539 | | - case PCI_DEVICE_ID_INTEL_CDF_SMBUS: |
---|
1540 | 1748 | case PCI_DEVICE_ID_INTEL_DNV_SMBUS: |
---|
1541 | 1749 | case PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS: |
---|
1542 | | - case PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS: |
---|
1543 | | - case PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS: |
---|
| 1750 | + case PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS: |
---|
| 1751 | + priv->features |= FEATURE_BLOCK_PROC; |
---|
1544 | 1752 | priv->features |= FEATURE_I2C_BLOCK_READ; |
---|
1545 | 1753 | priv->features |= FEATURE_IRQ; |
---|
1546 | 1754 | priv->features |= FEATURE_SMBUS_PEC; |
---|
1547 | 1755 | priv->features |= FEATURE_BLOCK_BUFFER; |
---|
1548 | | - /* If we have ACPI based watchdog use that instead */ |
---|
1549 | | - if (!acpi_has_watchdog()) |
---|
1550 | | - priv->features |= FEATURE_TCO; |
---|
| 1756 | + priv->features |= FEATURE_TCO_SPT; |
---|
| 1757 | + priv->features |= FEATURE_HOST_NOTIFY; |
---|
| 1758 | + break; |
---|
| 1759 | + |
---|
| 1760 | + case PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS: |
---|
| 1761 | + case PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS: |
---|
| 1762 | + case PCI_DEVICE_ID_INTEL_CDF_SMBUS: |
---|
| 1763 | + case PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS: |
---|
| 1764 | + case PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS: |
---|
| 1765 | + case PCI_DEVICE_ID_INTEL_COMETLAKE_H_SMBUS: |
---|
| 1766 | + case PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS: |
---|
| 1767 | + case PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS: |
---|
| 1768 | + case PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS: |
---|
| 1769 | + case PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS: |
---|
| 1770 | + case PCI_DEVICE_ID_INTEL_EBG_SMBUS: |
---|
| 1771 | + case PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS: |
---|
| 1772 | + priv->features |= FEATURE_BLOCK_PROC; |
---|
| 1773 | + priv->features |= FEATURE_I2C_BLOCK_READ; |
---|
| 1774 | + priv->features |= FEATURE_IRQ; |
---|
| 1775 | + priv->features |= FEATURE_SMBUS_PEC; |
---|
| 1776 | + priv->features |= FEATURE_BLOCK_BUFFER; |
---|
| 1777 | + priv->features |= FEATURE_TCO_CNL; |
---|
1551 | 1778 | priv->features |= FEATURE_HOST_NOTIFY; |
---|
1552 | 1779 | break; |
---|
1553 | 1780 | |
---|
.. | .. |
---|
1558 | 1785 | case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1: |
---|
1559 | 1786 | case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2: |
---|
1560 | 1787 | priv->features |= FEATURE_IDF; |
---|
1561 | | - /* fall through */ |
---|
| 1788 | + fallthrough; |
---|
1562 | 1789 | default: |
---|
| 1790 | + priv->features |= FEATURE_BLOCK_PROC; |
---|
1563 | 1791 | priv->features |= FEATURE_I2C_BLOCK_READ; |
---|
1564 | 1792 | priv->features |= FEATURE_IRQ; |
---|
1565 | | - /* fall through */ |
---|
| 1793 | + fallthrough; |
---|
1566 | 1794 | case PCI_DEVICE_ID_INTEL_82801DB_3: |
---|
1567 | 1795 | priv->features |= FEATURE_SMBUS_PEC; |
---|
1568 | 1796 | priv->features |= FEATURE_BLOCK_BUFFER; |
---|
1569 | | - /* fall through */ |
---|
| 1797 | + fallthrough; |
---|
1570 | 1798 | case PCI_DEVICE_ID_INTEL_82801CA_3: |
---|
1571 | 1799 | priv->features |= FEATURE_HOST_NOTIFY; |
---|
1572 | | - /* fall through */ |
---|
| 1800 | + fallthrough; |
---|
1573 | 1801 | case PCI_DEVICE_ID_INTEL_82801BA_2: |
---|
1574 | 1802 | case PCI_DEVICE_ID_INTEL_82801AB_3: |
---|
1575 | 1803 | case PCI_DEVICE_ID_INTEL_82801AA_3: |
---|
.. | .. |
---|
1679 | 1907 | "SMBus I801 adapter at %04lx", priv->smba); |
---|
1680 | 1908 | err = i2c_add_adapter(&priv->adapter); |
---|
1681 | 1909 | if (err) { |
---|
| 1910 | + platform_device_unregister(priv->tco_pdev); |
---|
1682 | 1911 | i801_acpi_remove(priv); |
---|
1683 | 1912 | return err; |
---|
1684 | 1913 | } |
---|
.. | .. |
---|
1691 | 1920 | |
---|
1692 | 1921 | pci_set_drvdata(dev, priv); |
---|
1693 | 1922 | |
---|
1694 | | - dev_pm_set_driver_flags(&dev->dev, DPM_FLAG_NEVER_SKIP); |
---|
| 1923 | + dev_pm_set_driver_flags(&dev->dev, DPM_FLAG_NO_DIRECT_COMPLETE); |
---|
1695 | 1924 | pm_runtime_set_autosuspend_delay(&dev->dev, 1000); |
---|
1696 | 1925 | pm_runtime_use_autosuspend(&dev->dev); |
---|
1697 | 1926 | pm_runtime_put_autosuspend(&dev->dev); |
---|
.. | .. |
---|
1733 | 1962 | #ifdef CONFIG_PM_SLEEP |
---|
1734 | 1963 | static int i801_suspend(struct device *dev) |
---|
1735 | 1964 | { |
---|
1736 | | - struct pci_dev *pci_dev = to_pci_dev(dev); |
---|
1737 | | - struct i801_priv *priv = pci_get_drvdata(pci_dev); |
---|
| 1965 | + struct i801_priv *priv = dev_get_drvdata(dev); |
---|
1738 | 1966 | |
---|
1739 | | - pci_write_config_byte(pci_dev, SMBHSTCFG, priv->original_hstcfg); |
---|
| 1967 | + pci_write_config_byte(priv->pci_dev, SMBHSTCFG, priv->original_hstcfg); |
---|
1740 | 1968 | return 0; |
---|
1741 | 1969 | } |
---|
1742 | 1970 | |
---|
1743 | 1971 | static int i801_resume(struct device *dev) |
---|
1744 | 1972 | { |
---|
1745 | | - struct pci_dev *pci_dev = to_pci_dev(dev); |
---|
1746 | | - struct i801_priv *priv = pci_get_drvdata(pci_dev); |
---|
| 1973 | + struct i801_priv *priv = dev_get_drvdata(dev); |
---|
1747 | 1974 | |
---|
1748 | 1975 | i801_setup_hstcfg(priv); |
---|
1749 | 1976 | i801_enable_host_notify(&priv->adapter); |
---|
.. | .. |
---|
1777 | 2004 | pci_unregister_driver(&i801_driver); |
---|
1778 | 2005 | } |
---|
1779 | 2006 | |
---|
1780 | | -MODULE_AUTHOR("Mark D. Studebaker <mdsxyz123@yahoo.com>, Jean Delvare <jdelvare@suse.de>"); |
---|
| 2007 | +MODULE_AUTHOR("Mark D. Studebaker <mdsxyz123@yahoo.com>"); |
---|
| 2008 | +MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>"); |
---|
1781 | 2009 | MODULE_DESCRIPTION("I801 SMBus driver"); |
---|
1782 | 2010 | MODULE_LICENSE("GPL"); |
---|
1783 | 2011 | |
---|