hc
2024-10-12 a5969cabbb4660eab42b6ef0412cbbd1200cf14d
kernel/drivers/i2c/busses/i2c-designware-platdrv.c
....@@ -19,6 +19,7 @@
1919 #include <linux/interrupt.h>
2020 #include <linux/io.h>
2121 #include <linux/kernel.h>
22
+#include <linux/mfd/syscon.h>
2223 #include <linux/module.h>
2324 #include <linux/of.h>
2425 #include <linux/platform_data/i2c-designware.h>
....@@ -26,204 +27,183 @@
2627 #include <linux/pm.h>
2728 #include <linux/pm_runtime.h>
2829 #include <linux/property.h>
30
+#include <linux/regmap.h>
2931 #include <linux/reset.h>
3032 #include <linux/sched.h>
3133 #include <linux/slab.h>
3234 #include <linux/suspend.h>
35
+#include <linux/units.h>
3336
3437 #include "i2c-designware-core.h"
3538
3639 static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
3740 {
38
- return clk_get_rate(dev->clk)/1000;
41
+ return clk_get_rate(dev->clk) / KILO;
3942 }
4043
4144 #ifdef CONFIG_ACPI
42
-/*
43
- * The HCNT/LCNT information coming from ACPI should be the most accurate
44
- * for given platform. However, some systems get it wrong. On such systems
45
- * we get better results by calculating those based on the input clock.
46
- */
47
-static const struct dmi_system_id dw_i2c_no_acpi_params[] = {
48
- {
49
- .ident = "Dell Inspiron 7348",
50
- .matches = {
51
- DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
52
- DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 7348"),
53
- },
54
- },
55
- { }
56
-};
57
-
58
-static void dw_i2c_acpi_params(struct platform_device *pdev, char method[],
59
- u16 *hcnt, u16 *lcnt, u32 *sda_hold)
60
-{
61
- struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER };
62
- acpi_handle handle = ACPI_HANDLE(&pdev->dev);
63
- union acpi_object *obj;
64
-
65
- if (dmi_check_system(dw_i2c_no_acpi_params))
66
- return;
67
-
68
- if (ACPI_FAILURE(acpi_evaluate_object(handle, method, NULL, &buf)))
69
- return;
70
-
71
- obj = (union acpi_object *)buf.pointer;
72
- if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 3) {
73
- const union acpi_object *objs = obj->package.elements;
74
-
75
- *hcnt = (u16)objs[0].integer.value;
76
- *lcnt = (u16)objs[1].integer.value;
77
- *sda_hold = (u32)objs[2].integer.value;
78
- }
79
-
80
- kfree(buf.pointer);
81
-}
82
-
83
-static int dw_i2c_acpi_configure(struct platform_device *pdev)
84
-{
85
- struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
86
- struct i2c_timings *t = &dev->timings;
87
- u32 ss_ht = 0, fp_ht = 0, hs_ht = 0, fs_ht = 0;
88
- acpi_handle handle = ACPI_HANDLE(&pdev->dev);
89
- const struct acpi_device_id *id;
90
- struct acpi_device *adev;
91
- const char *uid;
92
-
93
- dev->adapter.nr = -1;
94
- dev->tx_fifo_depth = 32;
95
- dev->rx_fifo_depth = 32;
96
-
97
- /*
98
- * Try to get SDA hold time and *CNT values from an ACPI method for
99
- * selected speed modes.
100
- */
101
- dw_i2c_acpi_params(pdev, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt, &ss_ht);
102
- dw_i2c_acpi_params(pdev, "FPCN", &dev->fp_hcnt, &dev->fp_lcnt, &fp_ht);
103
- dw_i2c_acpi_params(pdev, "HSCN", &dev->hs_hcnt, &dev->hs_lcnt, &hs_ht);
104
- dw_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt, &fs_ht);
105
-
106
- switch (t->bus_freq_hz) {
107
- case 100000:
108
- dev->sda_hold_time = ss_ht;
109
- break;
110
- case 1000000:
111
- dev->sda_hold_time = fp_ht;
112
- break;
113
- case 3400000:
114
- dev->sda_hold_time = hs_ht;
115
- break;
116
- case 400000:
117
- default:
118
- dev->sda_hold_time = fs_ht;
119
- break;
120
- }
121
-
122
- id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev);
123
- if (id && id->driver_data)
124
- dev->flags |= (u32)id->driver_data;
125
-
126
- if (acpi_bus_get_device(handle, &adev))
127
- return -ENODEV;
128
-
129
- /*
130
- * Cherrytrail I2C7 gets used for the PMIC which gets accessed
131
- * through ACPI opregions during late suspend / early resume
132
- * disable pm for it.
133
- */
134
- uid = adev->pnp.unique_id;
135
- if ((dev->flags & MODEL_CHERRYTRAIL) && !strcmp(uid, "7"))
136
- dev->pm_disabled = true;
137
-
138
- return 0;
139
-}
140
-
14145 static const struct acpi_device_id dw_i2c_acpi_match[] = {
14246 { "INT33C2", 0 },
14347 { "INT33C3", 0 },
14448 { "INT3432", 0 },
14549 { "INT3433", 0 },
146
- { "80860F41", 0 },
147
- { "808622C1", MODEL_CHERRYTRAIL },
50
+ { "80860F41", ACCESS_NO_IRQ_SUSPEND },
51
+ { "808622C1", ACCESS_NO_IRQ_SUSPEND },
14852 { "AMD0010", ACCESS_INTR_MASK },
14953 { "AMDI0010", ACCESS_INTR_MASK },
15054 { "AMDI0510", 0 },
15155 { "APMC0D0F", 0 },
15256 { "HISI02A1", 0 },
15357 { "HISI02A2", 0 },
58
+ { "HISI02A3", 0 },
59
+ { "HYGO0010", ACCESS_INTR_MASK },
15460 { }
15561 };
15662 MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
63
+#endif
64
+
65
+#ifdef CONFIG_OF
66
+#define BT1_I2C_CTL 0x100
67
+#define BT1_I2C_CTL_ADDR_MASK GENMASK(7, 0)
68
+#define BT1_I2C_CTL_WR BIT(8)
69
+#define BT1_I2C_CTL_GO BIT(31)
70
+#define BT1_I2C_DI 0x104
71
+#define BT1_I2C_DO 0x108
72
+
73
+static int bt1_i2c_read(void *context, unsigned int reg, unsigned int *val)
74
+{
75
+ struct dw_i2c_dev *dev = context;
76
+ int ret;
77
+
78
+ /*
79
+ * Note these methods shouldn't ever fail because the system controller
80
+ * registers are memory mapped. We check the return value just in case.
81
+ */
82
+ ret = regmap_write(dev->sysmap, BT1_I2C_CTL,
83
+ BT1_I2C_CTL_GO | (reg & BT1_I2C_CTL_ADDR_MASK));
84
+ if (ret)
85
+ return ret;
86
+
87
+ return regmap_read(dev->sysmap, BT1_I2C_DO, val);
88
+}
89
+
90
+static int bt1_i2c_write(void *context, unsigned int reg, unsigned int val)
91
+{
92
+ struct dw_i2c_dev *dev = context;
93
+ int ret;
94
+
95
+ ret = regmap_write(dev->sysmap, BT1_I2C_DI, val);
96
+ if (ret)
97
+ return ret;
98
+
99
+ return regmap_write(dev->sysmap, BT1_I2C_CTL,
100
+ BT1_I2C_CTL_GO | BT1_I2C_CTL_WR | (reg & BT1_I2C_CTL_ADDR_MASK));
101
+}
102
+
103
+static struct regmap_config bt1_i2c_cfg = {
104
+ .reg_bits = 32,
105
+ .val_bits = 32,
106
+ .reg_stride = 4,
107
+ .fast_io = true,
108
+ .reg_read = bt1_i2c_read,
109
+ .reg_write = bt1_i2c_write,
110
+ .max_register = DW_IC_COMP_TYPE,
111
+};
112
+
113
+static int bt1_i2c_request_regs(struct dw_i2c_dev *dev)
114
+{
115
+ dev->sysmap = syscon_node_to_regmap(dev->dev->of_node->parent);
116
+ if (IS_ERR(dev->sysmap))
117
+ return PTR_ERR(dev->sysmap);
118
+
119
+ dev->map = devm_regmap_init(dev->dev, NULL, dev, &bt1_i2c_cfg);
120
+ return PTR_ERR_OR_ZERO(dev->map);
121
+}
122
+
123
+#define MSCC_ICPU_CFG_TWI_DELAY 0x0
124
+#define MSCC_ICPU_CFG_TWI_DELAY_ENABLE BIT(0)
125
+#define MSCC_ICPU_CFG_TWI_SPIKE_FILTER 0x4
126
+
127
+static int mscc_twi_set_sda_hold_time(struct dw_i2c_dev *dev)
128
+{
129
+ writel((dev->sda_hold_time << 1) | MSCC_ICPU_CFG_TWI_DELAY_ENABLE,
130
+ dev->ext + MSCC_ICPU_CFG_TWI_DELAY);
131
+
132
+ return 0;
133
+}
134
+
135
+static int dw_i2c_of_configure(struct platform_device *pdev)
136
+{
137
+ struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
138
+
139
+ switch (dev->flags & MODEL_MASK) {
140
+ case MODEL_MSCC_OCELOT:
141
+ dev->ext = devm_platform_ioremap_resource(pdev, 1);
142
+ if (!IS_ERR(dev->ext))
143
+ dev->set_sda_hold_time = mscc_twi_set_sda_hold_time;
144
+ break;
145
+ default:
146
+ break;
147
+ }
148
+
149
+ return 0;
150
+}
151
+
152
+static const struct of_device_id dw_i2c_of_match[] = {
153
+ { .compatible = "snps,designware-i2c", },
154
+ { .compatible = "mscc,ocelot-i2c", .data = (void *)MODEL_MSCC_OCELOT },
155
+ { .compatible = "baikal,bt1-sys-i2c", .data = (void *)MODEL_BAIKAL_BT1 },
156
+ {},
157
+};
158
+MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
157159 #else
158
-static inline int dw_i2c_acpi_configure(struct platform_device *pdev)
160
+static int bt1_i2c_request_regs(struct dw_i2c_dev *dev)
161
+{
162
+ return -ENODEV;
163
+}
164
+
165
+static inline int dw_i2c_of_configure(struct platform_device *pdev)
159166 {
160167 return -ENODEV;
161168 }
162169 #endif
163170
164
-static void i2c_dw_configure_master(struct dw_i2c_dev *dev)
165
-{
166
- struct i2c_timings *t = &dev->timings;
167
-
168
- dev->functionality = I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY;
169
-
170
- dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
171
- DW_IC_CON_RESTART_EN;
172
-
173
- dev->mode = DW_IC_MASTER;
174
-
175
- switch (t->bus_freq_hz) {
176
- case 100000:
177
- dev->master_cfg |= DW_IC_CON_SPEED_STD;
178
- break;
179
- case 3400000:
180
- dev->master_cfg |= DW_IC_CON_SPEED_HIGH;
181
- break;
182
- default:
183
- dev->master_cfg |= DW_IC_CON_SPEED_FAST;
184
- }
185
-}
186
-
187
-static void i2c_dw_configure_slave(struct dw_i2c_dev *dev)
188
-{
189
- dev->functionality = I2C_FUNC_SLAVE | DW_IC_DEFAULT_FUNCTIONALITY;
190
-
191
- dev->slave_cfg = DW_IC_CON_RX_FIFO_FULL_HLD_CTRL |
192
- DW_IC_CON_RESTART_EN | DW_IC_CON_STOP_DET_IFADDRESSED;
193
-
194
- dev->mode = DW_IC_SLAVE;
195
-}
196
-
197
-static void dw_i2c_set_fifo_size(struct dw_i2c_dev *dev, int id)
198
-{
199
- u32 param, tx_fifo_depth, rx_fifo_depth;
200
-
201
- /*
202
- * Try to detect the FIFO depth if not set by interface driver,
203
- * the depth could be from 2 to 256 from HW spec.
204
- */
205
- param = i2c_dw_read_comp_param(dev);
206
- tx_fifo_depth = ((param >> 16) & 0xff) + 1;
207
- rx_fifo_depth = ((param >> 8) & 0xff) + 1;
208
- if (!dev->tx_fifo_depth) {
209
- dev->tx_fifo_depth = tx_fifo_depth;
210
- dev->rx_fifo_depth = rx_fifo_depth;
211
- dev->adapter.nr = id;
212
- } else if (tx_fifo_depth >= 2) {
213
- dev->tx_fifo_depth = min_t(u32, dev->tx_fifo_depth,
214
- tx_fifo_depth);
215
- dev->rx_fifo_depth = min_t(u32, dev->rx_fifo_depth,
216
- rx_fifo_depth);
217
- }
218
-}
219
-
220171 static void dw_i2c_plat_pm_cleanup(struct dw_i2c_dev *dev)
221172 {
222173 pm_runtime_disable(dev->dev);
223174
224
- if (dev->pm_disabled)
175
+ if (dev->shared_with_punit)
225176 pm_runtime_put_noidle(dev->dev);
226177 }
178
+
179
+static int dw_i2c_plat_request_regs(struct dw_i2c_dev *dev)
180
+{
181
+ struct platform_device *pdev = to_platform_device(dev->dev);
182
+ int ret;
183
+
184
+ switch (dev->flags & MODEL_MASK) {
185
+ case MODEL_BAIKAL_BT1:
186
+ ret = bt1_i2c_request_regs(dev);
187
+ break;
188
+ default:
189
+ dev->base = devm_platform_ioremap_resource(pdev, 0);
190
+ ret = PTR_ERR_OR_ZERO(dev->base);
191
+ break;
192
+ }
193
+
194
+ return ret;
195
+}
196
+
197
+static const struct dmi_system_id dw_i2c_hwmon_class_dmi[] = {
198
+ {
199
+ .ident = "Qtechnology QT5222",
200
+ .matches = {
201
+ DMI_MATCH(DMI_SYS_VENDOR, "Qtechnology"),
202
+ DMI_MATCH(DMI_PRODUCT_NAME, "QT5222"),
203
+ },
204
+ },
205
+ { } /* terminate list */
206
+};
227207
228208 static int dw_i2c_plat_probe(struct platform_device *pdev)
229209 {
....@@ -231,12 +211,7 @@
231211 struct i2c_adapter *adap;
232212 struct dw_i2c_dev *dev;
233213 struct i2c_timings *t;
234
- u32 acpi_speed;
235
- struct resource *mem;
236
- int i, irq, ret;
237
- static const int supported_speeds[] = {
238
- 0, 100000, 400000, 1000000, 3400000
239
- };
214
+ int irq, ret;
240215
241216 irq = platform_get_irq(pdev, 0);
242217 if (irq < 0)
....@@ -246,22 +221,20 @@
246221 if (!dev)
247222 return -ENOMEM;
248223
249
- mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
250
- dev->base = devm_ioremap_resource(&pdev->dev, mem);
251
- if (IS_ERR(dev->base))
252
- return PTR_ERR(dev->base);
253
-
224
+ dev->flags = (uintptr_t)device_get_match_data(&pdev->dev);
254225 dev->dev = &pdev->dev;
255226 dev->irq = irq;
256227 platform_set_drvdata(pdev, dev);
257228
229
+ ret = dw_i2c_plat_request_regs(dev);
230
+ if (ret)
231
+ return ret;
232
+
258233 dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
259
- if (IS_ERR(dev->rst)) {
260
- if (PTR_ERR(dev->rst) == -EPROBE_DEFER)
261
- return -EPROBE_DEFER;
262
- } else {
263
- reset_control_deassert(dev->rst);
264
- }
234
+ if (IS_ERR(dev->rst))
235
+ return PTR_ERR(dev->rst);
236
+
237
+ reset_control_deassert(dev->rst);
265238
266239 t = &dev->timings;
267240 if (pdata)
....@@ -269,55 +242,42 @@
269242 else
270243 i2c_parse_fw_timings(&pdev->dev, t, false);
271244
272
- acpi_speed = i2c_acpi_find_bus_speed(&pdev->dev);
273
- /*
274
- * Some DSTDs use a non standard speed, round down to the lowest
275
- * standard speed.
276
- */
277
- for (i = 1; i < ARRAY_SIZE(supported_speeds); i++) {
278
- if (acpi_speed < supported_speeds[i])
279
- break;
280
- }
281
- acpi_speed = supported_speeds[i - 1];
245
+ i2c_dw_adjust_bus_speed(dev);
282246
283
- /*
284
- * Find bus speed from the "clock-frequency" device property, ACPI
285
- * or by using fast mode if neither is set.
286
- */
287
- if (acpi_speed && t->bus_freq_hz)
288
- t->bus_freq_hz = min(t->bus_freq_hz, acpi_speed);
289
- else if (acpi_speed || t->bus_freq_hz)
290
- t->bus_freq_hz = max(t->bus_freq_hz, acpi_speed);
291
- else
292
- t->bus_freq_hz = 400000;
247
+ if (pdev->dev.of_node)
248
+ dw_i2c_of_configure(pdev);
293249
294250 if (has_acpi_companion(&pdev->dev))
295
- dw_i2c_acpi_configure(pdev);
251
+ i2c_dw_acpi_configure(&pdev->dev);
296252
297
- /*
298
- * Only standard mode at 100kHz, fast mode at 400kHz,
299
- * fast mode plus at 1MHz and high speed mode at 3.4MHz are supported.
300
- */
301
- if (t->bus_freq_hz != 100000 && t->bus_freq_hz != 400000 &&
302
- t->bus_freq_hz != 1000000 && t->bus_freq_hz != 3400000) {
303
- dev_err(&pdev->dev,
304
- "%d Hz is unsupported, only 100kHz, 400kHz, 1MHz and 3.4MHz are supported\n",
305
- t->bus_freq_hz);
306
- ret = -EINVAL;
253
+ ret = i2c_dw_validate_speed(dev);
254
+ if (ret)
307255 goto exit_reset;
308
- }
309256
310257 ret = i2c_dw_probe_lock_support(dev);
311258 if (ret)
312259 goto exit_reset;
313260
314
- if (i2c_detect_slave_mode(&pdev->dev))
315
- i2c_dw_configure_slave(dev);
316
- else
317
- i2c_dw_configure_master(dev);
261
+ i2c_dw_configure(dev);
318262
319
- dev->clk = devm_clk_get(&pdev->dev, NULL);
320
- if (!i2c_dw_prepare_clk(dev, true)) {
263
+ /* Optional interface clock */
264
+ dev->pclk = devm_clk_get_optional(&pdev->dev, "pclk");
265
+ if (IS_ERR(dev->pclk)) {
266
+ ret = PTR_ERR(dev->pclk);
267
+ goto exit_reset;
268
+ }
269
+
270
+ dev->clk = devm_clk_get_optional(&pdev->dev, NULL);
271
+ if (IS_ERR(dev->clk)) {
272
+ ret = PTR_ERR(dev->clk);
273
+ goto exit_reset;
274
+ }
275
+
276
+ ret = i2c_dw_prepare_clk(dev, true);
277
+ if (ret)
278
+ goto exit_reset;
279
+
280
+ if (dev->clk) {
321281 u64 clk_khz;
322282
323283 dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
....@@ -325,21 +285,27 @@
325285
326286 if (!dev->sda_hold_time && t->sda_hold_ns)
327287 dev->sda_hold_time =
328
- div_u64(clk_khz * t->sda_hold_ns + 500000, 1000000);
288
+ DIV_S64_ROUND_CLOSEST(clk_khz * t->sda_hold_ns, MICRO);
329289 }
330
-
331
- dw_i2c_set_fifo_size(dev, pdev->id);
332290
333291 adap = &dev->adapter;
334292 adap->owner = THIS_MODULE;
335
- adap->class = I2C_CLASS_DEPRECATED;
293
+ adap->class = dmi_check_system(dw_i2c_hwmon_class_dmi) ?
294
+ I2C_CLASS_HWMON : I2C_CLASS_DEPRECATED;
336295 ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
337296 adap->dev.of_node = pdev->dev.of_node;
297
+ adap->nr = -1;
338298
339
- dev_pm_set_driver_flags(&pdev->dev,
340
- DPM_FLAG_SMART_PREPARE |
341
- DPM_FLAG_SMART_SUSPEND |
342
- DPM_FLAG_LEAVE_SUSPENDED);
299
+ if (dev->flags & ACCESS_NO_IRQ_SUSPEND) {
300
+ dev_pm_set_driver_flags(&pdev->dev,
301
+ DPM_FLAG_SMART_PREPARE |
302
+ DPM_FLAG_MAY_SKIP_RESUME);
303
+ } else {
304
+ dev_pm_set_driver_flags(&pdev->dev,
305
+ DPM_FLAG_SMART_PREPARE |
306
+ DPM_FLAG_SMART_SUSPEND |
307
+ DPM_FLAG_MAY_SKIP_RESUME);
308
+ }
343309
344310 /* The code below assumes runtime PM to be disabled. */
345311 WARN_ON(pm_runtime_enabled(&pdev->dev));
....@@ -348,16 +314,12 @@
348314 pm_runtime_use_autosuspend(&pdev->dev);
349315 pm_runtime_set_active(&pdev->dev);
350316
351
- if (dev->pm_disabled)
317
+ if (dev->shared_with_punit)
352318 pm_runtime_get_noresume(&pdev->dev);
353319
354320 pm_runtime_enable(&pdev->dev);
355321
356
- if (dev->mode == DW_IC_SLAVE)
357
- ret = i2c_dw_probe_slave(dev);
358
- else
359
- ret = i2c_dw_probe(dev);
360
-
322
+ ret = i2c_dw_probe(dev);
361323 if (ret)
362324 goto exit_probe;
363325
....@@ -366,8 +328,7 @@
366328 exit_probe:
367329 dw_i2c_plat_pm_cleanup(dev);
368330 exit_reset:
369
- if (!IS_ERR_OR_NULL(dev->rst))
370
- reset_control_assert(dev->rst);
331
+ reset_control_assert(dev->rst);
371332 return ret;
372333 }
373334
....@@ -385,21 +346,10 @@
385346 pm_runtime_put_sync(&pdev->dev);
386347 dw_i2c_plat_pm_cleanup(dev);
387348
388
- if (!IS_ERR_OR_NULL(dev->rst))
389
- reset_control_assert(dev->rst);
390
-
391
- i2c_dw_remove_lock_support(dev);
349
+ reset_control_assert(dev->rst);
392350
393351 return 0;
394352 }
395
-
396
-#ifdef CONFIG_OF
397
-static const struct of_device_id dw_i2c_of_match[] = {
398
- { .compatible = "snps,designware-i2c", },
399
- {},
400
-};
401
-MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
402
-#endif
403353
404354 #ifdef CONFIG_PM_SLEEP
405355 static int dw_i2c_plat_prepare(struct device *dev)
....@@ -434,7 +384,9 @@
434384 {
435385 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
436386
437
- if (i_dev->pm_disabled)
387
+ i_dev->suspended = true;
388
+
389
+ if (i_dev->shared_with_punit)
438390 return 0;
439391
440392 i_dev->disable(i_dev);
....@@ -447,10 +399,11 @@
447399 {
448400 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
449401
450
- if (!i_dev->pm_disabled)
402
+ if (!i_dev->shared_with_punit)
451403 i2c_dw_prepare_clk(i_dev, true);
452404
453405 i_dev->init(i_dev);
406
+ i_dev->suspended = false;
454407
455408 return 0;
456409 }