hc
2024-10-12 a5969cabbb4660eab42b6ef0412cbbd1200cf14d
kernel/drivers/i2c/busses/i2c-designware-pcidrv.c
....@@ -33,6 +33,7 @@
3333 baytrail,
3434 cherrytrail,
3535 haswell,
36
+ elkhartlake,
3637 };
3738
3839 struct dw_scl_sda_cfg {
....@@ -45,19 +46,11 @@
4546
4647 struct dw_pci_controller {
4748 u32 bus_num;
48
- u32 bus_cfg;
49
- u32 tx_fifo_depth;
50
- u32 rx_fifo_depth;
51
- u32 clk_khz;
52
- u32 functionality;
5349 u32 flags;
5450 struct dw_scl_sda_cfg *scl_sda_cfg;
5551 int (*setup)(struct pci_dev *pdev, struct dw_pci_controller *c);
52
+ u32 (*get_clk_rate_khz)(struct dw_i2c_dev *dev);
5653 };
57
-
58
-#define INTEL_MID_STD_CFG (DW_IC_CON_MASTER | \
59
- DW_IC_CON_SLAVE_DISABLE | \
60
- DW_IC_CON_RESTART_EN)
6154
6255 /* Merrifield HCNT/LCNT/SDA hold time */
6356 static struct dw_scl_sda_cfg mrfld_config = {
....@@ -85,13 +78,19 @@
8578 .sda_hold = 0x9,
8679 };
8780
81
+static u32 mfld_get_clk_rate_khz(struct dw_i2c_dev *dev)
82
+{
83
+ return 25000;
84
+}
85
+
8886 static int mfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c)
8987 {
88
+ struct dw_i2c_dev *dev = dev_get_drvdata(&pdev->dev);
89
+
9090 switch (pdev->device) {
9191 case 0x0817:
92
- c->bus_cfg &= ~DW_IC_CON_SPEED_MASK;
93
- c->bus_cfg |= DW_IC_CON_SPEED_STD;
94
- /* fall through */
92
+ dev->timings.bus_freq_hz = I2C_MAX_STANDARD_MODE_FREQ;
93
+ fallthrough;
9594 case 0x0818:
9695 case 0x0819:
9796 c->bus_num = pdev->device - 0x817 + 3;
....@@ -108,7 +107,7 @@
108107 static int mrfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c)
109108 {
110109 /*
111
- * On Intel Merrifield the user visible i2c busses are enumerated
110
+ * On Intel Merrifield the user visible i2c buses are enumerated
112111 * [1..7]. So, we add 1 to shift the default range. Besides that the
113112 * first PCI slot provides 4 functions, that's why we have to add 0 to
114113 * the first slot and 4 to the next one.
....@@ -124,58 +123,46 @@
124123 return -ENODEV;
125124 }
126125
126
+static u32 ehl_get_clk_rate_khz(struct dw_i2c_dev *dev)
127
+{
128
+ return 100000;
129
+}
130
+
127131 static struct dw_pci_controller dw_pci_controllers[] = {
128132 [medfield] = {
129133 .bus_num = -1,
130
- .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
131
- .tx_fifo_depth = 32,
132
- .rx_fifo_depth = 32,
133
- .functionality = I2C_FUNC_10BIT_ADDR,
134
- .clk_khz = 25000,
135134 .setup = mfld_setup,
135
+ .get_clk_rate_khz = mfld_get_clk_rate_khz,
136136 },
137137 [merrifield] = {
138138 .bus_num = -1,
139
- .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
140
- .tx_fifo_depth = 64,
141
- .rx_fifo_depth = 64,
142
- .functionality = I2C_FUNC_10BIT_ADDR,
143139 .scl_sda_cfg = &mrfld_config,
144140 .setup = mrfld_setup,
145141 },
146142 [baytrail] = {
147143 .bus_num = -1,
148
- .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
149
- .tx_fifo_depth = 32,
150
- .rx_fifo_depth = 32,
151
- .functionality = I2C_FUNC_10BIT_ADDR,
152144 .scl_sda_cfg = &byt_config,
153145 },
154146 [haswell] = {
155147 .bus_num = -1,
156
- .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
157
- .tx_fifo_depth = 32,
158
- .rx_fifo_depth = 32,
159
- .functionality = I2C_FUNC_10BIT_ADDR,
160148 .scl_sda_cfg = &hsw_config,
161149 },
162150 [cherrytrail] = {
163151 .bus_num = -1,
164
- .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
165
- .tx_fifo_depth = 32,
166
- .rx_fifo_depth = 32,
167
- .functionality = I2C_FUNC_10BIT_ADDR,
168
- .flags = MODEL_CHERRYTRAIL,
169152 .scl_sda_cfg = &byt_config,
153
+ },
154
+ [elkhartlake] = {
155
+ .bus_num = -1,
156
+ .get_clk_rate_khz = ehl_get_clk_rate_khz,
170157 },
171158 };
172159
173160 #ifdef CONFIG_PM
174161 static int i2c_dw_pci_suspend(struct device *dev)
175162 {
176
- struct pci_dev *pdev = to_pci_dev(dev);
177
- struct dw_i2c_dev *i_dev = pci_get_drvdata(pdev);
163
+ struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
178164
165
+ i_dev->suspended = true;
179166 i_dev->disable(i_dev);
180167
181168 return 0;
....@@ -183,20 +170,18 @@
183170
184171 static int i2c_dw_pci_resume(struct device *dev)
185172 {
186
- struct pci_dev *pdev = to_pci_dev(dev);
187
- struct dw_i2c_dev *i_dev = pci_get_drvdata(pdev);
173
+ struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
174
+ int ret;
188175
189
- return i_dev->init(i_dev);
176
+ ret = i_dev->init(i_dev);
177
+ i_dev->suspended = false;
178
+
179
+ return ret;
190180 }
191181 #endif
192182
193183 static UNIVERSAL_DEV_PM_OPS(i2c_dw_pm_ops, i2c_dw_pci_suspend,
194184 i2c_dw_pci_resume, NULL);
195
-
196
-static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
197
-{
198
- return dev->controller->clk_khz;
199
-}
200185
201186 static int i2c_dw_pci_probe(struct pci_dev *pdev,
202187 const struct pci_device_id *id)
....@@ -222,6 +207,8 @@
222207 return r;
223208 }
224209
210
+ pci_set_master(pdev);
211
+
225212 r = pcim_iomap_regions(pdev, 1 << 0, pci_name(pdev));
226213 if (r) {
227214 dev_err(&pdev->dev, "I/O memory remapping failed\n");
....@@ -232,24 +219,40 @@
232219 if (!dev)
233220 return -ENOMEM;
234221
235
- dev->clk = NULL;
236
- dev->controller = controller;
237
- dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
222
+ r = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
223
+ if (r < 0)
224
+ return r;
225
+
226
+ dev->get_clk_rate_khz = controller->get_clk_rate_khz;
227
+ dev->timings.bus_freq_hz = I2C_MAX_FAST_MODE_FREQ;
238228 dev->base = pcim_iomap_table(pdev)[0];
239229 dev->dev = &pdev->dev;
240
- dev->irq = pdev->irq;
230
+ dev->irq = pci_irq_vector(pdev, 0);
241231 dev->flags |= controller->flags;
232
+
233
+ pci_set_drvdata(pdev, dev);
242234
243235 if (controller->setup) {
244236 r = controller->setup(pdev, controller);
245
- if (r)
237
+ if (r) {
238
+ pci_free_irq_vectors(pdev);
246239 return r;
240
+ }
247241 }
248242
249
- dev->functionality = controller->functionality |
250
- DW_IC_DEFAULT_FUNCTIONALITY;
243
+ i2c_dw_adjust_bus_speed(dev);
251244
252
- dev->master_cfg = controller->bus_cfg;
245
+ if (has_acpi_companion(&pdev->dev))
246
+ i2c_dw_acpi_configure(&pdev->dev);
247
+
248
+ r = i2c_dw_validate_speed(dev);
249
+ if (r) {
250
+ pci_free_irq_vectors(pdev);
251
+ return r;
252
+ }
253
+
254
+ i2c_dw_configure(dev);
255
+
253256 if (controller->scl_sda_cfg) {
254257 cfg = controller->scl_sda_cfg;
255258 dev->ss_hcnt = cfg->ss_hcnt;
....@@ -259,11 +262,6 @@
259262 dev->sda_hold_time = cfg->sda_hold;
260263 }
261264
262
- pci_set_drvdata(pdev, dev);
263
-
264
- dev->tx_fifo_depth = controller->tx_fifo_depth;
265
- dev->rx_fifo_depth = controller->rx_fifo_depth;
266
-
267265 adap = &dev->adapter;
268266 adap->owner = THIS_MODULE;
269267 adap->class = 0;
....@@ -271,8 +269,10 @@
271269 adap->nr = controller->bus_num;
272270
273271 r = i2c_dw_probe(dev);
274
- if (r)
272
+ if (r) {
273
+ pci_free_irq_vectors(pdev);
275274 return r;
275
+ }
276276
277277 pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
278278 pm_runtime_use_autosuspend(&pdev->dev);
....@@ -291,6 +291,8 @@
291291 pm_runtime_get_noresume(&pdev->dev);
292292
293293 i2c_del_adapter(&dev->adapter);
294
+ devm_free_irq(&pdev->dev, dev->irq, dev);
295
+ pci_free_irq_vectors(pdev);
294296 }
295297
296298 /* work with hotplug and coldplug */
....@@ -326,6 +328,15 @@
326328 { PCI_VDEVICE(INTEL, 0x22C5), cherrytrail },
327329 { PCI_VDEVICE(INTEL, 0x22C6), cherrytrail },
328330 { PCI_VDEVICE(INTEL, 0x22C7), cherrytrail },
331
+ /* Elkhart Lake (PSE I2C) */
332
+ { PCI_VDEVICE(INTEL, 0x4bb9), elkhartlake },
333
+ { PCI_VDEVICE(INTEL, 0x4bba), elkhartlake },
334
+ { PCI_VDEVICE(INTEL, 0x4bbb), elkhartlake },
335
+ { PCI_VDEVICE(INTEL, 0x4bbc), elkhartlake },
336
+ { PCI_VDEVICE(INTEL, 0x4bbd), elkhartlake },
337
+ { PCI_VDEVICE(INTEL, 0x4bbe), elkhartlake },
338
+ { PCI_VDEVICE(INTEL, 0x4bbf), elkhartlake },
339
+ { PCI_VDEVICE(INTEL, 0x4bc0), elkhartlake },
329340 { 0,}
330341 };
331342 MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids);