修改led为gpio

hc

2024-10-12 a5969cabbb4660eab42b6ef0412cbbd1200cf14d

 kernel/drivers/clk/sunxi-ng/ccu-sun6i-a31.c
..
..
@@ -1,21 +1,14 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
1
2
 /*
2
3
  * Copyright (c) 2016 Chen-Yu Tsai
3
4
  *
4
5
  * Chen-Yu Tsai <wens@csie.org>
5
6
  *
6
7
  * Based on ccu-sun8i-h3.c by Maxime Ripard.
7
- *
8
- * This software is licensed under the terms of the GNU General Public
9
- * License version 2, as published by the Free Software Foundation, and
10
- * may be copied, distributed, and modified under those terms.
11
- *
12
- * This program is distributed in the hope that it will be useful,
13
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
14
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15
- * GNU General Public License for more details.
16
8
  */
17
9
 
18
10
 #include <linux/clk-provider.h>
11
+#include <linux/io.h>
19
12
 #include <linux/of_address.h>
20
13
 
21
14
 #include "ccu_common.h"
..
..
@@ -962,21 +955,32 @@
962
955
 	&out_c_clk.common,
963
956
 };
964
957
 
958
+static const struct clk_hw *clk_parent_pll_audio[] = {
959
+	&pll_audio_base_clk.common.hw
960
+};
961
+
965
962
 /* We hardcode the divider to 1 for now */
966
-static CLK_FIXED_FACTOR(pll_audio_clk, "pll-audio",
967
-			"pll-audio-base", 1, 1, CLK_SET_RATE_PARENT);
968
-static CLK_FIXED_FACTOR(pll_audio_2x_clk, "pll-audio-2x",
969
-			"pll-audio-base", 2, 1, CLK_SET_RATE_PARENT);
970
-static CLK_FIXED_FACTOR(pll_audio_4x_clk, "pll-audio-4x",
971
-			"pll-audio-base", 1, 1, CLK_SET_RATE_PARENT);
972
-static CLK_FIXED_FACTOR(pll_audio_8x_clk, "pll-audio-8x",
973
-			"pll-audio-base", 1, 2, CLK_SET_RATE_PARENT);
974
-static CLK_FIXED_FACTOR(pll_periph_2x_clk, "pll-periph-2x",
975
-			"pll-periph", 1, 2, 0);
976
-static CLK_FIXED_FACTOR(pll_video0_2x_clk, "pll-video0-2x",
977
-			"pll-video0", 1, 2, CLK_SET_RATE_PARENT);
978
-static CLK_FIXED_FACTOR(pll_video1_2x_clk, "pll-video1-2x",
979
-			"pll-video1", 1, 2, CLK_SET_RATE_PARENT);
963
+static CLK_FIXED_FACTOR_HWS(pll_audio_clk, "pll-audio",
964
+			    clk_parent_pll_audio,
965
+			    1, 1, CLK_SET_RATE_PARENT);
966
+static CLK_FIXED_FACTOR_HWS(pll_audio_2x_clk, "pll-audio-2x",
967
+			    clk_parent_pll_audio,
968
+			    2, 1, CLK_SET_RATE_PARENT);
969
+static CLK_FIXED_FACTOR_HWS(pll_audio_4x_clk, "pll-audio-4x",
970
+			    clk_parent_pll_audio,
971
+			    1, 1, CLK_SET_RATE_PARENT);
972
+static CLK_FIXED_FACTOR_HWS(pll_audio_8x_clk, "pll-audio-8x",
973
+			    clk_parent_pll_audio,
974
+			    1, 2, CLK_SET_RATE_PARENT);
975
+static CLK_FIXED_FACTOR_HW(pll_periph_2x_clk, "pll-periph-2x",
976
+			   &pll_periph_clk.common.hw,
977
+			   1, 2, 0);
978
+static CLK_FIXED_FACTOR_HW(pll_video0_2x_clk, "pll-video0-2x",
979
+			   &pll_video0_clk.common.hw,
980
+			   1, 2, CLK_SET_RATE_PARENT);
981
+static CLK_FIXED_FACTOR_HW(pll_video1_2x_clk, "pll-video1-2x",
982
+			   &pll_video1_clk.common.hw,
983
+			   1, 2, CLK_SET_RATE_PARENT);
980
984
 
981
985
 static struct clk_hw_onecell_data sun6i_a31_hw_clks = {
982
986
 	.hws	= {