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| 1 | +/* SPDX-License-Identifier: GPL-2.0 */ |
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| 1 | 2 | /* |
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| 2 | 3 | * R-Car Gen2 Clock Pulse Generator |
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| 3 | 4 | * |
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| 4 | 5 | * Copyright (C) 2016 Cogent Embedded Inc. |
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| 5 | | - * |
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| 6 | | - * This program is free software; you can redistribute it and/or modify it |
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| 7 | | - * under the terms of the GNU General Public License version 2 as published |
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| 8 | | - * by the Free Software Foundation; version 2 of the License. |
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| 9 | 6 | */ |
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| 10 | 7 | |
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| 11 | 8 | #ifndef __CLK_RENESAS_RCAR_GEN2_CPG_H__ |
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| .. | .. |
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| 27 | 24 | }; |
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| 28 | 25 | |
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| 29 | 26 | struct rcar_gen2_cpg_pll_config { |
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| 30 | | - unsigned int extal_div; |
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| 31 | | - unsigned int pll1_mult; |
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| 32 | | - unsigned int pll3_mult; |
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| 33 | | - unsigned int pll0_mult; /* leave as zero if PLL0CR exists */ |
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| 27 | + u8 extal_div; |
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| 28 | + u8 pll1_mult; |
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| 29 | + u8 pll3_mult; |
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| 30 | + u8 pll0_mult; /* leave as zero if PLL0CR exists */ |
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| 34 | 31 | }; |
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| 35 | 32 | |
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| 36 | 33 | struct clk *rcar_gen2_cpg_clk_register(struct device *dev, |
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