修改led为gpio

hc

2024-10-12 a5969cabbb4660eab42b6ef0412cbbd1200cf14d

 kernel/drivers/clk/renesas/clk-div6.c
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..
@@ -1,13 +1,10 @@
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+// SPDX-License-Identifier: GPL-2.0
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 /*
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  * r8a7790 Common Clock Framework support
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  *
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  * Copyright (C) 2013  Renesas Solutions Corp.
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  *
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  * Contact: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License as published by
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- * the Free Software Foundation; version 2 of the License.
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  */
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 #include <linux/clk-provider.h>
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..
@@ -33,8 +30,8 @@
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  * @div: divisor value (1-64)
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  * @src_shift: Shift to access the register bits to select the parent clock
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  * @src_width: Number of register bits to select the parent clock (may be 0)
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- * @parents: Array to map from valid parent clocks indices to hardware indices
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  * @nb: Notifier block to save/restore clock state for system resume
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+ * @parents: Array to map from valid parent clocks indices to hardware indices
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  */
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 struct div6_clock {
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 	struct clk_hw hw;
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@@ -42,8 +39,8 @@
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 	unsigned int div;
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 	u32 src_shift;
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 	u32 src_width;
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-	u8 *parents;
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 	struct notifier_block nb;
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+	u8 parents[];
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 };
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45
 
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 #define to_div6_clock(_hw) container_of(_hw, struct div6_clock, hw)
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@@ -219,21 +216,14 @@
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 				      struct raw_notifier_head *notifiers)
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 {
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 	unsigned int valid_parents;
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-	struct clk_init_data init = {};
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+	struct clk_init_data init;
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 	struct div6_clock *clock;
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 	struct clk *clk;
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 	unsigned int i;
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-	clock = kzalloc(sizeof(*clock), GFP_KERNEL);
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+	clock = kzalloc(struct_size(clock, parents, num_parents), GFP_KERNEL);
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 	if (!clock)
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 		return ERR_PTR(-ENOMEM);
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-
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-	clock->parents = kmalloc_array(num_parents, sizeof(*clock->parents),
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-				       GFP_KERNEL);
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-	if (!clock->parents) {
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-		clk = ERR_PTR(-ENOMEM);
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-		goto free_clock;
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-	}
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 	clock->reg = reg;
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@@ -262,7 +252,7 @@
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 		pr_err("%s: invalid number of parents for DIV6 clock %s\n",
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 		       __func__, name);
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 		clk = ERR_PTR(-EINVAL);
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-		goto free_parents;
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+		goto free_clock;
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 	}
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 	/* Filter out invalid parents */
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@@ -277,7 +267,7 @@
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 	/* Register the clock. */
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 	init.name = name;
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 	init.ops = &cpg_div6_clock_ops;
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-	init.flags = CLK_IS_BASIC;
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+	init.flags = 0;
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 	init.parent_names = parent_names;
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 	init.num_parents = valid_parents;
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@@ -285,7 +275,7 @@
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 	clk = clk_register(NULL, &clock->hw);
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 	if (IS_ERR(clk))
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-		goto free_parents;
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+		goto free_clock;
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 	if (notifiers) {
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 		clock->nb.notifier_call = cpg_div6_clock_notifier_call;
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@@ -294,8 +284,6 @@
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 	return clk;
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-free_parents:
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-	kfree(clock->parents);
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 free_clock:
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 	kfree(clock);
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 	return clk;
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@@ -312,8 +300,8 @@
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 	num_parents = of_clk_get_parent_count(np);
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 	if (num_parents < 1) {
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-		pr_err("%s: no parent found for %s DIV6 clock\n",
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-		       __func__, np->name);
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+		pr_err("%s: no parent found for %pOFn DIV6 clock\n",
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+		       __func__, np);
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 		return;
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 	}
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@@ -324,8 +312,8 @@
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 	reg = of_iomap(np, 0);
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 	if (reg == NULL) {
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-		pr_err("%s: failed to map %s DIV6 clock register\n",
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-		       __func__, np->name);
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+		pr_err("%s: failed to map %pOFn DIV6 clock register\n",
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+		       __func__, np);
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 		goto error;
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 	}
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..
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@@ -337,8 +325,8 @@
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 	clk = cpg_div6_register(clk_name, num_parents, parent_names, reg, NULL);
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 	if (IS_ERR(clk)) {
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-		pr_err("%s: failed to register %s DIV6 clock (%ld)\n",
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-		       __func__, np->name, PTR_ERR(clk));
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+		pr_err("%s: failed to register %pOFn DIV6 clock (%ld)\n",
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+		       __func__, np, PTR_ERR(clk));
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 		goto error;
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 	}
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