hc
2024-10-12 a5969cabbb4660eab42b6ef0412cbbd1200cf14d
kernel/arch/x86/include/asm/tlb.h
....@@ -6,23 +6,31 @@
66 #define tlb_end_vma(tlb, vma) do { } while (0)
77 #define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
88
9
-#define tlb_flush(tlb) \
10
-{ \
11
- if (!tlb->fullmm && !tlb->need_flush_all) \
12
- flush_tlb_mm_range(tlb->mm, tlb->start, tlb->end, 0UL); \
13
- else \
14
- flush_tlb_mm_range(tlb->mm, 0UL, TLB_FLUSH_ALL, 0UL); \
15
-}
9
+#define tlb_flush tlb_flush
10
+static inline void tlb_flush(struct mmu_gather *tlb);
1611
1712 #include <asm-generic/tlb.h>
13
+
14
+static inline void tlb_flush(struct mmu_gather *tlb)
15
+{
16
+ unsigned long start = 0UL, end = TLB_FLUSH_ALL;
17
+ unsigned int stride_shift = tlb_get_unmap_shift(tlb);
18
+
19
+ if (!tlb->fullmm && !tlb->need_flush_all) {
20
+ start = tlb->start;
21
+ end = tlb->end;
22
+ }
23
+
24
+ flush_tlb_mm_range(tlb->mm, start, end, stride_shift, tlb->freed_tables);
25
+}
1826
1927 /*
2028 * While x86 architecture in general requires an IPI to perform TLB
2129 * shootdown, enablement code for several hypervisors overrides
2230 * .flush_tlb_others hook in pv_mmu_ops and implements it by issuing
2331 * a hypercall. To keep software pagetable walkers safe in this case we
24
- * switch to RCU based table free (HAVE_RCU_TABLE_FREE). See the comment
25
- * below 'ifdef CONFIG_HAVE_RCU_TABLE_FREE' in include/asm-generic/tlb.h
32
+ * switch to RCU based table free (MMU_GATHER_RCU_TABLE_FREE). See the comment
33
+ * below 'ifdef CONFIG_MMU_GATHER_RCU_TABLE_FREE' in include/asm-generic/tlb.h
2634 * for more details.
2735 */
2836 static inline void __tlb_remove_table(void *table)