hc
2024-10-12 a5969cabbb4660eab42b6ef0412cbbd1200cf14d
kernel/arch/sh/drivers/dma/dma-sh.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0
12 /*
23 * arch/sh/drivers/dma/dma-sh.c
34 *
....@@ -6,10 +7,6 @@
67 * Copyright (C) 2000 Takashi YOSHII
78 * Copyright (C) 2003, 2004 Paul Mundt
89 * Copyright (C) 2005 Andriy Skulysh
9
- *
10
- * This file is subject to the terms and conditions of the GNU General Public
11
- * License. See the file "COPYING" in the main directory of this archive
12
- * for more details.
1310 */
1411 #include <linux/init.h>
1512 #include <linux/interrupt.h>
....@@ -22,6 +19,18 @@
2219 #include <cpu/dma.h>
2320
2421 /*
22
+ * Some of the SoCs feature two DMAC modules. In such a case, the channels are
23
+ * distributed equally among them.
24
+ */
25
+#ifdef SH_DMAC_BASE1
26
+#define SH_DMAC_NR_MD_CH (CONFIG_NR_ONCHIP_DMA_CHANNELS / 2)
27
+#else
28
+#define SH_DMAC_NR_MD_CH CONFIG_NR_ONCHIP_DMA_CHANNELS
29
+#endif
30
+
31
+#define SH_DMAC_CH_SZ 0x10
32
+
33
+/*
2534 * Define the default configuration for dual address memory-memory transfer.
2635 * The 0x400 value represents auto-request, external->external.
2736 */
....@@ -32,7 +41,7 @@
3241 unsigned long base = SH_DMAC_BASE0;
3342
3443 #ifdef SH_DMAC_BASE1
35
- if (chan >= 6)
44
+ if (chan >= SH_DMAC_NR_MD_CH)
3645 base = SH_DMAC_BASE1;
3746 #endif
3847
....@@ -43,13 +52,13 @@
4352 {
4453 unsigned long base = dma_find_base(chan);
4554
46
- /* Normalize offset calculation */
47
- if (chan >= 9)
48
- chan -= 6;
49
- if (chan >= 4)
50
- base += 0x10;
55
+ chan = (chan % SH_DMAC_NR_MD_CH) * SH_DMAC_CH_SZ;
5156
52
- return base + (chan * 0x10);
57
+ /* DMAOR is placed inside the channel register space. Step over it. */
58
+ if (chan >= DMAOR)
59
+ base += SH_DMAC_CH_SZ;
60
+
61
+ return base + chan;
5362 }
5463
5564 #ifdef CONFIG_SH_DMA_IRQ_MULTI
....@@ -253,12 +262,11 @@
253262 #define NR_DMAOR 1
254263 #endif
255264
256
-/*
257
- * DMAOR bases are broken out amongst channel groups. DMAOR0 manages
258
- * channels 0 - 5, DMAOR1 6 - 11 (optional).
259
- */
260
-#define dmaor_read_reg(n) __raw_readw(dma_find_base((n)*6))
261
-#define dmaor_write_reg(n, data) __raw_writew(data, dma_find_base(n)*6)
265
+#define dmaor_read_reg(n) __raw_readw(dma_find_base((n) * \
266
+ SH_DMAC_NR_MD_CH) + DMAOR)
267
+#define dmaor_write_reg(n, data) __raw_writew(data, \
268
+ dma_find_base((n) * \
269
+ SH_DMAC_NR_MD_CH) + DMAOR)
262270
263271 static inline int dmaor_reset(int no)
264272 {
....@@ -414,4 +422,4 @@
414422
415423 MODULE_AUTHOR("Takashi YOSHII, Paul Mundt, Andriy Skulysh");
416424 MODULE_DESCRIPTION("SuperH On-Chip DMAC Support");
417
-MODULE_LICENSE("GPL");
425
+MODULE_LICENSE("GPL v2");