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| 19 | 19 | #include <asm/barrier.h> |
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| 20 | 20 | |
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| 21 | 21 | |
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| 22 | | -#define ATOMIC_INIT(i) { (i) } |
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| 23 | 22 | #define ATOMIC64_INIT(i) { (i) } |
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| 24 | 23 | |
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| 25 | 24 | #define atomic_read(v) READ_ONCE((v)->counter) |
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| 124 | 123 | #undef ATOMIC_OP |
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| 125 | 124 | |
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| 126 | 125 | #define ATOMIC64_OP(op, c_op) \ |
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| 127 | | -static __inline__ long \ |
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| 128 | | -ia64_atomic64_##op (__s64 i, atomic64_t *v) \ |
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| 126 | +static __inline__ s64 \ |
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| 127 | +ia64_atomic64_##op (s64 i, atomic64_t *v) \ |
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| 129 | 128 | { \ |
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| 130 | | - __s64 old, new; \ |
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| 129 | + s64 old, new; \ |
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| 131 | 130 | CMPXCHG_BUGCHECK_DECL \ |
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| 132 | 131 | \ |
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| 133 | 132 | do { \ |
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| .. | .. |
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| 139 | 138 | } |
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| 140 | 139 | |
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| 141 | 140 | #define ATOMIC64_FETCH_OP(op, c_op) \ |
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| 142 | | -static __inline__ long \ |
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| 143 | | -ia64_atomic64_fetch_##op (__s64 i, atomic64_t *v) \ |
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| 141 | +static __inline__ s64 \ |
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| 142 | +ia64_atomic64_fetch_##op (s64 i, atomic64_t *v) \ |
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| 144 | 143 | { \ |
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| 145 | | - __s64 old, new; \ |
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| 144 | + s64 old, new; \ |
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| 146 | 145 | CMPXCHG_BUGCHECK_DECL \ |
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| 147 | 146 | \ |
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| 148 | 147 | do { \ |
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| .. | .. |
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| 162 | 161 | |
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| 163 | 162 | #define atomic64_add_return(i,v) \ |
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| 164 | 163 | ({ \ |
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| 165 | | - long __ia64_aar_i = (i); \ |
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| 164 | + s64 __ia64_aar_i = (i); \ |
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| 166 | 165 | __ia64_atomic_const(i) \ |
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| 167 | 166 | ? ia64_fetch_and_add(__ia64_aar_i, &(v)->counter) \ |
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| 168 | 167 | : ia64_atomic64_add(__ia64_aar_i, v); \ |
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| 170 | 169 | |
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| 171 | 170 | #define atomic64_sub_return(i,v) \ |
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| 172 | 171 | ({ \ |
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| 173 | | - long __ia64_asr_i = (i); \ |
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| 172 | + s64 __ia64_asr_i = (i); \ |
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| 174 | 173 | __ia64_atomic_const(i) \ |
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| 175 | 174 | ? ia64_fetch_and_add(-__ia64_asr_i, &(v)->counter) \ |
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| 176 | 175 | : ia64_atomic64_sub(__ia64_asr_i, v); \ |
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| 178 | 177 | |
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| 179 | 178 | #define atomic64_fetch_add(i,v) \ |
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| 180 | 179 | ({ \ |
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| 181 | | - long __ia64_aar_i = (i); \ |
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| 180 | + s64 __ia64_aar_i = (i); \ |
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| 182 | 181 | __ia64_atomic_const(i) \ |
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| 183 | 182 | ? ia64_fetchadd(__ia64_aar_i, &(v)->counter, acq) \ |
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| 184 | 183 | : ia64_atomic64_fetch_add(__ia64_aar_i, v); \ |
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| .. | .. |
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| 186 | 185 | |
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| 187 | 186 | #define atomic64_fetch_sub(i,v) \ |
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| 188 | 187 | ({ \ |
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| 189 | | - long __ia64_asr_i = (i); \ |
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| 188 | + s64 __ia64_asr_i = (i); \ |
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| 190 | 189 | __ia64_atomic_const(i) \ |
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| 191 | 190 | ? ia64_fetchadd(-__ia64_asr_i, &(v)->counter, acq) \ |
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| 192 | 191 | : ia64_atomic64_fetch_sub(__ia64_asr_i, v); \ |
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