修改led为gpio

hc

2024-10-12 a5969cabbb4660eab42b6ef0412cbbd1200cf14d

 kernel/arch/arm64/include/asm/ptrace.h
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@@ -1,29 +1,59 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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 /*
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  * Based on arch/arm/include/asm/ptrace.h
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  *
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  * Copyright (C) 1996-2003 Russell King
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  * Copyright (C) 2012 ARM Ltd.
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- * GNU General Public License for more details.
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- *
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- * You should have received a copy of the GNU General Public License
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- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
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  */
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 #ifndef __ASM_PTRACE_H
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 #define __ASM_PTRACE_H
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+
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+#include <asm/cpufeature.h>
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12
 
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 #include <uapi/asm/ptrace.h>
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 /* Current Exception Level values, as contained in CurrentEL */
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 #define CurrentEL_EL1		(1 << 2)
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 #define CurrentEL_EL2		(2 << 2)
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+
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+#define INIT_PSTATE_EL1 \
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+	(PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT | PSR_MODE_EL1h)
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+#define INIT_PSTATE_EL2 \
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+	(PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT | PSR_MODE_EL2h)
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+
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+/*
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+ * PMR values used to mask/unmask interrupts.
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+ *
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+ * GIC priority masking works as follows: if an IRQ's priority is a higher value
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+ * than the value held in PMR, that IRQ is masked. Lowering the value of PMR
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+ * means masking more IRQs (or at least that the same IRQs remain masked).
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+ *
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+ * To mask interrupts, we clear the most significant bit of PMR.
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+ *
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+ * Some code sections either automatically switch back to PSR.I or explicitly
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+ * require to not use priority masking. If bit GIC_PRIO_PSR_I_SET is included
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+ * in the priority mask, it indicates that PSR.I should be set and
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+ * interrupt disabling temporarily does not rely on IRQ priorities.
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+ */
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+#define GIC_PRIO_IRQON			0xe0
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+#define __GIC_PRIO_IRQOFF		(GIC_PRIO_IRQON & ~0x80)
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+#define __GIC_PRIO_IRQOFF_NS		0xa0
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+#define GIC_PRIO_PSR_I_SET		(1 << 4)
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+
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+#define GIC_PRIO_IRQOFF							\
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+	({								\
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+		extern struct static_key_false gic_nonsecure_priorities;\
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+		u8 __prio = __GIC_PRIO_IRQOFF;				\
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+									\
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+		if (static_branch_unlikely(&gic_nonsecure_priorities))	\
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+			__prio = __GIC_PRIO_IRQOFF_NS;			\
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+									\
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+		__prio;							\
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+	})
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+
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+/* Additional SPSR bits not exposed in the UABI */
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+#define PSR_MODE_THREAD_BIT	(1 << 0)
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+#define PSR_IL_BIT		(1 << 20)
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 /* AArch32-specific ptrace requests */
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 #define COMPAT_PTRACE_GETREGS		12
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@@ -165,8 +195,13 @@
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 #endif
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 	u64 orig_addr_limit;
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-	u64 unused;	// maintain 16 byte alignment
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+	/* Only valid when ARM64_HAS_IRQ_PRIO_MASKING is enabled. */
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+	u64 pmr_save;
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 	u64 stackframe[2];
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+
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+	/* Only valid for some EL1 exceptions. */
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+	u64 lockdep_hardirqs;
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+	u64 exit_rcu;
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 };
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 static inline bool in_syscall(struct pt_regs const *regs)
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@@ -200,17 +235,23 @@
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 #define processor_mode(regs) \
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 	((regs)->pstate & PSR_MODE_MASK)
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-#define interrupts_enabled(regs) \
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-	(!((regs)->pstate & PSR_I_BIT))
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+#define irqs_priority_unmasked(regs)					\
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+	(system_uses_irq_prio_masking() ?				\
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+		(regs)->pmr_save == GIC_PRIO_IRQON :			\
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+		true)
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+
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+#define interrupts_enabled(regs)			\
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+	(!((regs)->pstate & PSR_I_BIT) && irqs_priority_unmasked(regs))
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 #define fast_interrupts_enabled(regs) \
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 	(!((regs)->pstate & PSR_F_BIT))
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-#define GET_USP(regs) \
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-	(!compat_user_mode(regs) ? (regs)->sp : (regs)->compat_sp)
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-
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-#define SET_USP(ptregs, value) \
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-	(!compat_user_mode(regs) ? ((regs)->sp = value) : ((regs)->compat_sp = value))
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+static inline unsigned long user_stack_pointer(struct pt_regs *regs)
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+{
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+	if (compat_user_mode(regs))
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+		return regs->compat_sp;
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+	return regs->sp;
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+}
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 extern int regs_query_register_offset(const char *name);
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 extern unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,
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@@ -280,20 +321,64 @@
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 static inline unsigned long regs_return_value(struct pt_regs *regs)
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 {
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-	return regs->regs[0];
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+	unsigned long val = regs->regs[0];
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+
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+	/*
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+	 * Audit currently uses regs_return_value() instead of
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+	 * syscall_get_return_value(). Apply the same sign-extension here until
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+	 * audit is updated to use syscall_get_return_value().
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+	 */
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+	if (compat_user_mode(regs))
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+		val = sign_extend64(val, 31);
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+
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+	return val;
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+}
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+
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+static inline void regs_set_return_value(struct pt_regs *regs, unsigned long rc)
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+{
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+	regs->regs[0] = rc;
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+}
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+
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+/**
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+ * regs_get_kernel_argument() - get Nth function argument in kernel
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+ * @regs:	pt_regs of that context
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+ * @n:		function argument number (start from 0)
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+ *
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+ * regs_get_argument() returns @n th argument of the function call.
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+ *
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+ * Note that this chooses the most likely register mapping. In very rare
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+ * cases this may not return correct data, for example, if one of the
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+ * function parameters is 16 bytes or bigger. In such cases, we cannot
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+ * get access the parameter correctly and the register assignment of
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+ * subsequent parameters will be shifted.
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+ */
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+static inline unsigned long regs_get_kernel_argument(struct pt_regs *regs,
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+						     unsigned int n)
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+{
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+#define NR_REG_ARGUMENTS 8
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+	if (n < NR_REG_ARGUMENTS)
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+		return pt_regs_read_reg(regs, n);
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+	return 0;
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 }
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 /* We must avoid circular header include via sched.h */
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 struct task_struct;
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 int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task);
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-#define GET_IP(regs)		((unsigned long)(regs)->pc)
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-#define SET_IP(regs, value)	((regs)->pc = ((u64) (value)))
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+static inline unsigned long instruction_pointer(struct pt_regs *regs)
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+{
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+	return regs->pc;
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+}
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+static inline void instruction_pointer_set(struct pt_regs *regs,
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+		unsigned long val)
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+{
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+	regs->pc = val;
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+}
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-#define GET_FP(ptregs)		((unsigned long)(ptregs)->regs[29])
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-#define SET_FP(ptregs, value)	((ptregs)->regs[29] = ((u64) (value)))
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-
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-#include <asm-generic/ptrace.h>
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+static inline unsigned long frame_pointer(struct pt_regs *regs)
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+{
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+	return regs->regs[29];
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+}
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 #define procedure_link_pointer(regs)	((regs)->regs[30])
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 	procedure_link_pointer(regs) = val;
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 }
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-#undef profile_pc
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 extern unsigned long profile_pc(struct pt_regs *regs);
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 #endif /* __ASSEMBLY__ */