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2024-10-12 a5969cabbb4660eab42b6ef0412cbbd1200cf14d 
 kernel/arch/arm/boot/dts/omap3.dtsi
....@@ -1,13 +1,14 @@
11 /*
22  * Device Tree Source for OMAP3 SoC
33  *
4
- * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
4
+ * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
55  *
66  * This file is licensed under the terms of the GNU General Public License
77  * version 2.  This program is licensed "as is" without any warranty of any
88  * kind, whether express or implied.
99  */
1010 
11
+#include <dt-bindings/bus/ti-sysc.h>
1112 #include <dt-bindings/gpio/gpio.h>
1213 #include <dt-bindings/interrupt-controller/irq.h>
1314 #include <dt-bindings/pinctrl/omap.h>
....@@ -159,13 +160,56 @@
159160 			};
160161 		};
161162 
162
-		aes: aes@480c5000 {
163
-			compatible = "ti,omap3-aes";
164
-			ti,hwmods = "aes";
165
-			reg = <0x480c5000 0x50>;
166
-			interrupts = <0>;
167
-			dmas = <&sdma 65 &sdma 66>;
168
-			dma-names = "tx", "rx";
163
+		aes1_target: target-module@480a6000 {
164
+			compatible = "ti,sysc-omap2", "ti,sysc";
165
+			reg = <0x480a6044 0x4>,
166
+			      <0x480a6048 0x4>,
167
+			      <0x480a604c 0x4>;
168
+			reg-names = "rev", "sysc", "syss";
169
+			ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>;
170
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
171
+					<SYSC_IDLE_NO>,
172
+					<SYSC_IDLE_SMART>;
173
+			ti,syss-mask = <1>;
174
+			clocks = <&aes1_ick>;
175
+			clock-names = "ick";
176
+			#address-cells = <1>;
177
+			#size-cells = <1>;
178
+			ranges = <0 0x480a6000 0x2000>;
179
+
180
+			aes1: aes1@0 {
181
+				compatible = "ti,omap3-aes";
182
+				reg = <0 0x50>;
183
+				interrupts = <0>;
184
+				dmas = <&sdma 9 &sdma 10>;
185
+				dma-names = "tx", "rx";
186
+			};
187
+		};
188
+
189
+		aes2_target: target-module@480c5000 {
190
+			compatible = "ti,sysc-omap2", "ti,sysc";
191
+			reg = <0x480c5044 0x4>,
192
+			      <0x480c5048 0x4>,
193
+			      <0x480c504c 0x4>;
194
+			reg-names = "rev", "sysc", "syss";
195
+			ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>;
196
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
197
+					<SYSC_IDLE_NO>,
198
+					<SYSC_IDLE_SMART>;
199
+			ti,syss-mask = <1>;
200
+			clocks = <&aes2_ick>;
201
+			clock-names = "ick";
202
+			#address-cells = <1>;
203
+			#size-cells = <1>;
204
+			ranges = <0 0x480c5000 0x2000>;
205
+
206
+			aes2: aes2@0 {
207
+				compatible = "ti,omap3-aes";
208
+				reg = <0 0x50>;
209
+				interrupts = <0>;
210
+				dmas = <&sdma 65 &sdma 66>;
211
+				dma-names = "tx", "rx";
212
+			};
169213 		};
170214 
171215 		prm: prm@48306000 {
....@@ -195,10 +239,23 @@
195239 			};
196240 		};
197241 
198
-		counter32k: counter@48320000 {
199
-			compatible = "ti,omap-counter32k";
200
-			reg = <0x48320000 0x20>;
201
-			ti,hwmods = "counter_32k";
242
+		target-module@48320000 {
243
+			compatible = "ti,sysc-omap2", "ti,sysc";
244
+			reg = <0x48320000 0x4>,
245
+			      <0x48320004 0x4>;
246
+			reg-names = "rev", "sysc";
247
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
248
+					<SYSC_IDLE_NO>;
249
+			clocks = <&wkup_32k_fck>, <&omap_32ksync_ick>;
250
+			clock-names = "fck", "ick";
251
+			#address-cells = <1>;
252
+			#size-cells = <1>;
253
+			ranges = <0x0 0x48320000 0x1000>;
254
+
255
+			counter32k: counter@0 {
256
+				compatible = "ti,omap-counter32k";
257
+				reg = <0x0 0x20>;
258
+			};
202259 		};
203260 
204261 		intc: interrupt-controller@48200000 {
....@@ -208,17 +265,41 @@
208265 			reg = <0x48200000 0x1000>;
209266 		};
210267 
211
-		sdma: dma-controller@48056000 {
212
-			compatible = "ti,omap3630-sdma", "ti,omap3430-sdma";
213
-			reg = <0x48056000 0x1000>;
214
-			interrupts = <12>,
215
-				     <13>,
216
-				     <14>,
217
-				     <15>;
218
-			#dma-cells = <1>;
219
-			dma-channels = <32>;
220
-			dma-requests = <96>;
221
-			ti,hwmods = "dma";
268
+		target-module@48056000 {
269
+			compatible = "ti,sysc-omap2", "ti,sysc";
270
+			reg = <0x48056000 0x4>,
271
+			      <0x4805602c 0x4>,
272
+			      <0x48056028 0x4>;
273
+			reg-names = "rev", "sysc", "syss";
274
+			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
275
+					 SYSC_OMAP2_EMUFREE |
276
+					 SYSC_OMAP2_SOFTRESET |
277
+					 SYSC_OMAP2_AUTOIDLE)>;
278
+			ti,sysc-midle = <SYSC_IDLE_FORCE>,
279
+					<SYSC_IDLE_NO>,
280
+					<SYSC_IDLE_SMART>;
281
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
282
+					<SYSC_IDLE_NO>,
283
+					<SYSC_IDLE_SMART>;
284
+			ti,syss-mask = <1>;
285
+			/* Domains (V, P, C): core, core_pwrdm, core_l3_clkdm */
286
+			clocks = <&core_l3_ick>;
287
+			clock-names = "ick";
288
+			#address-cells = <1>;
289
+			#size-cells = <1>;
290
+			ranges = <0 0x48056000 0x1000>;
291
+
292
+			sdma: dma-controller@0 {
293
+				compatible = "ti,omap3430-sdma", "ti,omap-sdma";
294
+				reg = <0x0 0x1000>;
295
+				interrupts = <12>,
296
+					     <13>,
297
+					     <14>,
298
+					     <15>;
299
+				#dma-cells = <1>;
300
+				dma-channels = <32>;
301
+				dma-requests = <96>;
302
+			};
222303 		};
223304 
224305 		gpio1: gpio@48310000 {
....@@ -505,6 +586,30 @@
505586 			status = "disabled";
506587 		};
507588 
589
+		/* Likely needs to be tagged disabled on HS devices */
590
+		rng_target: target-module@480a0000 {
591
+			compatible = "ti,sysc-omap2", "ti,sysc";
592
+			reg = <0x480a003c 0x4>,
593
+			      <0x480a0040 0x4>,
594
+			      <0x480a0044 0x4>;
595
+			reg-names = "rev", "sysc", "syss";
596
+			ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>;
597
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
598
+					<SYSC_IDLE_NO>;
599
+			ti,syss-mask = <1>;
600
+			clocks = <&rng_ick>;
601
+			clock-names = "ick";
602
+			#address-cells = <1>;
603
+			#size-cells = <1>;
604
+			ranges = <0 0x480a0000 0x2000>;
605
+
606
+			rng: rng@0 {
607
+				compatible = "ti,omap2-rng";
608
+				reg = <0x0 0x2000>;
609
+				interrupts = <52>;
610
+			};
611
+		};
612
+
508613 		mcbsp2: mcbsp@49022000 {
509614 			compatible = "ti,omap3-mcbsp";
510615 			reg = <0x49022000 0xff>,
....@@ -591,19 +696,63 @@
591696 			dma-names = "rx";
592697 		};
593698 
594
-		timer1: timer@48318000 {
595
-			compatible = "ti,omap3430-timer";
596
-			reg = <0x48318000 0x400>;
597
-			interrupts = <37>;
598
-			ti,hwmods = "timer1";
599
-			ti,timer-alwon;
699
+		timer1_target: target-module@48318000 {
700
+			compatible = "ti,sysc-omap2-timer", "ti,sysc";
701
+			reg = <0x48318000 0x4>,
702
+			      <0x48318010 0x4>,
703
+			      <0x48318014 0x4>;
704
+			reg-names = "rev", "sysc", "syss";
705
+			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
706
+					 SYSC_OMAP2_EMUFREE |
707
+					 SYSC_OMAP2_ENAWAKEUP |
708
+					 SYSC_OMAP2_SOFTRESET |
709
+					 SYSC_OMAP2_AUTOIDLE)>;
710
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
711
+					<SYSC_IDLE_NO>,
712
+					<SYSC_IDLE_SMART>;
713
+			ti,syss-mask = <1>;
714
+			clocks = <&gpt1_fck>, <&gpt1_ick>;
715
+			clock-names = "fck", "ick";
716
+			#address-cells = <1>;
717
+			#size-cells = <1>;
718
+			ranges = <0x0 0x48318000 0x1000>;
719
+
720
+			timer1: timer@0 {
721
+				compatible = "ti,omap3430-timer";
722
+				reg = <0x0 0x80>;
723
+				clocks = <&gpt1_fck>;
724
+				clock-names = "fck";
725
+				interrupts = <37>;
726
+				ti,timer-alwon;
727
+			};
600728 		};
601729 
602
-		timer2: timer@49032000 {
603
-			compatible = "ti,omap3430-timer";
604
-			reg = <0x49032000 0x400>;
605
-			interrupts = <38>;
606
-			ti,hwmods = "timer2";
730
+		timer2_target: target-module@49032000 {
731
+			compatible = "ti,sysc-omap2-timer", "ti,sysc";
732
+			reg = <0x49032000 0x4>,
733
+			      <0x49032010 0x4>,
734
+			      <0x49032014 0x4>;
735
+			reg-names = "rev", "sysc", "syss";
736
+			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
737
+					 SYSC_OMAP2_EMUFREE |
738
+					 SYSC_OMAP2_ENAWAKEUP |
739
+					 SYSC_OMAP2_SOFTRESET |
740
+					 SYSC_OMAP2_AUTOIDLE)>;
741
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
742
+					<SYSC_IDLE_NO>,
743
+					<SYSC_IDLE_SMART>;
744
+			ti,syss-mask = <1>;
745
+			clocks = <&gpt2_fck>, <&gpt2_ick>;
746
+			clock-names = "fck", "ick";
747
+			#address-cells = <1>;
748
+			#size-cells = <1>;
749
+			ranges = <0x0 0x49032000 0x1000>;
750
+
751
+			timer2: timer@0 {
752
+				compatible = "ti,omap3430-timer";
753
+				reg = <0 0x400>;
754
+				interrupts = <38>;
755
+			};
607756 		};
608757 
609758 		timer3: timer@49034000 {
....@@ -677,13 +826,34 @@
677826 			ti,timer-pwm;
678827 		};
679828 
680
-		timer12: timer@48304000 {
681
-			compatible = "ti,omap3430-timer";
682
-			reg = <0x48304000 0x400>;
683
-			interrupts = <95>;
684
-			ti,hwmods = "timer12";
685
-			ti,timer-alwon;
686
-			ti,timer-secure;
829
+		timer12_target: target-module@48304000 {
830
+			compatible = "ti,sysc-omap2-timer", "ti,sysc";
831
+			reg = <0x48304000 0x4>,
832
+			      <0x48304010 0x4>,
833
+			      <0x48304014 0x4>;
834
+			reg-names = "rev", "sysc", "syss";
835
+			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
836
+					 SYSC_OMAP2_EMUFREE |
837
+					 SYSC_OMAP2_ENAWAKEUP |
838
+					 SYSC_OMAP2_SOFTRESET |
839
+					 SYSC_OMAP2_AUTOIDLE)>;
840
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
841
+					<SYSC_IDLE_NO>,
842
+					<SYSC_IDLE_SMART>;
843
+			ti,syss-mask = <1>;
844
+			clocks = <&gpt12_fck>, <&gpt12_ick>;
845
+			clock-names = "fck", "ick";
846
+			#address-cells = <1>;
847
+			#size-cells = <1>;
848
+			ranges = <0x0 0x48304000 0x1000>;
849
+
850
+			timer12: timer@0 {
851
+				compatible = "ti,omap3430-timer";
852
+				reg = <0 0x400>;
853
+				interrupts = <95>;
854
+				ti,timer-alwon;
855
+				ti,timer-secure;
856
+			};
687857 		};
688858 
689859 		usbhstll: usbhstll@48062000 {
....@@ -774,6 +944,9 @@
774944 				ti,hwmods = "dss_dsi1";
775945 				clocks = <&dss1_alwon_fck>, <&dss2_alwon_fck>;
776946 				clock-names = "fck", "sys_clk";
947
+
948
+				#address-cells = <1>;
949
+				#size-cells = <0>;
777950 			};
778951 
779952 			rfbi: encoder@48050800 {
....@@ -840,4 +1013,14 @@
8401013 	};
8411014 };
8421015 
843
-/include/ "omap3xxx-clocks.dtsi"
1016
+#include "omap3xxx-clocks.dtsi"
1017
+
1018
+/* Preferred always-on timer for clockevent. Some boards must use dmtimer12 */
1019
+&timer1_target {
1020
+	ti,no-reset-on-init;
1021
+	ti,no-idle;
1022
+	timer@0 {
1023
+		assigned-clocks = <&gpt1_fck>;
1024
+		assigned-clock-parents = <&omap_32k_fck>;
1025
+	};
1026
+};