hc
2024-10-12 a5969cabbb4660eab42b6ef0412cbbd1200cf14d
kernel/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt
....@@ -21,10 +21,22 @@
2121
2222 SNOC based devices (i.e. wcn3990) uses compatible string "qcom,wcn3990-wifi".
2323
24
-Optional properties:
2524 - reg: Address and length of the register set for the device.
2625 - reg-names: Must include the list of following reg names,
2726 "membase"
27
+- interrupts: reference to the list of 17 interrupt numbers for "qcom,ipq4019-wifi"
28
+ compatible target.
29
+ reference to the list of 12 interrupt numbers for "qcom,wcn3990-wifi"
30
+ compatible target.
31
+ Must contain interrupt-names property per entry for
32
+ "qcom,ath10k", "qcom,ipq4019-wifi" compatible targets.
33
+
34
+- interrupt-names: Must include the entries for MSI interrupt
35
+ names ("msi0" to "msi15") and legacy interrupt
36
+ name ("legacy") for "qcom,ath10k", "qcom,ipq4019-wifi"
37
+ compatible targets.
38
+
39
+Optional properties:
2840 - resets: Must contain an entry for each entry in reset-names.
2941 See ../reset/reseti.txt for details.
3042 - reset-names: Must include the list of following reset names,
....@@ -37,12 +49,9 @@
3749 - clocks: List of clock specifiers, must contain an entry for each required
3850 entry in clock-names.
3951 - clock-names: Should contain the clock names "wifi_wcss_cmd", "wifi_wcss_ref",
40
- "wifi_wcss_rtc".
41
-- interrupts: List of interrupt lines. Must contain an entry
42
- for each entry in the interrupt-names property.
43
-- interrupt-names: Must include the entries for MSI interrupt
44
- names ("msi0" to "msi15") and legacy interrupt
45
- name ("legacy"),
52
+ "wifi_wcss_rtc" for "qcom,ipq4019-wifi" compatible target and
53
+ "cxo_ref_clk_pin" and optionally "qdss" for "qcom,wcn3990-wifi"
54
+ compatible target.
4655 - qcom,msi_addr: MSI interrupt address.
4756 - qcom,msi_base: Base value to add before writing MSI data into
4857 MSI address register.
....@@ -55,9 +64,51 @@
5564 - qcom,ath10k-pre-calibration-data : pre calibration data as an array,
5665 the length can vary between hw versions.
5766 - <supply-name>-supply: handle to the regulator device tree node
58
- optional "supply-name" is "vdd-0.8-cx-mx".
67
+ optional "supply-name" are "vdd-0.8-cx-mx",
68
+ "vdd-1.8-xo", "vdd-1.3-rfa", "vdd-3.3-ch0",
69
+ and "vdd-3.3-ch1".
70
+- memory-region:
71
+ Usage: optional
72
+ Value type: <phandle>
73
+ Definition: reference to the reserved-memory for the msa region
74
+ used by the wifi firmware running in Q6.
75
+- iommus:
76
+ Usage: optional
77
+ Value type: <prop-encoded-array>
78
+ Definition: A list of phandle and IOMMU specifier pairs.
79
+- ext-fem-name:
80
+ Usage: Optional
81
+ Value type: string
82
+ Definition: Name of external front end module used. Some valid FEM names
83
+ for example: "microsemi-lx5586", "sky85703-11"
84
+ and "sky85803" etc.
85
+- qcom,snoc-host-cap-8bit-quirk:
86
+ Usage: Optional
87
+ Value type: <empty>
88
+ Definition: Quirk specifying that the firmware expects the 8bit version
89
+ of the host capability QMI request
90
+- qcom,xo-cal-data: xo cal offset to be configured in xo trim register.
5991
60
-Example (to supply the calibration data alone):
92
+- qcom,msa-fixed-perm: Boolean context flag to disable SCM call for statically
93
+ mapped msa region.
94
+
95
+- qcom,coexist-support : should contain eithr "0" or "1" to indicate coex
96
+ support by the hardware.
97
+- qcom,coexist-gpio-pin : gpio pin number information to support coex
98
+ which will be used by wifi firmware.
99
+
100
+* Subnodes
101
+The ath10k wifi node can contain one optional firmware subnode.
102
+Firmware subnode is needed when the platform does not have TustZone.
103
+The firmware subnode must have:
104
+
105
+- iommus:
106
+ Usage: required
107
+ Value type: <prop-encoded-array>
108
+ Definition: A list of phandle and IOMMU specifier pairs.
109
+
110
+
111
+Example (to supply PCI based wifi block details):
61112
62113 In this example, the node is defined as child node of the PCI controller.
63114
....@@ -69,10 +120,10 @@
69120 #address-cells = <3>;
70121 device_type = "pci";
71122
72
- ath10k@0,0 {
123
+ wifi@0,0 {
73124 reg = <0 0 0 0 0>;
74
- device_type = "pci";
75125 qcom,ath10k-calibration-data = [ 01 02 03 ... ];
126
+ ext-fem-name = "microsemi-lx5586";
76127 };
77128 };
78129 };
....@@ -125,6 +176,8 @@
125176 qcom,msi_addr = <0x0b006040>;
126177 qcom,msi_base = <0x40>;
127178 qcom,ath10k-pre-calibration-data = [ 01 02 03 ... ];
179
+ qcom,coexist-support = <1>;
180
+ qcom,coexist-gpio-pin = <0x33>;
128181 };
129182
130183 Example (to supply wcn3990 SoC wifi block details):
....@@ -133,20 +186,30 @@
133186 compatible = "qcom,wcn3990-wifi";
134187 reg = <0x18800000 0x800000>;
135188 reg-names = "membase";
136
- clocks = <&clock_gcc clk_aggre2_noc_clk>;
137
- clock-names = "smmu_aggre2_noc_clk"
189
+ clocks = <&clock_gcc clk_rf_clk2_pin>;
190
+ clock-names = "cxo_ref_clk_pin";
138191 interrupts =
139
- <0 130 0 /* CE0 */ >,
140
- <0 131 0 /* CE1 */ >,
141
- <0 132 0 /* CE2 */ >,
142
- <0 133 0 /* CE3 */ >,
143
- <0 134 0 /* CE4 */ >,
144
- <0 135 0 /* CE5 */ >,
145
- <0 136 0 /* CE6 */ >,
146
- <0 137 0 /* CE7 */ >,
147
- <0 138 0 /* CE8 */ >,
148
- <0 139 0 /* CE9 */ >,
149
- <0 140 0 /* CE10 */ >,
150
- <0 141 0 /* CE11 */ >;
192
+ <GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>,
193
+ <GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>,
194
+ <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
195
+ <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
196
+ <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
197
+ <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
198
+ <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
199
+ <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
200
+ <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
201
+ <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
202
+ <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
203
+ <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>;
151204 vdd-0.8-cx-mx-supply = <&pm8998_l5>;
205
+ vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
206
+ vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
207
+ vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
208
+ vdd-3.3-ch1-supply = <&vreg_l26a_3p3>;
209
+ memory-region = <&wifi_msa_mem>;
210
+ iommus = <&apps_smmu 0x0040 0x1>;
211
+ qcom,msa-fixed-perm;
212
+ wifi-firmware {
213
+ iommus = <&apps_iommu 0xc22 0x1>;
214
+ };
152215 };