修改led为gpio

hc

2024-10-12 a5969cabbb4660eab42b6ef0412cbbd1200cf14d

 kernel/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt
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@@ -1,17 +1,24 @@
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 Xilinx Slave Serial SPI FPGA Manager
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-Xilinx Spartan-6 FPGAs support a method of loading the bitstream over
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-what is referred to as "slave serial" interface.
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+Xilinx Spartan-6 and 7 Series FPGAs support a method of loading the
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+bitstream over what is referred to as "slave serial" interface.
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 The slave serial link is not technically SPI, and might require extra
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 circuits in order to play nicely with other SPI slaves on the same bus.
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-See https://www.xilinx.com/support/documentation/user_guides/ug380.pdf
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+See:
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+- https://www.xilinx.com/support/documentation/user_guides/ug380.pdf
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+- https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf
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+- https://www.xilinx.com/support/documentation/application_notes/xapp583-fpga-configuration.pdf
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 Required properties:
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 - compatible: should contain "xlnx,fpga-slave-serial"
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 - reg: spi chip select of the FPGA
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 - prog_b-gpios: config pin (referred to as PROGRAM_B in the manual)
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 - done-gpios: config status pin (referred to as DONE in the manual)
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+
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+Optional properties:
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+- init-b-gpios: initialization status and configuration error pin
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+                (referred to as INIT_B in the manual)
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 Example for full FPGA configuration:
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..
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@@ -37,7 +44,8 @@
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 			spi-max-frequency = <60000000>;
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 			spi-cpha;
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 			reg = <0>;
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-			done-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
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 			prog_b-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
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+			init-b-gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
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+			done-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
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 		};
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 	};