修改led为gpio

hc

2024-10-12 a5969cabbb4660eab42b6ef0412cbbd1200cf14d

 kernel/Documentation/core-api/refcount-vs-atomic.rst
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 program order (po) relation (on the same CPU). It guarantees that
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 each ``atomic_*()`` and ``refcount_*()`` operation is atomic and instructions
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 are executed in program order on a single CPU.
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-This is implemented using :c:func:`READ_ONCE`/:c:func:`WRITE_ONCE` and
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+This is implemented using READ_ONCE()/WRITE_ONCE() and
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 compare-and-swap primitives.
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 A strong (full) memory ordering guarantees that all prior loads and
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 It also guarantees that all po-earlier stores on the same CPU
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 and all propagated stores from other CPUs must propagate to all
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 other CPUs before any po-later instruction is executed on the original
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-CPU (A-cumulative property). This is implemented using :c:func:`smp_mb`.
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+CPU (A-cumulative property). This is implemented using smp_mb().
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 A RELEASE memory ordering guarantees that all prior loads and
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 stores (all po-earlier instructions) on the same CPU are completed
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 stores on the same CPU and all propagated stores from other CPUs
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 must propagate to all other CPUs before the release operation
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 (A-cumulative property). This is implemented using
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-:c:func:`smp_store_release`.
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+smp_store_release().
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+
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+An ACQUIRE memory ordering guarantees that all post loads and
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+stores (all po-later instructions) on the same CPU are
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+completed after the acquire operation. It also guarantees that all
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+po-later stores on the same CPU must propagate to all other CPUs
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+after the acquire operation executes. This is implemented using
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+smp_acquire__after_ctrl_dep().
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 A control dependency (on success) for refcounters guarantees that
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 if a reference for an object was successfully obtained (reference
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 Function changes:
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- * :c:func:`atomic_set` --> :c:func:`refcount_set`
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- * :c:func:`atomic_read` --> :c:func:`refcount_read`
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+ * atomic_set() --> refcount_set()
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+ * atomic_read() --> refcount_read()
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 Memory ordering guarantee changes:
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 Function changes:
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- * :c:func:`atomic_inc` --> :c:func:`refcount_inc`
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- * :c:func:`atomic_add` --> :c:func:`refcount_add`
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+ * atomic_inc() --> refcount_inc()
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+ * atomic_add() --> refcount_add()
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 Memory ordering guarantee changes:
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 Function changes:
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- * :c:func:`atomic_dec` --> :c:func:`refcount_dec`
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+ * atomic_dec() --> refcount_dec()
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 Memory ordering guarantee changes:
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 Function changes:
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- * :c:func:`atomic_inc_not_zero` --> :c:func:`refcount_inc_not_zero`
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- * no atomic counterpart --> :c:func:`refcount_add_not_zero`
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+ * atomic_inc_not_zero() --> refcount_inc_not_zero()
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+ * no atomic counterpart --> refcount_add_not_zero()
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 Memory ordering guarantees changes:
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    result of obtaining pointer to the object!
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-case 5) - decrement-based RMW ops that return a value
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------------------------------------------------------
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+case 5) - generic dec/sub decrement-based RMW ops that return a value
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+---------------------------------------------------------------------
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 Function changes:
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- * :c:func:`atomic_dec_and_test` --> :c:func:`refcount_dec_and_test`
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- * :c:func:`atomic_sub_and_test` --> :c:func:`refcount_sub_and_test`
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- * no atomic counterpart --> :c:func:`refcount_dec_if_one`
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+ * atomic_dec_and_test() --> refcount_dec_and_test()
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+ * atomic_sub_and_test() --> refcount_sub_and_test()
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+
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+Memory ordering guarantees changes:
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+
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+ * fully ordered --> RELEASE ordering + ACQUIRE ordering on success
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+
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+
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+case 6) other decrement-based RMW ops that return a value
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+---------------------------------------------------------
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+
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+Function changes:
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+ * no atomic counterpart --> refcount_dec_if_one()
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  * ``atomic_add_unless(&var, -1, 1)`` --> ``refcount_dec_not_one(&var)``
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 Memory ordering guarantees changes:
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  * fully ordered --> RELEASE ordering + control dependency
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-.. note:: :c:func:`atomic_add_unless` only provides full order on success.
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+.. note:: atomic_add_unless() only provides full order on success.
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-case 6) - lock-based RMW
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+case 7) - lock-based RMW
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 ------------------------
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 Function changes:
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- * :c:func:`atomic_dec_and_lock` --> :c:func:`refcount_dec_and_lock`
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- * :c:func:`atomic_dec_and_mutex_lock` --> :c:func:`refcount_dec_and_mutex_lock`
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+ * atomic_dec_and_lock() --> refcount_dec_and_lock()
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+ * atomic_dec_and_mutex_lock() --> refcount_dec_and_mutex_lock()
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 Memory ordering guarantees changes:
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  * fully ordered --> RELEASE ordering + control dependency + hold
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-   :c:func:`spin_lock` on success
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+   spin_lock() on success