修改led为gpio

hc

2024-10-12 a5969cabbb4660eab42b6ef0412cbbd1200cf14d

 kernel/Documentation/core-api/genericirq.rst
..
..
@@ -26,7 +26,7 @@
26
26
 =========
27
27
 
28
28
 The original implementation of interrupt handling in Linux uses the
29
-:c:func:`__do_IRQ` super-handler, which is able to deal with every type of
29
+__do_IRQ() super-handler, which is able to deal with every type of
30
30
 interrupt logic.
31
31
 
32
32
 Originally, Russell King identified different types of handlers to build
..
..
@@ -43,7 +43,7 @@
43
43
 
44
44
 -  Fast EOI type
45
45
 
46
-In the SMP world of the :c:func:`__do_IRQ` super-handler another type was
46
+In the SMP world of the __do_IRQ() super-handler another type was
47
47
 identified:
48
48
 
49
49
 -  Per CPU type
..
..
@@ -83,7 +83,7 @@
83
83
 (sub)architecture specific 'edge type' implementation.
84
84
 
85
85
 To make the transition to the new model easier and prevent the breakage
86
-of existing implementations, the :c:func:`__do_IRQ` super-handler is still
86
+of existing implementations, the __do_IRQ() super-handler is still
87
87
 available. This leads to a kind of duality for the time being. Over time
88
88
 the new model should be used in more and more architectures, as it
89
89
 enables smaller and cleaner IRQ subsystems. It's deprecated for three
..
..
@@ -116,7 +116,7 @@
116
116
 interrupt chip structure which are assigned to this interrupt.
117
117
 
118
118
 Whenever an interrupt triggers, the low-level architecture code calls
119
-into the generic interrupt code by calling :c:func:`desc->handle_irq`. This
119
+into the generic interrupt code by calling desc->handle_irq(). This
120
120
 high-level IRQ handling function only uses desc->irq_data.chip
121
121
 primitives referenced by the assigned chip descriptor structure.
122
122
 
..
..
@@ -125,27 +125,29 @@
125
125
 
126
126
 The high-level Driver API consists of following functions:
127
127
 
128
--  :c:func:`request_irq`
128
+-  request_irq()
129
129
 
130
--  :c:func:`free_irq`
130
+-  request_threaded_irq()
131
131
 
132
--  :c:func:`disable_irq`
132
+-  free_irq()
133
133
 
134
--  :c:func:`enable_irq`
134
+-  disable_irq()
135
135
 
136
--  :c:func:`disable_irq_nosync` (SMP only)
136
+-  enable_irq()
137
137
 
138
--  :c:func:`synchronize_irq` (SMP only)
138
+-  disable_irq_nosync() (SMP only)
139
139
 
140
--  :c:func:`irq_set_irq_type`
140
+-  synchronize_irq() (SMP only)
141
141
 
142
--  :c:func:`irq_set_irq_wake`
142
+-  irq_set_irq_type()
143
143
 
144
--  :c:func:`irq_set_handler_data`
144
+-  irq_set_irq_wake()
145
145
 
146
--  :c:func:`irq_set_chip`
146
+-  irq_set_handler_data()
147
147
 
148
--  :c:func:`irq_set_chip_data`
148
+-  irq_set_chip()
149
+
150
+-  irq_set_chip_data()
149
151
 
150
152
 See the autogenerated function documentation for details.
151
153
 
..
..
@@ -154,19 +156,19 @@
154
156
 
155
157
 The generic layer provides a set of pre-defined irq-flow methods:
156
158
 
157
--  :c:func:`handle_level_irq`
159
+-  handle_level_irq()
158
160
 
159
--  :c:func:`handle_edge_irq`
161
+-  handle_edge_irq()
160
162
 
161
--  :c:func:`handle_fasteoi_irq`
163
+-  handle_fasteoi_irq()
162
164
 
163
--  :c:func:`handle_simple_irq`
165
+-  handle_simple_irq()
164
166
 
165
--  :c:func:`handle_percpu_irq`
167
+-  handle_percpu_irq()
166
168
 
167
--  :c:func:`handle_edge_eoi_irq`
169
+-  handle_edge_eoi_irq()
168
170
 
169
--  :c:func:`handle_bad_irq`
171
+-  handle_bad_irq()
170
172
 
171
173
 The interrupt flow handlers (either pre-defined or architecture
172
174
 specific) are assigned to specific interrupts by the architecture either
..
..
@@ -325,14 +327,14 @@
325
327
 
326
328
 This per interrupt selectable feature, which was introduced by Russell
327
329
 King in the ARM interrupt implementation, does not mask an interrupt at
328
-the hardware level when :c:func:`disable_irq` is called. The interrupt is kept
330
+the hardware level when disable_irq() is called. The interrupt is kept
329
331
 enabled and is masked in the flow handler when an interrupt event
330
332
 happens. This prevents losing edge interrupts on hardware which does not
331
333
 store an edge interrupt event while the interrupt is disabled at the
332
334
 hardware level. When an interrupt arrives while the IRQ_DISABLED flag
333
335
 is set, then the interrupt is masked at the hardware level and the
334
336
 IRQ_PENDING bit is set. When the interrupt is re-enabled by
335
-:c:func:`enable_irq` the pending bit is checked and if it is set, the interrupt
337
+enable_irq() the pending bit is checked and if it is set, the interrupt
336
338
 is resent either via hardware or by a software resend mechanism. (It's
337
339
 necessary to enable CONFIG_HARDIRQS_SW_RESEND when you want to use
338
340
 the delayed interrupt disable feature and your hardware is not capable
..
..
@@ -369,7 +371,7 @@
369
371
 __do_IRQ entry point
370
372
 ====================
371
373
 
372
-The original implementation :c:func:`__do_IRQ` was an alternative entry point
374
+The original implementation __do_IRQ() was an alternative entry point
373
375
 for all types of interrupts. It no longer exists.
374
376
 
375
377
 This handler turned out to be not suitable for all interrupt hardware
..
..
@@ -417,6 +419,7 @@
417
419
 .. kernel-doc:: kernel/irq/manage.c
418
420
 
419
421
 .. kernel-doc:: kernel/irq/chip.c
422
+   :export:
420
423
 
421
424
 Internal Functions Provided
422
425
 ===========================
..
..
@@ -429,6 +432,7 @@
429
432
 .. kernel-doc:: kernel/irq/handle.c
430
433
 
431
434
 .. kernel-doc:: kernel/irq/chip.c
435
+   :internal:
432
436
 
433
437
 Credits
434
438
 =======