hc
2024-10-12 a5969cabbb4660eab42b6ef0412cbbd1200cf14d
kernel/Documentation/ABI/testing/sysfs-platform-dfl-fme
....@@ -21,3 +21,226 @@
2121 Description: Read-only. It returns Bitstream (static FPGA region) meta
2222 data, which includes the synthesis date, seed and other
2323 information of this static FPGA region.
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/cache_size
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+Date: August 2019
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+KernelVersion: 5.4
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-only. It returns cache size of this FPGA device.
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/fabric_version
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+Date: August 2019
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+KernelVersion: 5.4
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-only. It returns fabric version of this FPGA device.
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+ Userspace applications need this information to select
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+ best data channels per different fabric design.
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/socket_id
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+Date: August 2019
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+KernelVersion: 5.4
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-only. It returns socket_id to indicate which socket
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+ this FPGA belongs to, only valid for integrated solution.
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+ User only needs this information, in case standard numa node
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+ can't provide correct information.
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/errors/pcie0_errors
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+Date: August 2019
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+KernelVersion: 5.4
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-Write. Read this file for errors detected on pcie0 link.
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+ Write this file to clear errors logged in pcie0_errors. Write
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+ fails with -EINVAL if input parsing fails or input error code
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+ doesn't match.
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/errors/pcie1_errors
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+Date: August 2019
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+KernelVersion: 5.4
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-Write. Read this file for errors detected on pcie1 link.
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+ Write this file to clear errors logged in pcie1_errors. Write
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+ fails with -EINVAL if input parsing fails or input error code
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+ doesn't match.
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/errors/nonfatal_errors
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+Date: August 2019
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+KernelVersion: 5.4
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-only. It returns non-fatal errors detected.
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/errors/catfatal_errors
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+Date: August 2019
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+KernelVersion: 5.4
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-only. It returns catastrophic and fatal errors detected.
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/errors/inject_errors
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+Date: August 2019
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+KernelVersion: 5.4
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-Write. Read this file to check errors injected. Write this
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+ file to inject errors for testing purpose. Write fails with
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+ -EINVAL if input parsing fails or input inject error code isn't
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+ supported.
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/errors/fme_errors
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+Date: August 2019
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+KernelVersion: 5.4
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-Write. Read this file to get errors detected on FME.
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+ Write this file to clear errors logged in fme_errors. Write
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+ fials with -EINVAL if input parsing fails or input error code
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+ doesn't match.
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/errors/first_error
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+Date: August 2019
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+KernelVersion: 5.4
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-only. Read this file to get the first error detected by
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+ hardware.
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/errors/next_error
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+Date: August 2019
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+KernelVersion: 5.4
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-only. Read this file to get the second error detected by
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+ hardware.
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/name
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+Date: October 2019
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+KernelVersion: 5.5
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-Only. Read this file to get the name of hwmon device, it
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+ supports values:
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+
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+ ================= =========================
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+ 'dfl_fme_thermal' thermal hwmon device name
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+ 'dfl_fme_power' power hwmon device name
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+ ================= =========================
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_input
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+Date: October 2019
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+KernelVersion: 5.5
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-Only. It returns FPGA device temperature in millidegrees
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+ Celsius.
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_max
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+Date: October 2019
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+KernelVersion: 5.5
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-Only. It returns hardware threshold1 temperature in
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+ millidegrees Celsius. If temperature rises at or above this
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+ threshold, hardware starts 50% or 90% throttling (see
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+ 'temp1_max_policy').
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_crit
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+Date: October 2019
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+KernelVersion: 5.5
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-Only. It returns hardware threshold2 temperature in
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+ millidegrees Celsius. If temperature rises at or above this
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+ threshold, hardware starts 100% throttling.
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_emergency
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+Date: October 2019
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+KernelVersion: 5.5
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-Only. It returns hardware trip threshold temperature in
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+ millidegrees Celsius. If temperature rises at or above this
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+ threshold, a fatal event will be triggered to board management
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+ controller (BMC) to shutdown FPGA.
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_max_alarm
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+Date: October 2019
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+KernelVersion: 5.5
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-only. It returns 1 if temperature is currently at or above
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+ hardware threshold1 (see 'temp1_max'), otherwise 0.
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_crit_alarm
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+Date: October 2019
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+KernelVersion: 5.5
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-only. It returns 1 if temperature is currently at or above
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+ hardware threshold2 (see 'temp1_crit'), otherwise 0.
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_max_policy
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+Date: October 2019
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+KernelVersion: 5.5
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-Only. Read this file to get the policy of hardware threshold1
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+ (see 'temp1_max'). It only supports two values (policies):
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+
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+ == ==========================
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+ 0 AP2 state (90% throttling)
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+ 1 AP1 state (50% throttling)
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+ == ==========================
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/power1_input
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+Date: October 2019
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+KernelVersion: 5.5
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-Only. It returns current FPGA power consumption in uW.
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/power1_max
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+Date: October 2019
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+KernelVersion: 5.5
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-Write. Read this file to get current hardware power
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+ threshold1 in uW. If power consumption rises at or above
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+ this threshold, hardware starts 50% throttling.
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+ Write this file to set current hardware power threshold1 in uW.
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+ As hardware only accepts values in Watts, so input value will
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+ be round down per Watts (< 1 watts part will be discarded) and
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+ clamped within the range from 0 to 127 Watts. Write fails with
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+ -EINVAL if input parsing fails.
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/power1_crit
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+Date: October 2019
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+KernelVersion: 5.5
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-Write. Read this file to get current hardware power
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+ threshold2 in uW. If power consumption rises at or above
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+ this threshold, hardware starts 90% throttling.
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+ Write this file to set current hardware power threshold2 in uW.
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+ As hardware only accepts values in Watts, so input value will
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+ be round down per Watts (< 1 watts part will be discarded) and
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+ clamped within the range from 0 to 127 Watts. Write fails with
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+ -EINVAL if input parsing fails.
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/power1_max_alarm
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+Date: October 2019
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+KernelVersion: 5.5
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-only. It returns 1 if power consumption is currently at or
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+ above hardware threshold1 (see 'power1_max'), otherwise 0.
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/power1_crit_alarm
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+Date: October 2019
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+KernelVersion: 5.5
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-only. It returns 1 if power consumption is currently at or
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+ above hardware threshold2 (see 'power1_crit'), otherwise 0.
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/power1_xeon_limit
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+Date: October 2019
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+KernelVersion: 5.5
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-Only. It returns power limit for XEON in uW.
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/power1_fpga_limit
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+Date: October 2019
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+KernelVersion: 5.5
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-Only. It returns power limit for FPGA in uW.
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+
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+What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/power1_ltr
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+Date: October 2019
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+KernelVersion: 5.5
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+Contact: Wu Hao <hao.wu@intel.com>
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+Description: Read-only. Read this file to get current Latency Tolerance
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+ Reporting (ltr) value. It returns 1 if all Accelerated
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+ Function Units (AFUs) can tolerate latency >= 40us for memory
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+ access or 0 if any AFU is latency sensitive (< 40us).