hc
2024-10-12 a5969cabbb4660eab42b6ef0412cbbd1200cf14d
kernel/Documentation/ABI/testing/sysfs-bus-coresight-devices-tmc
....@@ -11,21 +11,21 @@
1111 Date: March 2016
1212 KernelVersion: 4.7
1313 Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
14
-Description: (R) Defines the size, in 32-bit words, of the local RAM buffer.
14
+Description: (Read) Defines the size, in 32-bit words, of the local RAM buffer.
1515 The value is read directly from HW register RSZ, 0x004.
1616
1717 What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/sts
1818 Date: March 2016
1919 KernelVersion: 4.7
2020 Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
21
-Description: (R) Shows the value held by the TMC status register. The value
21
+Description: (Read) Shows the value held by the TMC status register. The value
2222 is read directly from HW register STS, 0x00C.
2323
2424 What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/rrp
2525 Date: March 2016
2626 KernelVersion: 4.7
2727 Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
28
-Description: (R) Shows the value held by the TMC RAM Read Pointer register
28
+Description: (Read) Shows the value held by the TMC RAM Read Pointer register
2929 that is used to read entries from the Trace RAM over the APB
3030 interface. The value is read directly from HW register RRP,
3131 0x014.
....@@ -34,7 +34,7 @@
3434 Date: March 2016
3535 KernelVersion: 4.7
3636 Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
37
-Description: (R) Shows the value held by the TMC RAM Write Pointer register
37
+Description: (Read) Shows the value held by the TMC RAM Write Pointer register
3838 that is used to sets the write pointer to write entries from
3939 the CoreSight bus into the Trace RAM. The value is read directly
4040 from HW register RWP, 0x018.
....@@ -43,21 +43,21 @@
4343 Date: March 2016
4444 KernelVersion: 4.7
4545 Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
46
-Description: (R) Similar to "trigger_cntr" above except that this value is
46
+Description: (Read) Similar to "trigger_cntr" above except that this value is
4747 read directly from HW register TRG, 0x01C.
4848
4949 What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/ctl
5050 Date: March 2016
5151 KernelVersion: 4.7
5252 Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
53
-Description: (R) Shows the value held by the TMC Control register. The value
53
+Description: (Read) Shows the value held by the TMC Control register. The value
5454 is read directly from HW register CTL, 0x020.
5555
5656 What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/ffsr
5757 Date: March 2016
5858 KernelVersion: 4.7
5959 Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
60
-Description: (R) Shows the value held by the TMC Formatter and Flush Status
60
+Description: (Read) Shows the value held by the TMC Formatter and Flush Status
6161 register. The value is read directly from HW register FFSR,
6262 0x300.
6363
....@@ -65,7 +65,7 @@
6565 Date: March 2016
6666 KernelVersion: 4.7
6767 Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
68
-Description: (R) Shows the value held by the TMC Formatter and Flush Control
68
+Description: (Read) Shows the value held by the TMC Formatter and Flush Control
6969 register. The value is read directly from HW register FFCR,
7070 0x304.
7171
....@@ -73,7 +73,7 @@
7373 Date: March 2016
7474 KernelVersion: 4.7
7575 Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
76
-Description: (R) Shows the value held by the TMC Mode register, which
76
+Description: (Read) Shows the value held by the TMC Mode register, which
7777 indicate the mode the device has been configured to enact. The
7878 The value is read directly from the MODE register, 0x028.
7979
....@@ -81,7 +81,7 @@
8181 Date: March 2016
8282 KernelVersion: 4.7
8383 Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
84
-Description: (R) Indicates the capabilities of the Coresight TMC.
84
+Description: (Read) Indicates the capabilities of the Coresight TMC.
8585 The value is read directly from the DEVID register, 0xFC8,
8686
8787 What: /sys/bus/coresight/devices/<memory_map>.tmc/buffer_size