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2024-09-20 a36159eec6ca17402b0e146b86efaf76568dc353 
 kernel/drivers/net/can/pch_can.c
....@@ -1,18 +1,7 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23  * Copyright (C) 1999 - 2010 Intel Corporation.
34  * Copyright (C) 2010 LAPIS SEMICONDUCTOR CO., LTD.
4
- *
5
- * This program is free software; you can redistribute it and/or modify
6
- * it under the terms of the GNU General Public License as published by
7
- * the Free Software Foundation; version 2 of the License.
8
- *
9
- * This program is distributed in the hope that it will be useful,
10
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
11
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12
- * GNU General Public License for more details.
13
- *
14
- * You should have received a copy of the GNU General Public License
15
- * along with this program; if not, see <http://www.gnu.org/licenses/>.
165  */
176 
187 #include <linux/interrupt.h>
....@@ -472,7 +461,7 @@
472461 			       PCH_ID2_DIR | (0x7ff << 2));
473462 		iowrite32(0x0, &priv->regs->ifregs[1].id1);
474463 
475
-		/* Claring NewDat, TxRqst & IntPnd */
464
+		/* Clearing NewDat, TxRqst & IntPnd */
476465 		pch_can_bit_clear(&priv->regs->ifregs[1].mcont,
477466 				  PCH_IF_MCONT_NEWDAT | PCH_IF_MCONT_INTPND |
478467 				  PCH_IF_MCONT_TXRQXT);
....@@ -500,6 +489,7 @@
500489 	if (!skb)
501490 		return;
502491 
492
+	errc = ioread32(&priv->regs->errc);
503493 	if (status & PCH_BUS_OFF) {
504494 		pch_can_set_tx_all(priv, 0);
505495 		pch_can_set_rx_all(priv, 0);
....@@ -507,9 +497,11 @@
507497 		cf->can_id |= CAN_ERR_BUSOFF;
508498 		priv->can.can_stats.bus_off++;
509499 		can_bus_off(ndev);
500
+	} else {
501
+		cf->data[6] = errc & PCH_TEC;
502
+		cf->data[7] = (errc & PCH_REC) >> 8;
510503 	}
511504 
512
-	errc = ioread32(&priv->regs->errc);
513505 	/* Warning interrupt. */
514506 	if (status & PCH_EWARN) {
515507 		state = CAN_STATE_ERROR_WARNING;
....@@ -566,9 +558,6 @@
566558 	case PCH_LEC_ALL: /* Written by CPU. No error status */
567559 		break;
568560 	}
569
-
570
-	cf->data[6] = errc & PCH_TEC;
571
-	cf->data[7] = (errc & PCH_REC) >> 8;
572561 
573562 	priv->can.state = state;
574563 	netif_receive_skb(skb);
....@@ -845,7 +834,7 @@
845834 	struct pch_can_priv *priv = netdev_priv(ndev);
846835 	int retval;
847836 
848
-	/* Regstering the interrupt. */
837
+	/* Registering the interrupt. */
849838 	retval = request_irq(priv->dev->irq, pch_can_interrupt, IRQF_SHARED,
850839 			     ndev->name, ndev);
851840 	if (retval) {
....@@ -968,8 +957,7 @@
968957 	free_candev(priv->ndev);
969958 }
970959 
971
-#ifdef CONFIG_PM
972
-static void pch_can_set_int_custom(struct pch_can_priv *priv)
960
+static void __maybe_unused pch_can_set_int_custom(struct pch_can_priv *priv)
973961 {
974962 	/* Clearing the IE, SIE and EIE bits of Can control register. */
975963 	pch_can_bit_clear(&priv->regs->cont, PCH_CTRL_IE_SIE_EIE);
....@@ -980,14 +968,14 @@
980968 }
981969 
982970 /* This function retrieves interrupt enabled for the CAN device. */
983
-static u32 pch_can_get_int_enables(struct pch_can_priv *priv)
971
+static u32 __maybe_unused pch_can_get_int_enables(struct pch_can_priv *priv)
984972 {
985973 	/* Obtaining the status of IE, SIE and EIE interrupt bits. */
986974 	return (ioread32(&priv->regs->cont) & PCH_CTRL_IE_SIE_EIE) >> 1;
987975 }
988976 
989
-static u32 pch_can_get_rxtx_ir(struct pch_can_priv *priv, u32 buff_num,
990
-			       enum pch_ifreg dir)
977
+static u32 __maybe_unused pch_can_get_rxtx_ir(struct pch_can_priv *priv,
978
+					      u32 buff_num, enum pch_ifreg dir)
991979 {
992980 	u32 ie, enable;
993981 
....@@ -1008,8 +996,8 @@
1008996 	return enable;
1009997 }
1010998 
1011
-static void pch_can_set_rx_buffer_link(struct pch_can_priv *priv,
1012
-				       u32 buffer_num, int set)
999
+static void __maybe_unused pch_can_set_rx_buffer_link(struct pch_can_priv *priv,
1000
+						      u32 buffer_num, int set)
10131001 {
10141002 	iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask);
10151003 	pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, buffer_num);
....@@ -1024,7 +1012,8 @@
10241012 	pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, buffer_num);
10251013 }
10261014 
1027
-static u32 pch_can_get_rx_buffer_link(struct pch_can_priv *priv, u32 buffer_num)
1015
+static u32 __maybe_unused pch_can_get_rx_buffer_link(struct pch_can_priv *priv,
1016
+						     u32 buffer_num)
10281017 {
10291018 	u32 link;
10301019 
....@@ -1038,20 +1027,19 @@
10381027 	return link;
10391028 }
10401029 
1041
-static int pch_can_get_buffer_status(struct pch_can_priv *priv)
1030
+static int __maybe_unused pch_can_get_buffer_status(struct pch_can_priv *priv)
10421031 {
10431032 	return (ioread32(&priv->regs->treq1) & 0xffff) |
10441033 	       (ioread32(&priv->regs->treq2) << 16);
10451034 }
10461035 
1047
-static int pch_can_suspend(struct pci_dev *pdev, pm_message_t state)
1036
+static int __maybe_unused pch_can_suspend(struct device *dev_d)
10481037 {
10491038 	int i;
1050
-	int retval;
10511039 	u32 buf_stat;	/* Variable for reading the transmit buffer status. */
10521040 	int counter = PCH_COUNTER_LIMIT;
10531041 
1054
-	struct net_device *dev = pci_get_drvdata(pdev);
1042
+	struct net_device *dev = dev_get_drvdata(dev_d);
10551043 	struct pch_can_priv *priv = netdev_priv(dev);
10561044 
10571045 	/* Stop the CAN controller */
....@@ -1069,7 +1057,7 @@
10691057 		udelay(1);
10701058 	}
10711059 	if (!counter)
1072
-		dev_err(&pdev->dev, "%s -> Transmission time out.\n", __func__);
1060
+		dev_err(dev_d, "%s -> Transmission time out.\n", __func__);
10731061 
10741062 	/* Save interrupt configuration and then disable them */
10751063 	priv->int_enables = pch_can_get_int_enables(priv);
....@@ -1092,34 +1080,15 @@
10921080 
10931081 	/* Disable all Receive buffers */
10941082 	pch_can_set_rx_all(priv, 0);
1095
-	retval = pci_save_state(pdev);
1096
-	if (retval) {
1097
-		dev_err(&pdev->dev, "pci_save_state failed.\n");
1098
-	} else {
1099
-		pci_enable_wake(pdev, PCI_D3hot, 0);
1100
-		pci_disable_device(pdev);
1101
-		pci_set_power_state(pdev, pci_choose_state(pdev, state));
1102
-	}
11031083 
1104
-	return retval;
1084
+	return 0;
11051085 }
11061086 
1107
-static int pch_can_resume(struct pci_dev *pdev)
1087
+static int __maybe_unused pch_can_resume(struct device *dev_d)
11081088 {
11091089 	int i;
1110
-	int retval;
1111
-	struct net_device *dev = pci_get_drvdata(pdev);
1090
+	struct net_device *dev = dev_get_drvdata(dev_d);
11121091 	struct pch_can_priv *priv = netdev_priv(dev);
1113
-
1114
-	pci_set_power_state(pdev, PCI_D0);
1115
-	pci_restore_state(pdev);
1116
-	retval = pci_enable_device(pdev);
1117
-	if (retval) {
1118
-		dev_err(&pdev->dev, "pci_enable_device failed.\n");
1119
-		return retval;
1120
-	}
1121
-
1122
-	pci_enable_wake(pdev, PCI_D3hot, 0);
11231092 
11241093 	priv->can.state = CAN_STATE_ERROR_ACTIVE;
11251094 
....@@ -1157,12 +1126,8 @@
11571126 	/* Restore Run Mode */
11581127 	pch_can_set_run_mode(priv, PCH_CAN_RUN);
11591128 
1160
-	return retval;
1129
+	return 0;
11611130 }
1162
-#else
1163
-#define pch_can_suspend NULL
1164
-#define pch_can_resume NULL
1165
-#endif
11661131 
11671132 static int pch_can_get_berr_counter(const struct net_device *dev,
11681133 				    struct can_berr_counter *bec)
....@@ -1263,13 +1228,16 @@
12631228 	return rc;
12641229 }
12651230 
1231
+static SIMPLE_DEV_PM_OPS(pch_can_pm_ops,
1232
+			 pch_can_suspend,
1233
+			 pch_can_resume);
1234
+
12661235 static struct pci_driver pch_can_pci_driver = {
12671236 	.name = "pch_can",
12681237 	.id_table = pch_pci_tbl,
12691238 	.probe = pch_can_probe,
12701239 	.remove = pch_can_remove,
1271
-	.suspend = pch_can_suspend,
1272
-	.resume = pch_can_resume,
1240
+	.driver.pm = &pch_can_pm_ops,
12731241 };
12741242 
12751243 module_pci_driver(pch_can_pci_driver);