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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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| 1 | 2 | /* |
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| 2 | 3 | * Xtensa Performance Monitor Module driver |
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| 3 | 4 | * See Tensilica Debug User's Guide for PMU registers documentation. |
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| 4 | 5 | * |
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| 5 | 6 | * Copyright (C) 2015 Cadence Design Systems Inc. |
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| 6 | | - * |
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| 7 | | - * This program is free software; you can redistribute it and/or modify |
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| 8 | | - * it under the terms of the GNU General Public License version 2 as |
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| 9 | | - * published by the Free Software Foundation. |
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| 10 | 7 | */ |
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| 11 | 8 | |
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| 12 | 9 | #include <linux/interrupt.h> |
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| .. | .. |
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| 16 | 13 | #include <linux/perf_event.h> |
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| 17 | 14 | #include <linux/platform_device.h> |
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| 18 | 15 | |
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| 16 | +#include <asm/core.h> |
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| 19 | 17 | #include <asm/processor.h> |
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| 20 | 18 | #include <asm/stacktrace.h> |
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| 21 | 19 | |
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| 20 | +#define XTENSA_HWVERSION_RG_2015_0 260000 |
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| 21 | + |
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| 22 | +#if XCHAL_HW_MIN_VERSION >= XTENSA_HWVERSION_RG_2015_0 |
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| 23 | +#define XTENSA_PMU_ERI_BASE 0x00101000 |
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| 24 | +#else |
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| 25 | +#define XTENSA_PMU_ERI_BASE 0x00001000 |
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| 26 | +#endif |
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| 27 | + |
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| 22 | 28 | /* Global control/status for all perf counters */ |
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| 23 | | -#define XTENSA_PMU_PMG 0x1000 |
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| 29 | +#define XTENSA_PMU_PMG XTENSA_PMU_ERI_BASE |
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| 24 | 30 | /* Perf counter values */ |
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| 25 | | -#define XTENSA_PMU_PM(i) (0x1080 + (i) * 4) |
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| 31 | +#define XTENSA_PMU_PM(i) (XTENSA_PMU_ERI_BASE + 0x80 + (i) * 4) |
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| 26 | 32 | /* Perf counter control registers */ |
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| 27 | | -#define XTENSA_PMU_PMCTRL(i) (0x1100 + (i) * 4) |
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| 33 | +#define XTENSA_PMU_PMCTRL(i) (XTENSA_PMU_ERI_BASE + 0x100 + (i) * 4) |
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| 28 | 34 | /* Perf counter status registers */ |
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| 29 | | -#define XTENSA_PMU_PMSTAT(i) (0x1180 + (i) * 4) |
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| 35 | +#define XTENSA_PMU_PMSTAT(i) (XTENSA_PMU_ERI_BASE + 0x180 + (i) * 4) |
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| 30 | 36 | |
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| 31 | 37 | #define XTENSA_PMU_PMG_PMEN 0x1 |
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| 32 | 38 | |
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| .. | .. |
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| 365 | 371 | struct xtensa_pmu_events *ev = this_cpu_ptr(&xtensa_pmu_events); |
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| 366 | 372 | unsigned i; |
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| 367 | 373 | |
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| 368 | | - for (i = find_first_bit(ev->used_mask, XCHAL_NUM_PERF_COUNTERS); |
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| 369 | | - i < XCHAL_NUM_PERF_COUNTERS; |
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| 370 | | - i = find_next_bit(ev->used_mask, XCHAL_NUM_PERF_COUNTERS, i + 1)) { |
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| 374 | + for_each_set_bit(i, ev->used_mask, XCHAL_NUM_PERF_COUNTERS) { |
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| 371 | 375 | uint32_t v = get_er(XTENSA_PMU_PMSTAT(i)); |
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| 372 | 376 | struct perf_event *event = ev->event[i]; |
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| 373 | 377 | struct hw_perf_event *hwc = &event->hw; |
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