.. | .. |
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1 | 1 | /* |
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2 | | - * umip.c Emulation for instruction protected by the Intel User-Mode |
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3 | | - * Instruction Prevention feature |
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| 2 | + * umip.c Emulation for instruction protected by the User-Mode Instruction |
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| 3 | + * Prevention feature |
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4 | 4 | * |
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5 | 5 | * Copyright (c) 2017, Intel Corporation. |
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6 | 6 | * Ricardo Neri <ricardo.neri-calderon@linux.intel.com> |
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.. | .. |
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18 | 18 | |
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19 | 19 | /** DOC: Emulation for User-Mode Instruction Prevention (UMIP) |
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20 | 20 | * |
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21 | | - * The feature User-Mode Instruction Prevention present in recent Intel |
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22 | | - * processor prevents a group of instructions (sgdt, sidt, sldt, smsw, and str) |
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23 | | - * from being executed with CPL > 0. Otherwise, a general protection fault is |
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24 | | - * issued. |
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| 21 | + * User-Mode Instruction Prevention is a security feature present in recent |
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| 22 | + * x86 processors that, when enabled, prevents a group of instructions (SGDT, |
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| 23 | + * SIDT, SLDT, SMSW and STR) from being run in user mode by issuing a general |
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| 24 | + * protection fault if the instruction is executed with CPL > 0. |
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25 | 25 | * |
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26 | 26 | * Rather than relaying to the user space the general protection fault caused by |
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27 | 27 | * the UMIP-protected instructions (in the form of a SIGSEGV signal), it can be |
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.. | .. |
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36 | 36 | * DOSEMU2) rely on this subset of instructions to function. |
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37 | 37 | * |
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38 | 38 | * The instructions protected by UMIP can be split in two groups. Those which |
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39 | | - * return a kernel memory address (sgdt and sidt) and those which return a |
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40 | | - * value (sldt, str and smsw). |
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| 39 | + * return a kernel memory address (SGDT and SIDT) and those which return a |
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| 40 | + * value (SLDT, STR and SMSW). |
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41 | 41 | * |
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42 | 42 | * For the instructions that return a kernel memory address, applications |
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43 | 43 | * such as WineHQ rely on the result being located in the kernel memory space, |
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.. | .. |
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45 | 45 | * value that, lies close to the top of the kernel memory. The limit for the GDT |
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46 | 46 | * and the IDT are set to zero. |
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47 | 47 | * |
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48 | | - * Given that sldt and str are not commonly used in programs that run on WineHQ |
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49 | | - * or DOSEMU2, they are not emulated. |
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50 | | - * |
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51 | | - * The instruction smsw is emulated to return the value that the register CR0 |
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| 48 | + * The instruction SMSW is emulated to return the value that the register CR0 |
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52 | 49 | * has at boot time as set in the head_32. |
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| 50 | + * SLDT and STR are emulated to return the values that the kernel programmatically |
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| 51 | + * assigns: |
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| 52 | + * - SLDT returns (GDT_ENTRY_LDT * 8) if an LDT has been set, 0 if not. |
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| 53 | + * - STR returns (GDT_ENTRY_TSS * 8). |
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53 | 54 | * |
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54 | | - * Also, emulation is provided only for 32-bit processes; 64-bit processes |
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55 | | - * that attempt to use the instructions that UMIP protects will receive the |
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56 | | - * SIGSEGV signal issued as a consequence of the general protection fault. |
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| 55 | + * Emulation is provided for both 32-bit and 64-bit processes. |
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57 | 56 | * |
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58 | 57 | * Care is taken to appropriately emulate the results when segmentation is |
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59 | 58 | * used. That is, rather than relying on USER_DS and USER_CS, the function |
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.. | .. |
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63 | 62 | * application uses a local descriptor table. |
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64 | 63 | */ |
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65 | 64 | |
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66 | | -#define UMIP_DUMMY_GDT_BASE 0xfffe0000 |
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67 | | -#define UMIP_DUMMY_IDT_BASE 0xffff0000 |
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| 65 | +#define UMIP_DUMMY_GDT_BASE 0xfffffffffffe0000ULL |
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| 66 | +#define UMIP_DUMMY_IDT_BASE 0xffffffffffff0000ULL |
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68 | 67 | |
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69 | 68 | /* |
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70 | 69 | * The SGDT and SIDT instructions store the contents of the global descriptor |
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71 | 70 | * table and interrupt table registers, respectively. The destination is a |
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72 | 71 | * memory operand of X+2 bytes. X bytes are used to store the base address of |
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73 | | - * the table and 2 bytes are used to store the limit. In 32-bit processes, the |
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74 | | - * only processes for which emulation is provided, X has a value of 4. |
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| 72 | + * the table and 2 bytes are used to store the limit. In 32-bit processes X |
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| 73 | + * has a value of 4, in 64-bit processes X has a value of 8. |
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75 | 74 | */ |
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76 | | -#define UMIP_GDT_IDT_BASE_SIZE 4 |
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| 75 | +#define UMIP_GDT_IDT_BASE_SIZE_64BIT 8 |
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| 76 | +#define UMIP_GDT_IDT_BASE_SIZE_32BIT 4 |
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77 | 77 | #define UMIP_GDT_IDT_LIMIT_SIZE 2 |
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78 | 78 | |
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79 | 79 | #define UMIP_INST_SGDT 0 /* 0F 01 /0 */ |
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.. | .. |
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82 | 82 | #define UMIP_INST_SLDT 3 /* 0F 00 /0 */ |
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83 | 83 | #define UMIP_INST_STR 4 /* 0F 00 /1 */ |
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84 | 84 | |
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85 | | -const char * const umip_insns[5] = { |
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| 85 | +static const char * const umip_insns[5] = { |
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86 | 86 | [UMIP_INST_SGDT] = "SGDT", |
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87 | 87 | [UMIP_INST_SIDT] = "SIDT", |
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88 | 88 | [UMIP_INST_SMSW] = "SMSW", |
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.. | .. |
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92 | 92 | |
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93 | 93 | #define umip_pr_err(regs, fmt, ...) \ |
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94 | 94 | umip_printk(regs, KERN_ERR, fmt, ##__VA_ARGS__) |
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95 | | -#define umip_pr_warning(regs, fmt, ...) \ |
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| 95 | +#define umip_pr_warn(regs, fmt, ...) \ |
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96 | 96 | umip_printk(regs, KERN_WARNING, fmt, ##__VA_ARGS__) |
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97 | 97 | |
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98 | 98 | /** |
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.. | .. |
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189 | 189 | * @umip_inst: A constant indicating the instruction to emulate |
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190 | 190 | * @data: Buffer into which the dummy result is stored |
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191 | 191 | * @data_size: Size of the emulated result |
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| 192 | + * @x86_64: true if process is 64-bit, false otherwise |
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192 | 193 | * |
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193 | 194 | * Emulate an instruction protected by UMIP and provide a dummy result. The |
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194 | 195 | * result of the emulation is saved in @data. The size of the results depends |
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.. | .. |
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202 | 203 | * 0 on success, -EINVAL on error while emulating. |
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203 | 204 | */ |
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204 | 205 | static int emulate_umip_insn(struct insn *insn, int umip_inst, |
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205 | | - unsigned char *data, int *data_size) |
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| 206 | + unsigned char *data, int *data_size, bool x86_64) |
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206 | 207 | { |
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207 | | - unsigned long dummy_base_addr, dummy_value; |
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208 | | - unsigned short dummy_limit = 0; |
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209 | | - |
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210 | 208 | if (!data || !data_size || !insn) |
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211 | 209 | return -EINVAL; |
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212 | 210 | /* |
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.. | .. |
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219 | 217 | * is always returned irrespective of the operand size. |
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220 | 218 | */ |
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221 | 219 | if (umip_inst == UMIP_INST_SGDT || umip_inst == UMIP_INST_SIDT) { |
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| 220 | + u64 dummy_base_addr; |
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| 221 | + u16 dummy_limit = 0; |
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| 222 | + |
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222 | 223 | /* SGDT and SIDT do not use registers operands. */ |
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223 | 224 | if (X86_MODRM_MOD(insn->modrm.value) == 3) |
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224 | 225 | return -EINVAL; |
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.. | .. |
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228 | 229 | else |
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229 | 230 | dummy_base_addr = UMIP_DUMMY_IDT_BASE; |
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230 | 231 | |
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231 | | - *data_size = UMIP_GDT_IDT_LIMIT_SIZE + UMIP_GDT_IDT_BASE_SIZE; |
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| 232 | + /* |
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| 233 | + * 64-bit processes use the entire dummy base address. |
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| 234 | + * 32-bit processes use the lower 32 bits of the base address. |
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| 235 | + * dummy_base_addr is always 64 bits, but we memcpy the correct |
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| 236 | + * number of bytes from it to the destination. |
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| 237 | + */ |
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| 238 | + if (x86_64) |
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| 239 | + *data_size = UMIP_GDT_IDT_BASE_SIZE_64BIT; |
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| 240 | + else |
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| 241 | + *data_size = UMIP_GDT_IDT_BASE_SIZE_32BIT; |
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232 | 242 | |
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233 | | - memcpy(data + 2, &dummy_base_addr, UMIP_GDT_IDT_BASE_SIZE); |
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| 243 | + memcpy(data + 2, &dummy_base_addr, *data_size); |
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| 244 | + |
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| 245 | + *data_size += UMIP_GDT_IDT_LIMIT_SIZE; |
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234 | 246 | memcpy(data, &dummy_limit, UMIP_GDT_IDT_LIMIT_SIZE); |
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235 | 247 | |
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236 | | - } else if (umip_inst == UMIP_INST_SMSW) { |
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237 | | - dummy_value = CR0_STATE; |
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| 248 | + } else if (umip_inst == UMIP_INST_SMSW || umip_inst == UMIP_INST_SLDT || |
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| 249 | + umip_inst == UMIP_INST_STR) { |
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| 250 | + unsigned long dummy_value; |
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| 251 | + |
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| 252 | + if (umip_inst == UMIP_INST_SMSW) { |
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| 253 | + dummy_value = CR0_STATE; |
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| 254 | + } else if (umip_inst == UMIP_INST_STR) { |
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| 255 | + dummy_value = GDT_ENTRY_TSS * 8; |
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| 256 | + } else if (umip_inst == UMIP_INST_SLDT) { |
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| 257 | +#ifdef CONFIG_MODIFY_LDT_SYSCALL |
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| 258 | + down_read(¤t->mm->context.ldt_usr_sem); |
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| 259 | + if (current->mm->context.ldt) |
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| 260 | + dummy_value = GDT_ENTRY_LDT * 8; |
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| 261 | + else |
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| 262 | + dummy_value = 0; |
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| 263 | + up_read(¤t->mm->context.ldt_usr_sem); |
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| 264 | +#else |
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| 265 | + dummy_value = 0; |
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| 266 | +#endif |
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| 267 | + } |
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238 | 268 | |
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239 | 269 | /* |
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240 | | - * Even though the CR0 register has 4 bytes, the number |
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| 270 | + * For these 3 instructions, the number |
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241 | 271 | * of bytes to be copied in the result buffer is determined |
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242 | 272 | * by whether the operand is a register or a memory location. |
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243 | 273 | * If operand is a register, return as many bytes as the operand |
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244 | 274 | * size. If operand is memory, return only the two least |
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245 | | - * siginificant bytes of CR0. |
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| 275 | + * siginificant bytes. |
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246 | 276 | */ |
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247 | 277 | if (X86_MODRM_MOD(insn->modrm.value) == 3) |
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248 | 278 | *data_size = insn->opnd_bytes; |
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.. | .. |
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250 | 280 | *data_size = 2; |
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251 | 281 | |
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252 | 282 | memcpy(data, &dummy_value, *data_size); |
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253 | | - /* STR and SLDT are not emulated */ |
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254 | 283 | } else { |
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255 | 284 | return -EINVAL; |
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256 | 285 | } |
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.. | .. |
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271 | 300 | */ |
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272 | 301 | static void force_sig_info_umip_fault(void __user *addr, struct pt_regs *regs) |
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273 | 302 | { |
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274 | | - siginfo_t info; |
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275 | 303 | struct task_struct *tsk = current; |
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276 | 304 | |
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277 | 305 | tsk->thread.cr2 = (unsigned long)addr; |
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278 | 306 | tsk->thread.error_code = X86_PF_USER | X86_PF_WRITE; |
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279 | 307 | tsk->thread.trap_nr = X86_TRAP_PF; |
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280 | 308 | |
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281 | | - clear_siginfo(&info); |
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282 | | - info.si_signo = SIGSEGV; |
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283 | | - info.si_errno = 0; |
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284 | | - info.si_code = SEGV_MAPERR; |
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285 | | - info.si_addr = addr; |
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286 | | - force_sig_info(SIGSEGV, &info, tsk); |
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| 309 | + force_sig_fault(SIGSEGV, SEGV_MAPERR, addr); |
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287 | 310 | |
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288 | 311 | if (!(show_unhandled_signals && unhandled_signal(tsk, SIGSEGV))) |
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289 | 312 | return; |
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.. | .. |
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296 | 319 | * fixup_umip_exception() - Fixup a general protection fault caused by UMIP |
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297 | 320 | * @regs: Registers as saved when entering the #GP handler |
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298 | 321 | * |
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299 | | - * The instructions sgdt, sidt, str, smsw, sldt cause a general protection |
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300 | | - * fault if executed with CPL > 0 (i.e., from user space). If the offending |
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301 | | - * user-space process is not in long mode, this function fixes the exception |
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302 | | - * up and provides dummy results for sgdt, sidt and smsw; str and sldt are not |
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303 | | - * fixed up. Also long mode user-space processes are not fixed up. |
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| 322 | + * The instructions SGDT, SIDT, STR, SMSW and SLDT cause a general protection |
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| 323 | + * fault if executed with CPL > 0 (i.e., from user space). This function fixes |
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| 324 | + * the exception up and provides dummy results for SGDT, SIDT and SMSW; STR |
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| 325 | + * and SLDT are not fixed up. |
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304 | 326 | * |
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305 | 327 | * If operands are memory addresses, results are copied to user-space memory as |
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306 | 328 | * indicated by the instruction pointed by eIP using the registers indicated in |
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.. | .. |
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313 | 335 | */ |
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314 | 336 | bool fixup_umip_exception(struct pt_regs *regs) |
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315 | 337 | { |
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316 | | - int not_copied, nr_copied, reg_offset, dummy_data_size, umip_inst; |
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317 | | - unsigned long seg_base = 0, *reg_addr; |
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| 338 | + int nr_copied, reg_offset, dummy_data_size, umip_inst; |
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318 | 339 | /* 10 bytes is the maximum size of the result of UMIP instructions */ |
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319 | 340 | unsigned char dummy_data[10] = { 0 }; |
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320 | 341 | unsigned char buf[MAX_INSN_SIZE]; |
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| 342 | + unsigned long *reg_addr; |
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321 | 343 | void __user *uaddr; |
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322 | 344 | struct insn insn; |
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323 | | - int seg_defs; |
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324 | 345 | |
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325 | 346 | if (!regs) |
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326 | 347 | return false; |
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327 | 348 | |
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328 | | - /* |
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329 | | - * If not in user-space long mode, a custom code segment could be in |
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330 | | - * use. This is true in protected mode (if the process defined a local |
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331 | | - * descriptor table), or virtual-8086 mode. In most of the cases |
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332 | | - * seg_base will be zero as in USER_CS. |
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333 | | - */ |
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334 | | - if (!user_64bit_mode(regs)) |
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335 | | - seg_base = insn_get_seg_base(regs, INAT_SEG_REG_CS); |
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336 | | - |
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337 | | - if (seg_base == -1L) |
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338 | | - return false; |
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339 | | - |
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340 | | - not_copied = copy_from_user(buf, (void __user *)(seg_base + regs->ip), |
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341 | | - sizeof(buf)); |
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342 | | - nr_copied = sizeof(buf) - not_copied; |
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| 349 | + nr_copied = insn_fetch_from_user(regs, buf); |
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343 | 350 | |
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344 | 351 | /* |
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345 | | - * The copy_from_user above could have failed if user code is protected |
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346 | | - * by a memory protection key. Give up on emulation in such a case. |
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347 | | - * Should we issue a page fault? |
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| 352 | + * The insn_fetch_from_user above could have failed if user code |
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| 353 | + * is protected by a memory protection key. Give up on emulation |
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| 354 | + * in such a case. Should we issue a page fault? |
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348 | 355 | */ |
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349 | 356 | if (!nr_copied) |
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350 | 357 | return false; |
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351 | 358 | |
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352 | | - insn_init(&insn, buf, nr_copied, user_64bit_mode(regs)); |
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353 | | - |
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354 | | - /* |
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355 | | - * Override the default operand and address sizes with what is specified |
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356 | | - * in the code segment descriptor. The instruction decoder only sets |
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357 | | - * the address size it to either 4 or 8 address bytes and does nothing |
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358 | | - * for the operand bytes. This OK for most of the cases, but we could |
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359 | | - * have special cases where, for instance, a 16-bit code segment |
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360 | | - * descriptor is used. |
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361 | | - * If there is an address override prefix, the instruction decoder |
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362 | | - * correctly updates these values, even for 16-bit defaults. |
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363 | | - */ |
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364 | | - seg_defs = insn_get_code_seg_params(regs); |
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365 | | - if (seg_defs == -EINVAL) |
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366 | | - return false; |
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367 | | - |
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368 | | - insn.addr_bytes = INSN_CODE_SEG_ADDR_SZ(seg_defs); |
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369 | | - insn.opnd_bytes = INSN_CODE_SEG_OPND_SZ(seg_defs); |
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370 | | - |
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371 | | - insn_get_length(&insn); |
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372 | | - if (nr_copied < insn.length) |
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| 359 | + if (!insn_decode_from_regs(&insn, regs, buf, nr_copied)) |
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373 | 360 | return false; |
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374 | 361 | |
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375 | 362 | umip_inst = identify_insn(&insn); |
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376 | 363 | if (umip_inst < 0) |
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377 | 364 | return false; |
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378 | 365 | |
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379 | | - umip_pr_warning(regs, "%s instruction cannot be used by applications.\n", |
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| 366 | + umip_pr_warn(regs, "%s instruction cannot be used by applications.\n", |
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380 | 367 | umip_insns[umip_inst]); |
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381 | 368 | |
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382 | | - /* Do not emulate SLDT, STR or user long mode processes. */ |
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383 | | - if (umip_inst == UMIP_INST_STR || umip_inst == UMIP_INST_SLDT || user_64bit_mode(regs)) |
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384 | | - return false; |
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| 369 | + umip_pr_warn(regs, "For now, expensive software emulation returns the result.\n"); |
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385 | 370 | |
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386 | | - umip_pr_warning(regs, "For now, expensive software emulation returns the result.\n"); |
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387 | | - |
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388 | | - if (emulate_umip_insn(&insn, umip_inst, dummy_data, &dummy_data_size)) |
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| 371 | + if (emulate_umip_insn(&insn, umip_inst, dummy_data, &dummy_data_size, |
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| 372 | + user_64bit_mode(regs))) |
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389 | 373 | return false; |
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390 | 374 | |
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391 | 375 | /* |
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