~hc/RK356X_SDK_RELEASE.git

..	..	@@ -1,24 +1,14 @@
	1	+/* SPDX-License-Identifier: GPL-2.0-only */
1	2	/*
2	3	* Copied from arch/arm64/include/asm/hwcap.h
3	4	*
4	5	* Copyright (C) 2012 ARM Ltd.
5	6	* Copyright (C) 2017 SiFive
6		- *
7		- * This program is free software; you can redistribute it and/or modify
8		- * it under the terms of the GNU General Public License version 2 as
9		- * published by the Free Software Foundation.
10		- *
11		- * This program is distributed in the hope that it will be useful,
12		- * but WITHOUT ANY WARRANTY; without even the implied warranty of
13		- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14		- * GNU General Public License for more details.
15		- *
16		- * You should have received a copy of the GNU General Public License
17		- * along with this program. If not, see <http://www.gnu.org/licenses/>.
18	7	*/
19		-#ifndef __ASM_HWCAP_H
20		-#define __ASM_HWCAP_H
	8	+#ifndef _ASM_RISCV_HWCAP_H
	9	+#define _ASM_RISCV_HWCAP_H
21	10
	11	+#include <linux/bits.h>
22	12	#include <uapi/asm/hwcap.h>
23	13
24	14	#ifndef __ASSEMBLY__
..	..	@@ -33,5 +23,27 @@
33	23	};
34	24
35	25	extern unsigned long elf_hwcap;
	26	+
	27	+#define RISCV_ISA_EXT_a ('a' - 'a')
	28	+#define RISCV_ISA_EXT_c ('c' - 'a')
	29	+#define RISCV_ISA_EXT_d ('d' - 'a')
	30	+#define RISCV_ISA_EXT_f ('f' - 'a')
	31	+#define RISCV_ISA_EXT_h ('h' - 'a')
	32	+#define RISCV_ISA_EXT_i ('i' - 'a')
	33	+#define RISCV_ISA_EXT_m ('m' - 'a')
	34	+#define RISCV_ISA_EXT_s ('s' - 'a')
	35	+#define RISCV_ISA_EXT_u ('u' - 'a')
	36	+
	37	+#define RISCV_ISA_EXT_MAX 64
	38	+
	39	+unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap);
	40	+
	41	+#define riscv_isa_extension_mask(ext) BIT_MASK(RISCV_ISA_EXT_##ext)
	42	+
	43	+bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, int bit);
	44	+#define riscv_isa_extension_available(isa_bitmap, ext) \
	45	+ __riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_##ext)
	46	+
36	47	#endif
37		-#endif
	48	+
	49	+#endif /* _ASM_RISCV_HWCAP_H */