重命名 AX88772C_eeprom/asix.c 为 asix_mac.c

hc

2024-09-20 a36159eec6ca17402b0e146b86efaf76568dc353

 kernel/arch/openrisc/kernel/dma.c
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@@ -1,3 +1,4 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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 /*
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  * OpenRISC Linux
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  *
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@@ -9,17 +10,11 @@
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  * Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>
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  * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
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  *
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- *      This program is free software; you can redistribute it and/or
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- *      modify it under the terms of the GNU General Public License
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- *      as published by the Free Software Foundation; either version
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- *      2 of the License, or (at your option) any later version.
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- *
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  * DMA mapping callbacks...
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- * As alloc_coherent is the only DMA callback being used currently, that's
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- * the only thing implemented properly.  The rest need looking into...
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  */
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-#include <linux/dma-noncoherent.h>
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+#include <linux/dma-map-ops.h>
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+#include <linux/pagewalk.h>
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 #include <asm/cpuinfo.h>
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 #include <asm/spr_defs.h>
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@@ -38,7 +33,7 @@
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 	 * Flush the page out of the TLB so that the new page flags get
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 	 * picked up next time there's an access
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 	 */
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-	flush_tlb_page(NULL, addr);
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+	flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
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 	/* Flush page out of dcache */
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 	for (cl = __pa(addr); cl < __pa(next); cl += cpuinfo->dcache_block_size)
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@@ -46,6 +41,10 @@
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 	return 0;
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 }
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+
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+static const struct mm_walk_ops set_nocache_walk_ops = {
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+	.pte_entry		= page_set_nocache,
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+};
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 static int
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 page_clear_nocache(pte_t *pte, unsigned long addr,
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@@ -57,80 +56,46 @@
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 	 * Flush the page out of the TLB so that the new page flags get
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 	 * picked up next time there's an access
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 	 */
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-	flush_tlb_page(NULL, addr);
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+	flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
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 	return 0;
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 }
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63
 
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-/*
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- * Alloc "coherent" memory, which for OpenRISC means simply uncached.
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- *
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- * This function effectively just calls __get_free_pages, sets the
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- * cache-inhibit bit on those pages, and makes sure that the pages are
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- * flushed out of the cache before they are used.
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- *
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- * If the NON_CONSISTENT attribute is set, then this function just
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- * returns "normal", cachable memory.
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- *
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- * There are additional flags WEAK_ORDERING and WRITE_COMBINE to take
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- * into consideration here, too.  All current known implementations of
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- * the OR1K support only strongly ordered memory accesses, so that flag
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- * is being ignored for now; uncached but write-combined memory is a
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- * missing feature of the OR1K.
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- */
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-void *
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-arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
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-		gfp_t gfp, unsigned long attrs)
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+static const struct mm_walk_ops clear_nocache_walk_ops = {
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+	.pte_entry		= page_clear_nocache,
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+};
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+
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+void *arch_dma_set_uncached(void *cpu_addr, size_t size)
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 {
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-	unsigned long va;
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-	void *page;
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-	struct mm_walk walk = {
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-		.pte_entry = page_set_nocache,
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-		.mm = &init_mm
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-	};
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+	unsigned long va = (unsigned long)cpu_addr;
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+	int error;
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-	page = alloc_pages_exact(size, gfp);
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-	if (!page)
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-		return NULL;
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+	/*
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+	 * We need to iterate through the pages, clearing the dcache for
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+	 * them and setting the cache-inhibit bit.
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+	 */
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+	mmap_read_lock(&init_mm);
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+	error = walk_page_range(&init_mm, va, va + size, &set_nocache_walk_ops,
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+			NULL);
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+	mmap_read_unlock(&init_mm);
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-	/* This gives us the real physical address of the first page. */
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-	*dma_handle = __pa(page);
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-
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-	va = (unsigned long)page;
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-
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-	if ((attrs & DMA_ATTR_NON_CONSISTENT) == 0) {
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-		/*
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-		 * We need to iterate through the pages, clearing the dcache for
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-		 * them and setting the cache-inhibit bit.
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-		 */
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-		if (walk_page_range(va, va + size, &walk)) {
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-			free_pages_exact(page, size);
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-			return NULL;
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-		}
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-	}
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-
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-	return (void *)va;
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+	if (error)
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+		return ERR_PTR(error);
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+	return cpu_addr;
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 }
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-void
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-arch_dma_free(struct device *dev, size_t size, void *vaddr,
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-		dma_addr_t dma_handle, unsigned long attrs)
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+void arch_dma_clear_uncached(void *cpu_addr, size_t size)
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 {
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-	unsigned long va = (unsigned long)vaddr;
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-	struct mm_walk walk = {
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-		.pte_entry = page_clear_nocache,
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-		.mm = &init_mm
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-	};
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+	unsigned long va = (unsigned long)cpu_addr;
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-	if ((attrs & DMA_ATTR_NON_CONSISTENT) == 0) {
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-		/* walk_page_range shouldn't be able to fail here */
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-		WARN_ON(walk_page_range(va, va + size, &walk));
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-	}
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-
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-	free_pages_exact(vaddr, size);
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+	mmap_read_lock(&init_mm);
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+	/* walk_page_range shouldn't be able to fail here */
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+	WARN_ON(walk_page_range(&init_mm, va, va + size,
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+			&clear_nocache_walk_ops, NULL));
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+	mmap_read_unlock(&init_mm);
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 }
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-void arch_sync_dma_for_device(struct device *dev, phys_addr_t addr, size_t size,
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+void arch_sync_dma_for_device(phys_addr_t addr, size_t size,
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 		enum dma_data_direction dir)
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 {
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 	unsigned long cl;